KR20110109411A - High efficiency light emitting diode and method for fabricating the same - Google Patents

Abstract

According to the present invention, a high efficiency light emitting diode is disclosed. The light emitting diode,
Support substrate;
A semiconductor stacked structure on the support substrate, the semiconductor stacked structure comprising a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer, wherein the p-type compound semiconductor layer is located closer to the support substrate than the n-type compound semiconductor layer;
An opening formed by dividing the p-type compound semiconductor layer and the active layer into at least two regions to expose the n-type compound semiconductor layer and becoming narrower toward the n-type compound semiconductor layer;
An insulating layer covering the exposed surface of the n-type compound semiconductor layer and the sidewall of the opening;
A reflective layer covering the insulating layer and the p-type compound semiconductor layer and ohmic contacting the p-type compound semiconductor layer; And
And an n-electrode formed on the n-type compound semiconductor layer.

Description

High efficiency light emitting diodes {HIGH EFFICIENCY LIGHT EMITTING DIODE AND METHOD FOR FABRICATING THE SAME}

The present invention relates to a light emitting diode, and more particularly, to a gallium nitride-based high efficiency light emitting diode having a growth substrate removed by applying a substrate separation process and a method of manufacturing the same.

In general, nitrides of group III elements, such as gallium nitride (GaN) and aluminum nitride (AlN), have excellent thermal stability and have a direct transition type energy band structure. It is attracting much attention as a substance. In particular, blue and green light emitting devices using indium gallium nitride (InGaN) have been used in various applications such as large-scale color flat panel display devices, traffic lights, indoor lighting, high density light sources, high resolution output systems, and optical communications.

Such a nitride semiconductor layer of Group III elements is difficult to fabricate homogeneous substrates capable of growing them, and therefore, such as metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE), etc., on heterogeneous substrates having a similar crystal structure. Is grown through the process. As a hetero substrate, a sapphire substrate having a hexagonal structure is mainly used. However, sapphire is an electrically insulator, thus limiting the light emitting diode structure. Accordingly, recently, epitaxial layers, such as nitride semiconductor layers, are grown on dissimilar substrates such as sapphire, bonding supporting substrates to the epitaxial layers, and then separating the dissimilar substrates using a laser lift-off technique. Techniques for producing high efficiency light emitting diodes of construction have been developed (see, eg, US Pat. No. 6,744,071).

Such a vertical light emitting diode has an n-type GaN layer, an active layer, and a p-type GaN layer sequentially formed on a growth substrate, a p-electrode and a reflective metal layer formed on the p-type GaN layer, and a support substrate is bonded thereon. Thereafter, the sapphire substrate is removed and manufactured by forming an n-electrode or an n-electrode pad on the exposed n-type semiconductor layer. A support substrate is generally used as a conductive substrate and thus has a vertical structure in which n-electrodes and p-electrodes are disposed to face each other.

However, Ag, which is mainly used as a reflective layer while ohmic contacting a p-type GaN layer, is easily agglomerated by a thermal process, and migration of Ag atoms is likely to occur due to migration of the Ag atoms while driving a light emitting diode. It is difficult to form a stable ohmic metal reflective layer. Moreover, Ag is a metal material and has a limit in improving reflectance.

United States Patent Application Publication No. US6,744,071

The problem to be solved by the present invention is to provide a high-efficiency light emitting diode and a manufacturing method that improves the output of the generated light is reduced by reducing the emission path as the emission path of the light generated in the active layer is increased as the chip of the semiconductor light emitting device is large area It is.

In addition, another problem to be solved by the present invention is to provide a high-efficiency light-emitting diode and a method of manufacturing the same that improves the reflectance of the light traveling to the support substrate side.

In addition, another problem to be solved by the present invention is to provide a high efficiency light emitting diode and a manufacturing method which improves the luminous efficiency and electrostatic withstand voltage by effectively spreading the current between the n-side and p-side electrode in the vertical semiconductor light emitting diode.

According to an aspect of the invention there is provided a high-efficiency light emitting diode, the light emitting diode,

Support substrate;

A semiconductor stacked structure on the support substrate, the semiconductor stacked structure comprising a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer, wherein the p-type compound semiconductor layer is located closer to the support substrate than the n-type compound semiconductor layer;

An opening formed by dividing the p-type compound semiconductor layer and the active layer into at least two regions to expose the n-type compound semiconductor layer and becoming narrower toward the n-type compound semiconductor layer;

An insulating layer covering the exposed surface of the n-type compound semiconductor layer and the sidewall of the opening;

A reflective layer covering the insulating layer and the p-type compound semiconductor layer and ohmic contacting the p-type compound semiconductor layer; And

And an n-electrode formed on the n-type compound semiconductor layer.

Preferably, the light emitting diode is characterized in that the current flow from the n-electrode downwards by the insulating layer is dispersed.

Preferably, the light emitting diode is characterized in that the insulating layer is a distributed Bragg reflector.

Preferably, the light emitting diode, the distribution Bragg reflector is Si _x O _y N _z , Ti _x O _y , Ta _x O _y and Nb _x O _y , Al ₂ O ₃ , and HfO ₂ Characterized in that formed by alternately stacking at least two layers selected from.

Preferably, the light emitting diode is characterized in that the insulating layer comprises at least one element selected from Si, Ti, Ta, Nb, In and Sn.

Preferably, the light emitting diode is characterized in that the insulating layer has a terminal portion covering a portion of the p-type compound semiconductor layer.

Preferably, the light emitting diode is characterized in that the opening is formed with a step at one end, and the insulating layer is formed to cover the step.

Preferably, the light emitting diode is characterized in that one surface of the insulating layer is located on the same line as the p-type compound semiconductor layer.

Preferably, the light emitting diode is characterized in that the opening is formed to have a double inclination.

Preferably, the light emitting diode is light emitting diode, characterized in that the opening is formed to have a curved portion.

Preferably, the light emitting diode is light emitting diode, characterized in that the reflective layer is formed of Au, Al, Ag or a transparent conductive oxide film.

According to another aspect of the present invention, there is provided a method of manufacturing a high efficiency light emitting diode, the method comprising:

Growing epitaxial layers including an n-type compound semiconductor layer, an active layer and a p-type compound semiconductor layer on the growth substrate;

Etching the p-type compound semiconductor layer and the active layer, dividing the p-type compound semiconductor layer and the active layer into at least two regions, exposing the n-type compound semiconductor layer, and forming openings narrower toward the n-type compound semiconductor layer. step;

Forming an insulating layer by covering an exposed surface of the n-type compound semiconductor layer and sidewalls of the opening;

Forming a reflective layer by covering the insulating layer and the p-type compound semiconductor layer;

Bonding a support substrate to the reflective layer through a bonding metal; And

Removing the growth substrate.

According to the present invention, the light generated in the active layer of the light emitting diode can be reflected and emitted by the reflective layer or the distributed Bragg reflector, thereby shortening the emission path of the light, thereby improving the light extraction efficiency. Furthermore, when the distributed Bragg reflector is employed in the light emitting diode, the reflectance can be optimized in response to the wavelength of light generated in the active layer.

In addition, according to the present invention, in the light emitting diode, the reflectance of the light propagating toward the supporting substrate can be improved by forming the reflective layer or the distributed Bragg reflector.

Further, according to the present invention, by forming the current blocking region, the tendency of the current is concentrated in the direction directly below the n-side electrode, and induces the current between the n-side and p-side electrode in the lateral direction n-side and p-side By effectively spreading the current between the electrodes it is possible to improve the luminous efficiency and electrostatic breakdown voltage of the light emitting diode.

1 is a cross-sectional view illustrating a high efficiency light emitting diode according to a first embodiment of the present invention.
2 is a cross-sectional view for describing a high efficiency light emitting diode according to a second embodiment of the present invention.
3 is a cross-sectional view for describing a high efficiency light emitting diode according to a third embodiment of the present invention.
4 is a cross-sectional view for describing a high efficiency light emitting diode according to a fourth embodiment of the present invention.
5 is a cross-sectional view illustrating a high efficiency light emitting diode according to a fifth embodiment of the present invention.
6 is a cross-sectional view for describing a high efficiency light emitting diode according to a sixth embodiment of the present invention.
7 is a plan view illustrating a high efficiency light emitting diode according to an embodiment of the present invention.
8 to 10 are views for explaining a method of manufacturing a high efficiency light emitting diode according to a first embodiment of the present invention.
11 is a view for explaining a method of manufacturing a high efficiency light emitting diode according to a second embodiment of the present invention.
12 to 13 are views for explaining a method of manufacturing a high efficiency light emitting diode according to a third embodiment of the present invention.

Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention; The following embodiments are provided as examples to ensure that the spirit of the present invention to those skilled in the art will fully convey. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms.

In the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience, the same or similar reference numerals are to indicate the same or similar components.

First Example

1 is a cross-sectional view illustrating a high efficiency light emitting diode according to an embodiment of the present invention.

Referring to FIG. 1, the light emitting diode includes a support substrate 51, a semiconductor stack 20, an opening 30, an insulating layer 31, a reflective layer 41, a bonding metal 42, and an n-electrode 43. ) And the p-electrode pad 45.

The support substrate 51 is distinguished from the growth substrate 21 (see FIG. 8) for growing the compound semiconductor layers, and is a secondary substrate attached to the compound semiconductor layers that have already been grown. The support substrate 51 may be a conductive substrate or an insulating substrate such as, for example, a sapphire substrate. In this case, when the support substrate 51 is used as a conductive substrate, the support substrate 51 may serve as a p-side electrode in addition to the support for supporting the semiconductor laminate 20, and the p-electrode pad 45 may be formed on the support substrate 51. ) Can be formed.

The semiconductor stacked structure 20 is positioned on the support substrate 51 and includes an n-type compound semiconductor layer 23, an active layer 25, and a p-type compound semiconductor layer 27. The p-type compound semiconductor layer 27 is located closer to the support substrate 51 side than the n-type compound semiconductor layer 23 similarly to the general vertical light emitting diode. In addition, the semiconductor laminate 20 may be located on a portion of the support substrate 51.

The n-type compound semiconductor layer 23, the active layer 25, and the p-type compound semiconductor layer 27 may be formed of a III-N series compound semiconductor, such as (Al, Ga, In) N semiconductor. The n-type compound semiconductor layer 23 and the p-type compound semiconductor layer 27 may be a single layer or multiple layers, respectively. For example, the n-type compound semiconductor layer 23 and / or the p-type compound semiconductor layer 27 may include a contact layer and a cladding layer, and may also include a superlattice layer. In addition, the active layer 25 may have a single quantum well structure or a multiple quantum well structure. Since the n-type compound semiconductor layer 23 having a relatively low resistance is located on the opposite side of the support substrate 51, it is easy to form a rough surface on the top surface of the n-type compound semiconductor layer 23. The extraction efficiency of the light generated in the active layer 25 is improved.

The opening 30 is formed by forming a predetermined pattern on the p-type compound semiconductor layer 27 using photolithography and then mesa-etching a part of the region, and the p-type compound semiconductor layer 27 and the active layer 25 A portion of the n-type compound semiconductor layer 23 may be exposed, and the p-type compound semiconductor layer 27 and the active layer 25 may be divided into at least two regions.

In addition, the opening 30 may be formed as a trench, a groove, or a hole, and a plurality of openings 30 may be formed. For example, the opening 30 may be formed in a trench to divide the p-type compound semiconductor layer 27 and the active layer 25 into four regions as shown in FIG. 7. In addition, the opening 30 may have a plurality of holes arranged in a matrix. Therefore, it should be understood that the present invention is not limited to the number of openings or the specific shape of the openings.

The insulating layer 31 is formed in the semiconductor laminate 20 to perform a current blocking function. For example, the insulating layer 31 has SiO ₂ and an exposed surface of the n-type compound semiconductor layer 23 and the opening 30. Is formed to cover the side wall.

That is, the insulating layer 31 disperses the direction of current flowing between the n-type compound semiconductor layer 23 and the p-side electrode in the lateral direction instead of directly below the n-type compound semiconductor layer 23, thereby preventing current concentration. Relax

On the other hand, the insulating layer 31 includes at least one element selected from, for example, Si, Ti, Ta, Nb, In and Sn, or Si _x O _y N _z , Ti _x O _y , Ta _x O _y At least two layers selected from Nb _x O _y , Al ₂ O ₃ , and HfO ₂ may be alternately stacked, and may be a distributed Bragg reflector (DBR). In this case, when the insulating layer 31 is a distributed Bragg reflector, the optical thicknesses of the high refractive index layer and the low refractive index layer which are alternately stacked may be adjusted to maximize the reflectance of light having a specific wavelength. Thus, by forming a distributed Bragg reflector with an optimized reflectance according to the wavelength of light generated in the active layer 25, it is possible to form a highly reflective insulating layer 31 having a high reflectance for, for example, ultraviolet rays, visible rays or infrared rays. Can be. For example, the first layer of insulating layer 31 is Si _x O _y N _z Or Al ₂ O ₃ , the second layer is Ti _x O _y Or HfO ₂ . In addition, the first layer is preferably formed in contact with the semiconductor layer to improve the adhesion.

That is, the insulating layer 31 may reflect the light traveling in the semiconductor stacked structure 20, as well as the current blocking function, so that the light is directed toward the outside, and is generated in the active layer 25. The loss of light may be reduced by shortening the emission path of light. In addition, as shown in Figs. 1 and 10, the end portions 31a (see Fig. 10) of the insulating layer are formed to cover a part of the p-type compound semiconductor layer 27, so that the supporting substrate 51 is formed by the end portions 31a. It may also be directed outward by reflecting light directed toward the side.

In particular, when the insulating layer 31 in the opening 30 is formed of a high reflection material, the opening 30 is used to improve the light extraction efficiency or to increase the current dispersion effect even when the insulating layer 31 is formed of a conventional insulating material. ) May be formed to be narrower toward the n-type compound semiconductor layer 23. This will be described later.

The reflective layer 41 covers the insulating layer 31 and the p-type compound semiconductor layer 27. The reflective layer 41 is formed by using a conductive material such as gold (Au), aluminium (Al), silver (Ag), or the like, which is a ohmic contact with the p-type compound semiconductor layer 27. It may be formed of a conductive oxide film (ITO).

The reflective layer 41 is produced in the active layer 25 and passes through the insulating layer 31 when the insulating layer 31 is not formed of a high reflective insulating layer such as a distributed Bragg reflector but is formed as a transparent insulating layer such as SiO _2. By allowing one light to be reflected by the reflective layer 41 to be emitted to the outside, the light extraction efficiency can be increased, and the reflectance of the light traveling toward the support substrate 51 can be improved.

The bonding metal 42 may be located between the support substrate 51 and the reflective layer 41. The bonding metal 42 may be formed of Au-Sn and Cr-Au, and adheres the support substrate 51 to the semiconductor stacked structure 20 by eutectic bonding.

The n-electrode 43 may be in ohmic contact with the n-type compound semiconductor layer 23 and is formed on the n-type compound semiconductor layer 23. However, for the current dispersion effect by the formation of the insulating layer 31, the n-electrode 43 is preferably formed at a position corresponding to the position of the insulating layer 31.

According to the present embodiment, the light extraction efficiency can be increased by forming a distributed Bragg reflector having a high reflectance inside the semiconductor laminate structure to shorten the emission path of the light generated from the active layer or to increase the reflectance of the light traveling toward the support substrate. The insulating layer inside the laminate structure disperses the current between the n-side electrode and the p-side electrode laterally to provide a light emitting diode having high light efficiency.

Hereinafter, a method of manufacturing a high efficiency light emitting diode according to the present invention will be briefly described with reference to FIGS. 8 to 10.

Referring to FIG. 8, epitaxial layers including an n-type compound semiconductor layer 23, an active layer 25, and a p-type compound semiconductor layer 27 are grown on a growth substrate 21 such as sapphire.

Next, referring to FIG. 9, the p-type compound semiconductor layer 27 and the active layer 25 are etched to form an opening 30 exposing a portion of the n-type compound semiconductor layer 23. At this time, the side wall 30a of the opening 30 may be inclined at a predetermined angle so that the upper surface of the opening 30 is larger than the bottom surface 30b of the opening. In addition, the opening 30 may have a plurality of openings exposing the n-type compound semiconductor layer 23, such as a mesh shape.

Next, referring to FIG. 10, an insulating layer 31 covering the exposed surface of the n-type compound semiconductor layer 23 and the sidewall 30a of the opening 30 is formed. As shown by the circle, the insulating layer 31 may be formed such that the distal end portion 31a of the insulating layer covers a part of the p-type compound semiconductor layer 27. In this way, when the insulating layer 31 is formed of a distributed Bragg reflector, the light directed toward the support substrate 51 can be reflected by the distal end portion 31a.

Next, although not shown, a reflective layer 41 covering the insulating layer 31 and the p-type compound semiconductor layer 27 is formed. Here, the reflective layer 41 is formed using a conductive metal such as gold (Au), aluminium (Al), silver (Ag), or the like, which is in ohmic contact with the p-type compound semiconductor layer 27. Or a transparent conductive oxide film (ITO). Meanwhile, one metal of Pt, Pd, and Cr may be further formed between the semiconductor layer and the reflective metal. Thereafter, metal layers for bonding are formed on the reflective layer 41, and metal layers for bonding are also formed on the support substrate 51, and then these metal layers are bonded to each other. Accordingly, the bonding metal 42 is formed by the metal layers for bonding, and the support substrate 51 is bonded to the compound semiconductor layers 23, 25, and 27.

Thereafter, the growth substrate 21 is removed using a laser lift-off technique or the like to expose the n-type compound semiconductor layer 23. Thereafter, the n-electrode 43 is formed on the exposed n-type compound semiconductor layer 23. As described above, the n-electrode 43 is formed to correspond to the position of the insulating layer 31. It is preferable for the current dispersion effect, and finally, the light emitting diode shown in Fig. 1 is completed by dividing into individual light emitting diode chips.

2nd Example

2 is a cross-sectional view for describing a high efficiency light emitting diode according to a second embodiment of the present invention. Hereinafter, the description of the same parts as in the first embodiment will be omitted for simplicity of explanation.

2, the light emitting diode includes a support substrate 151, a semiconductor stack 120, an opening 130, an insulating layer 131, a reflective layer 141, a bonding metal 142, and an n-electrode 143. ) And the p-electrode pad 145.

Here, the description of the other components is the same as in the first embodiment, but the shape of the distal end of the insulating layer 131 is different from the insulating layer 31.

That is, the insulating layer 131 does not have an end portion 31a covering a part of the p-type compound semiconductor layer 127 like the insulating layer 31, and as shown in FIG. 11, the end of the insulating layer 131. Is colinear with the top surface of the p-type compound semiconductor layer 127. In this way, the reflective layer 141 may be formed thinner than the reflective layer 41.

However, since the shape does not have the distal end portion 31a, even when the insulating layer 131 is a distributed Bragg reflector, the insulating layer 31 reflects the light directed toward the supporting substrate 151 by the insulating layer 131. Not easy compared to However, with the formation of the reflective layer 141 covering the insulating layer 131, the reflectance of the light directed to the supporting substrate 151 may be increased, and the overall light extraction efficiency is also increased.

On the other hand, the light efficiency is increased due to the current dispersion effect due to the formation of the insulating layer 131.

Referring to the method for manufacturing the light emitting diode shown in FIG. 2 in more detail, the steps up to forming the opening 130 having the shape shown in FIG. 9 are common to the first embodiment, and then, the insulating layer 131. In the step of forming), unlike FIG. 10, the insulating layer 131 is formed to cover only the exposed surface of the n-type compound semiconductor layer 123 and the sidewall of the opening 130. That is, the insulating layer 131 does not cover a portion of the upper surface of the p-type compound semiconductor layer 127 by using the terminal portion. Therefore, the end surface of the insulating layer 131 is positioned on the same line as the top surface of the p-type compound semiconductor layer 127.

Next, after forming the reflective layer 141 covering the insulating layer 131 and the p-type compound semiconductor layer 127, a bonding metal 142 is formed, and the support substrate 151 is formed of the semiconductor laminate structure 120. ) And the growth substrate are removed in the same manner as in the first embodiment.

According to the present embodiment, the distribution Bragg reflector having high reflectance can be formed inside the semiconductor laminate to shorten the emission path of the light generated from the active layer, and improve the light extraction efficiency by increasing the reflectance of the light propagating toward the support substrate using the reflective layer. It is possible to increase the current between the n-side electrode and the p-side electrode laterally by the insulating layer inside the semiconductor laminate structure to provide a light emitting diode with high light efficiency. In addition, the reflective layer can be formed thinner.

The third Example

3 is a cross-sectional view for describing a high efficiency light emitting diode according to a third embodiment of the present invention. Hereinafter, the description of the same parts as in the previous embodiments will be omitted for simplicity.

Referring to FIG. 3, the light emitting diode includes a support substrate 251, a semiconductor laminate structure 220, an opening 230, an insulating layer 231, a reflective layer 241, a bonding metal 242, and an n-electrode 243. ) And a p-electrode pad 245.

Here, the description of the other components are the same as in the previous embodiments, but the shape of the opening 230 is different from the openings 30 and 130 and the shape of the distal end of the insulating layer 231 is the insulating layers 31 and 131. )

That is, the opening 230 may include a stepped portion 230c extending from one end of the sidewall 230a of the opening, as shown in a circle in FIG. 12.

In addition, by forming the opening 230, the insulating layer 231 may be formed to have the same height as that of the p-type compound semiconductor layer 127, as shown in FIG. 13. That is, the insulating layer 231 is formed to cover the stepped portion 230c as well as the exposed surface of the n-type compound semiconductor layer 223 and the sidewall 230a of the opening 230, and is formed in the stepped portion 230c. The upper surface of the distal end portion 231a of the insulating layer is positioned on the same line as the upper surface of the p-type compound semiconductor layer 227 not covered by the insulating layer 230. By doing so, the reflective layer 241 can be formed thinner even if the insulating layer 231 is formed with the distal end portion 231a, unlike the reflective layer 41.

Since the insulator 231 of the light emitting diode according to the present embodiment has an end portion 231 a, when the insulating layer 231 is a distributed Bragg reflector, not only the reflective layer 242 but also the end portion 231 a of the insulating layer. Reflecting the light directed toward the support substrate 251 further improves the light extraction efficiency.

On the other hand, the light efficiency is increased due to the current dispersion effect due to the formation of the insulating layer 231.

Referring to the method for manufacturing the light emitting diode shown in FIG. 3 in more detail, unlike in the first and second embodiments, in the step of forming the opening 230, as shown in FIG. 12, the opening 230 is formed. Is formed to have a stepped portion 230c extending from one end of the side wall 230a. Next, also in the step of forming the insulating layer 231, the insulating layer (not to cover the stepped portion 230c as well as the exposed surface of the n-type compound semiconductor layer 223 and the sidewall 230a of the opening 230). 231 is formed, and in this case, the upper surface of the distal end portion 231a of the insulating layer formed on the stepped portion 230c is positioned on the same line as the upper surface of the p-type compound semiconductor layer 227 not covered by the insulating layer 230. Let's do it.

Next, after forming the reflective layer 241 covering the insulating layer 231 and the p-type compound semiconductor layer 227, a bonding metal 242 is formed, and the support substrate 251 is formed of the semiconductor laminate structure 220. ), And the process of removing the growth substrate are the same as in the previous embodiments.

According to the present embodiment, a distributed Bragg reflector having a high reflectance can be formed inside the semiconductor laminate to shorten the emission path of light generated in the active layer, and the light propagating toward the support substrate using the reflective layer as well as the distal end portion 231a of the insulator. The light extraction efficiency can be increased by increasing the reflectance, and the light emitting diode having a high light efficiency can be provided by dispersing the current between the n-side electrode and the p-side electrode laterally by the insulating layer inside the semiconductor laminate structure. In addition, although the distal end portion 231a of the insulator is formed, the reflective layer can be formed thinner.

Other Example

4 to 6 are cross-sectional views illustrating high efficiency light emitting diodes according to fourth to sixth embodiments of the present invention, respectively.

4 and 5, in addition to the insulators 31, 131, and 231 having a shape as shown in FIGS. 1 to 3, the light emitting diode according to the present invention has a sidewall of the insulator such as the insulator 331 of FIG. 4. It can be seen that it may have a double inclination or be formed in a curved shape as insulator 431 of FIG. 5. In addition, for this purpose, the shape of the openings 330 and 430 should also be formed in a double slanted to curved shape, respectively.

Specifically, in the case of FIG. 4, when the double inclined plane of the opening 330 and the double inclined plane of the insulator 331 are formed, an area where two sides having different inclinations forming the double inclined plane meet each other is usually in the n-type compound semiconductor layer 323. It belongs. However, the present invention is not limited thereto, and according to an embodiment, not only the double inclined surface, but also the side slope of the opening may be variously modified into a triple or quadruple slope, and at this time, two sides having different slopes may meet each other. The region may belong to the p-type compound semiconductor layer 327.

By doing so, the current dispersion direction to the degree of dispersion by the insulators 331 and 431 differs from the dispersion direction to the degree of dispersion of the current by the insulators 31, 131, and 231, as well as the reflection direction or emission of light generated in the active layer. The angle may also be different from that caused by the insulators 31, 131, and 231.

Meanwhile, referring to FIG. 6, unlike FIG. 1, one surface of the reflective layer 541 may not be bent along the shape of the insulating layer 531, but may form a horizontal plane. In this case, the reflective layer 541 may be formed very thick, unlike other embodiments.

In addition, in FIG. 6, the case where the p-electrode pad 545 ′ is formed outside the semiconductor laminate structure is illustrated by a dotted line. That is, as shown by the solid line, although the p-electrode pad 545 'may be formed under the support substrate 551, the support substrate 551, the bonding metal 542, and the reflective layer 541 may be formed on the semiconductor laminate structure. The p-electrode pad 545 ′ may be formed on the reflective layer 541 extending laterally longer than 520 and exposed to the outside.

Further, although not shown, those skilled in the art will understand that the first to fifth embodiments of the present invention may be formed outside the semiconductor laminate structure, similarly to the dotted lines in FIG. 6.

The present invention can be carried out by modification and modification within the scope without departing from the gist of the present invention, the scope of the present invention is defined by the claims to be described later rather than the detailed description, the meaning and scope of the claims and their All changes or modifications derived from the equivalent concept should be construed as being included in the scope of the present invention.

21: growth substrate 23: n-type compound semiconductor layer
25: active layer 27: p-type compound semiconductor layer
20: semiconductor laminate 30: opening
31: Insulation layer 41: Reflective layer
42: bonding metal 43: n-electrode
45: p-electrode pad 51: support substrate

Claims (12)

Support substrate;
A semiconductor stacked structure on the support substrate, the semiconductor stacked structure comprising a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer, wherein the p-type compound semiconductor layer is located closer to the support substrate than the n-type compound semiconductor layer;
An opening formed by dividing the p-type compound semiconductor layer and the active layer into at least two regions to expose the n-type compound semiconductor layer and becoming narrower toward the n-type compound semiconductor layer;
An insulating layer covering the exposed surface of the n-type compound semiconductor layer and the sidewall of the opening;
A reflective layer covering the insulating layer and the p-type compound semiconductor layer and ohmic contacting the p-type compound semiconductor layer; And
A light emitting diode comprising an n-electrode formed on the n-type compound semiconductor layer. The method according to claim 1,
And the current flows downward from the n-electrode by the insulating layer. The method according to claim 2,
The insulating layer is a light emitting diode, characterized in that the distribution Bragg reflector. The method according to claim 3,
The distribution Bragg reflectors are Si _x O _y N _z , Ti _x O _y , Ta _x O _y , Al ₂ O ₃ , and HfO ₂ Light emitting diodes, characterized in that formed by alternately stacking at least two layers selected from among. The method according to claim 2,
The insulating layer comprises at least one element selected from Si, Ti, Ta, Nb, In and Sn. The light emitting diode of claim 1, wherein the insulating layer has a terminal portion covering a portion of the p-type compound semiconductor layer. The light emitting diode of claim 6, wherein the opening has a step at one end thereof, and the insulating layer is formed to cover the step. The light emitting diode of claim 1, wherein one surface of the insulating layer is positioned on the same line as the p-type compound semiconductor layer. The light emitting diode of claim 1, wherein the opening is formed to have a double inclination. The light emitting diode of claim 1, wherein the opening is formed to have a curved portion. The method according to claim 1,
The reflective layer is a light emitting diode, characterized in that formed of Au, Al, Ag or a transparent conductive oxide film. Growing epitaxial layers including an n-type compound semiconductor layer, an active layer and a p-type compound semiconductor layer on the growth substrate;
Etching the p-type compound semiconductor layer and the active layer, dividing the p-type compound semiconductor layer and the active layer into at least two regions, exposing the n-type compound semiconductor layer, and forming openings narrower toward the n-type compound semiconductor layer. step;
Forming an insulating layer by covering an exposed surface of the n-type compound semiconductor layer and sidewalls of the opening;
Forming a reflective layer by covering the insulating layer and the p-type compound semiconductor layer;
Bonding a support substrate to the reflective layer through a bonding metal; And
And removing the growth substrate.

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