KR20110073814A - Liquid crystal display device, driving and manufacturing method thereof - Google Patents

Abstract

PURPOSE: A liquid crystal display device, a driving and manufacturing method thereof are provided to input gamma voltage data and store it by performing a write-protection function of a memory device through a gamma reference voltage. CONSTITUTION: In a liquid crystal display device, a driving and manufacturing method thereof, an LCD panel(100) controls the light transmission of the liquid crystal layer which is formed between a lower plate and an upper plate. A reference gamma voltage generator(210) generates a plurality of gamma reference voltages. A gamma reference voltage buffer(412) buffs a plurality of gamma reference voltages. A plurality of data driving circuits(410) is stored in the gamma reference voltage buffer. A timing controller(230) controls a plurality of data driving circuits based on LCD driving data.

Description

Liquid crystal display, its driving method, and manufacturing method {LIQUID CRYSTAL DISPLAY DEVICE, DRIVING AND MANUFACTURING METHOD THEREOF}

The present invention relates to a liquid crystal display, and more particularly, in a printed circuit board assembly process, board data can be input to a memory device without a separate power supply, and a board assembly can be used. The present invention relates to a liquid crystal display device capable of stably performing a write protection function of a memory device, a driving method thereof, and a manufacturing method thereof.

In general, a liquid crystal display (LCD) forms a liquid crystal layer having anisotropic dielectric constant between a lower substrate and an upper substrate, and then adjusts the light transmittance of the liquid crystal layer by adjusting the intensity of an electric field formed in the liquid crystal layer. A display device that displays an image.

Such a liquid crystal display may be classified into a liquid crystal display panel displaying a video signal and a panel driver applying a driving signal to the liquid crystal display panel.

The liquid crystal display panel includes a liquid crystal layer formed between the lower substrate and the upper substrate. Here, a plurality of pixels formed in each pixel region defined by the intersection of the plurality of gate lines and the plurality of data lines is formed in the lower substrate. Each pixel includes a thin film transistor connected to a gate line and a data line, and a liquid crystal cell connected to the thin film transistor.

The panel driver includes a data driver for applying a data voltage to the data line, a gate driver for applying a gate signal to the gate line, and a timing controller for supplying data signals to the data driver and controlling driving timing of each of the data driver and the gate driver. Equipped. Here, the timing controller is mounted on a separate printed circuit board, the data driver is mounted on a data tape carrier package attached between the liquid crystal display panel and the printed circuit board, and the gate driver is a liquid crystal. The gate tape carrier package may be mounted between the display panel and the printed circuit board.

Such a liquid crystal display device displays a desired image on the liquid crystal display panel by adjusting the light transmittance of the liquid crystal layer formed in each pixel by using a gate signal and a data voltage applied from the panel driver to the liquid crystal display panel.

On the other hand, the printed circuit board, in addition to the timing control unit, a power generation unit for generating power for driving the liquid crystal, a first drive for storing driving information data required for driving the liquid crystal input from the outside, and providing the stored driving information data to the timing control unit. A reference gamma voltage generator for generating a plurality of reference gamma voltages may be mounted according to the memory device and the gamma voltage information data provided from the second memory device storing the gamma voltage information data input from the outside. In this case, when a part of the driving information data stored in the first memory element is damaged, a problem occurs in driving the liquid crystal display panel. Thus, the first memory element is a predetermined write protection voltage generated by the power generator. The read protection function is set to enable only the read function. On the other hand, even if a part of the gamma voltage information data stored in the second memory device is damaged, since a large problem does not occur in driving the liquid crystal display panel, both read / write functions are set to be possible.

Each of the first and second memory devices has a writing function by a separate writing device in a printed circuit board assembly process before the board assembly state in which the printed circuit board is connected to the liquid crystal display panel. In the board assembly process, only a read function is performed.

In the printed circuit board assembly process, the write protection function set in the first memory device is canceled by using a separate first write power supplied from the outside to switch to the write function, and the driving information data is input to the first memory device. Save it. In the printed circuit board assembly process, gamma voltage information data is input to the second memory device using the second writing power source generated by the power generation unit and stored therein.

Therefore, the conventional liquid crystal display including the first and second memory elements has the following problems.

First, in order to simultaneously input and store data in the first and second memory devices, a separate first write power source for releasing the write protection function of the first memory device is required.

Second, when the second write power supplied to the second memory device is used as the first write power, there is a problem in that the first memory device performs a write protection function.

Third, since the first memory device performs the write protection function by the first write power source generated by the power supply circuit, the write protection function of the first memory device is released due to noise and static electricity, and thus the data stored in the first memory device is released. There is a problem that it can be damaged.

The present invention is to solve the above problems, in the printed circuit board assembly (Printed Circuit Board Assembly) process, it is possible to input the necessary data to the memory device without a separate power supply for the board assembly (Board Assembly) state An object of the present invention is to provide a liquid crystal display, a driving method thereof, and a manufacturing method thereof capable of stably performing a write protection function of a memory device.

According to an aspect of the present invention, there is provided a liquid crystal display device including: a liquid crystal display panel configured to display an image by adjusting a light transmittance of a liquid crystal layer formed between a lower substrate and an upper substrate; A reference gamma voltage generator configured to generate a plurality of gamma reference voltages; A gamma reference voltage buffer unit configured to buffer the plurality of gamma reference voltages; A plurality of data driving circuits having a built-in gamma reference voltage buffer unit and converting a data signal into a data voltage using the plurality of gamma reference voltages supplied from the gamma reference voltage buffer unit to supply the data voltage to the liquid crystal display panel; A timing controller which controls the plurality of data driving circuits based on driving information data required for driving the liquid crystal and supplies the data signals to the plurality of data driving circuits; And a memory device configured to store the driving information data and perform a write protection function by a predetermined gamma reference voltage output from the gamma reference voltage buffer unit.

According to an aspect of the present invention, there is provided a method of driving a liquid crystal display, the method comprising: generating a plurality of gamma reference voltages; Supplying the plurality of gamma reference voltages to a plurality of data driving circuits supplying a data voltage to a liquid crystal display panel; Buffering and outputting the plurality of gamma reference voltages using a gamma reference voltage buffer unit built in each of the plurality of data driving circuits; Supplying a predetermined gamma reference voltage output from the gamma reference voltage buffer unit to a memory device storing driving information data required for driving the liquid crystal; And performing a write protection function of the memory device according to the predetermined gamma reference voltage.

According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, the method including: providing a liquid crystal display panel having a liquid crystal layer between a lower substrate and an upper substrate; Providing a printed circuit board including a memory device and a reference gamma voltage generator configured to generate a plurality of gamma reference voltages; Inputting and storing driving information data required for driving the liquid crystal into the memory device through a connector formed on the printed circuit board; A gamma reference voltage buffer unit configured to buffer the plurality of gamma reference voltages, and to provide a plurality of data driving circuits for converting a data signal into a data voltage using the plurality of gamma reference voltages to supply the data voltages to the liquid crystal display panel step; Connecting the printed circuit board and the plurality of data driving circuits; Supplying a predetermined gamma reference voltage output from the gamma reference voltage buffer unit to the memory device; And performing a write protection function of the memory device according to the predetermined gamma reference voltage.

As described above, the liquid crystal display according to the present invention, the driving method and the manufacturing method thereof have the following effects by performing the write protection function of the memory device using the predetermined gamma reference voltage buffered by the gamma reference voltage buffer unit. There is.

First, there is an effect that the write protection function of the memory device can be stably performed.

Second, in the printed circuit board assembly process, the driving information data required for the memory device 220 may be stored without a separate power supply, and at the same time, the gamma voltage information data may be input and stored in the storage unit of the gamma reference voltage generator. have.

Third, even if noise and static electricity are generated, the data stored in the memory device can be stably protected.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a diagram schematically illustrating a liquid crystal display according to a first exemplary embodiment of the present invention, and FIG. 2 is an enlarged view of a portion A shown in FIG. 1.

1 and 2, a liquid crystal display according to a first embodiment of the present invention includes a liquid crystal display panel 100, a printed circuit board 200, a plurality of gate circuit films 300, and a plurality of data. It is comprised including the circuit film 400.

The liquid crystal display panel 100 includes a liquid crystal layer (not shown) formed between the lower substrate 110 and the upper substrate 120.

The lower substrate 110 is provided with a plurality of pixels P formed for each pixel region defined by the intersection of the plurality of gate lines GL and the plurality of data lines DL. Each pixel P includes a thin film transistor (not shown) connected to the gate line GL and the data line DL, and a liquid crystal cell (not shown) connected to the thin film transistor.

The upper substrate 120 includes a color filter formed to correspond to each pixel P, a black matrix for separating the color filters, and the like.

The liquid crystal display panel 100 displays an image by adjusting the light transmittance of the liquid crystal layer according to the data voltage applied to each pixel P. FIG.

The gamma reference voltage generator 210, the memory device 220, the timing controller 230, and a power supply circuit (not shown) are formed on the printed circuit board 200.

The gamma reference voltage generator 210 generates a plurality of gamma reference voltages different from each other by using a driving voltage supplied from a power supply circuit. To this end, the gamma reference voltage generator 210 includes a storage 212, a digital variable resistor 214, and a gamma reference voltage output 216.

The storage unit 212 performs a write function by the input power supply Vcc supplied from the power supply circuit, thereby providing two active wirings SDA (Data) and SCL (Clock) from the connector 202 provided on the printed circuit board 200. Stores gamma voltage information data input through Here, the storage unit 212 may be configured as an EEPROM (Electrically Erasable Programmable ROM) capable of erasing and writing data as a nonvolatile memory device.

The digital variable resistor unit 214 adjusts the resistance of the variable resistor connected in series to correspond to the gamma voltage information data stored in the storage unit 212.

The gamma reference voltage output unit 216 outputs a plurality of gamma reference voltages GMA generated according to the resistance value adjusted by the digital variable resistor 214. Here, the plurality of gamma reference voltages GMA are output to the data circuit film 400 through the plurality of gamma reference voltage supply line groups 204 formed on the printed circuit board 200.

The memory device 220 is mounted on one side of the printed circuit board 200 to store driving information data required for driving the liquid crystal input through the connector 202. Here, the driving information data includes RGB video data, timing data, a dynamic capacitance compensation control signal for improving response speed, a control signal for auto color compensation, and a low voltage differential signaling. Differential Signaling (LVDS) includes control signals, clock information, resolution information, and the like.

As illustrated in FIG. 3, the memory device 220 includes first to eighth terminals.

The first to third terminals NC (No Connection) are extra terminals formed so that no special data or input power Vcc is applied. The first to third terminals NC are connected to the ground power source GND together with the fourth terminal GND, which is a ground terminal. The first to third terminals NC are grounded regardless of the lighting and driving of the liquid crystal display device, except when used in place of other terminals.

The fifth and sixth terminals SDA and SCL are respectively provided with driving information data SDA and a clock applied from the external lighting equipment (not shown) through the connector 202 at the time of lighting (before the liquid crystal display device is fastened). The signal SCL is applied. In addition, the fifth and sixth terminals SDA and SCL may communicate with the timing controller 230 when the liquid crystal display device is driven (after the liquid crystal display device is fastened) to transfer driving information data stored in the memory device 220 to the timing controller. Provided at 230.

The seventh terminal is a write-protect terminal W / P, which determines the function of the memory element 220. When a predetermined gamma reference voltage GMA is supplied to the write protection terminal W / P from the data circuit film 400 through the printed circuit board 200, the memory device 220 performs a write protection function. Only the read function will be performed. Here, the predetermined gamma reference voltage GMA may be about 12V.

Meanwhile, the printed circuit board 200 is provided with a write protection power supply circuit 222 that generates a write protection power supply using a predetermined gamma reference voltage GMA and supplies the write protection power to the write protection terminal W / P.

The write protection power supply circuit 222 includes first and second resistors R1 and R2 connected in series between any one of the plurality of gamma reference voltage transmission line groups 205 and the transmission line 205a and the ground power supply GND. And a third resistor R3 connected between the node N1 between the first and second resistors R1 and R2 and the write protection terminal W / P. The write protection power supply circuit 222 divides the predetermined gamma reference voltage GMA supplied from the predetermined gamma reference voltage transmission line 205a through the first to third resistors R1, R2, and R3. To generate the write protection power and supply the generated write protection power to the write protection terminal (W / P). Accordingly, the memory device 220 performs the write protection function by the write protection power supplied from the write protection power supply circuit 222 to the write protection (W / P) terminal.

On the other hand, if the write protection power is not supplied from the write protection power supply circuit 222 to the write protection (W / P) terminal, the memory device 220 performs a write function.

As a result, since the data circuit film 400 is not connected to the printed circuit board 200 in the printed circuit board assembly process, in the printed circuit board assembly process, the memory device (without a separate writing power source) may be used. The driving information data required for 220 may be input and stored, and at the same time, the gamma voltage information data may be input and stored in the storage unit 212 of the gamma reference voltage generator 210. In the board assembly state in which the data circuit film 400 is connected to the printed circuit board 200, the predetermined gamma reference voltage GMA is transferred from the data circuit film 400 to the write protection power supply circuit 222. Since the memory device is supplied, the memory device can stably perform the write protection function by the write protection power supplied from the write protection power supply circuit 222 to the write protection (W / P) terminal.

In FIGS. 1 and 2, the timing controller 230 uses the read function of the memory device 220 as the memory device 220 performs the write protection function by the predetermined gamma reference voltage GMA. The driving information data is provided from the memory device 220 through two active wirings SDA (Data) and SCL (Clock). Accordingly, the timing controller 230 receives the input data input from the outside through the user connector 206 provided on the printed circuit board 200 based on the driving information data provided from the memory device 220. Aligns with the driving of the N-axis, and outputs the aligned data signal to the data circuit film 400 through the group of data transmission lines 208 formed on the printed circuit board 200.

In addition, the timing controller 230 generates a gate control signal (GSP, GSC, GOE, etc.) based on a timing control signal (Vsync, Hsync, DE, DCLK, etc.) input from the outside through the user connector 206. The data control signal (SSP, SSC, SOE, POL, etc.) is generated and supplied to the data circuit film 400 while being supplied to the circuit film 300.

The plurality of gate circuit films 300 are attached to one edge of the lower substrate 110 at regular intervals by a tape automated bonding (TAB) method. Here, each of the plurality of gate circuit films 300 may be formed of a tape carrier package or a chip on film. Each of the gate circuit films 300 includes a gate driving circuit 310 for sequentially supplying a gate signal to a gate line formed on the lower substrate 110. In this case, the gate driving circuit 310 is formed in a chip form and mounted on the gate circuit film 300.

The gate driving circuit 310 is the timing controller 230 via the printed circuit board 200, the data circuit film of the plurality of data circuit films 400, the lower substrate 110, and the gate circuit film 300. The gate signal is generated according to the gate control signal supplied from the N-th source, and the gate signal is sequentially supplied to the gate line GL.

Meanwhile, the gate driving circuit 310 is not mounted on the gate circuit film 300, but is mounted on the lower substrate 110 in a chip form by a chip on glass method, or is a gate in panel. In the panel method, the thin film transistor may be directly formed on the lower substrate 110 at the same time as the thin film transistor forming process.

The plurality of data driving circuits 400 are attached between the upper edge of the lower substrate 110 and the printed circuit board 200 by a tab (TAB) method. Here, each of the plurality of data circuit films 400 may be configured as a tape carrier package or a chip on film. Each of the data circuit films 400 includes a data driving circuit 410 for supplying a data voltage to a data line formed on the lower substrate 110. In this case, the data driving circuit 410 is formed in a chip form and is mounted on the data circuit film 400.

As shown in FIG. 4, each of the data driving circuits 410 includes a signal controller 411, a gamma reference voltage buffer unit 412, a gamma voltage generator 413, a digital processor 414, and an analog processor. 415, and an output buffer unit 416.

The signal controller 411 relays the data control signals SSP, SSC, SOE, POL, etc. and the data signal RGB supplied from the timing controller 230 to the corresponding components.

The gamma reference voltage buffer unit 412 performs signal buffering on a plurality of gamma reference voltages GMAs supplied through the printed circuit board 200 and the data circuit film 400, and transmits the printed circuit board through the data circuit film 400. By outputting to the plurality of gamma reference voltage transmission line groups 205 formed at 200, a plurality of buffered gamma reference voltages GMA are supplied to the next stage data driving circuit 410. Here, the first data driving circuit 410 of the plurality of data driving circuits 410 is connected to the plurality of gamma reference voltages GMA from the gamma reference voltage generator 210 through the plurality of gamma reference voltage supply lines 204. Is supplied, the remaining data driving circuit 410 is connected to the gamma reference voltage buffer unit of the previous stage data driving circuit 410 through a plurality of gamma reference voltage transmission line groups 205 formed on the printed circuit board 200. A plurality of gamma reference voltages GMA output from 412 are supplied.

Meanwhile, as shown in FIG. 2, a predetermined gamma reference voltage GMA among the plurality of gamma reference voltage transmission line groups 205 for outputting a plurality of gamma reference voltages GMA from the gamma reference voltage buffer unit 412. The output gamma reference voltage transmission line 205a is connected to the write protection power supply circuit 222.

The gamma voltage generator 413 uses a plurality of gamma reference voltages GMA supplied from the plurality of gamma reference voltage transmission line groups 205 and a plurality of positive gamma voltages PGV corresponding to the number of gray levels of the data signal. The negative gamma voltage NGV is subdivided, and the plurality of divided positive gamma voltages PGV and the plurality of negative gamma voltages NGV are supplied to the analog processing unit 415.

The digital processor 414 generates a sequential sampling signal using the source start pulse SSP and the source shift signal SSC supplied from the signal controller 411, and generates a sequential sampling signal from the signal controller 411 according to the sequential sampling signal. After sequentially latching the supplied data signals R, G and B, the latched data signals R, G and B are simultaneously output to the analog processor 415 according to the source output enable signal SOE.

The analog processor 415 simultaneously outputs data signals from the digital processor 414 using the plurality of positive gamma voltages PGV and the plurality of negative gamma voltages NGV supplied from the gamma voltage generator 413. After converting R, G, and B into positive and negative analog data voltages, the positive and negative analog data voltages are selected and output according to the polarity control signal POL supplied from the signal controller 411. Output to the buffer unit 416.

The output buffer unit 416 buffers the analog data voltage supplied from the analog processing unit 415 and outputs the signal to the corresponding data line DL.

As described above, the liquid crystal display according to the exemplary embodiment of the present invention has a plurality of positive and negative gamma voltages PGV and NGV in which a plurality of gamma reference voltages GMA buffered by the gamma reference voltage buffer unit 412 are subdivided. The input data RGB output from the timing controller 230 is converted into an analog data voltage and supplied to each pixel P of the liquid crystal display panel 100 to display a desired image.

In addition, the liquid crystal display according to the first exemplary embodiment of the present invention uses the predetermined gamma reference voltage GMA among the plurality of gamma reference voltages buffered by the gamma reference voltage buffer unit 412 to store the memory device 220. The write protection function of the memory device 220 may be stably performed by performing the write protection function of the memory device 220.

5A to 5D are views for explaining a method of manufacturing a liquid crystal display device according to a first embodiment of the present invention.

A method of manufacturing a liquid crystal display according to a first exemplary embodiment of the present invention will be described with reference to FIGS. 5A to 5D as follows.

In the method of manufacturing the liquid crystal display device according to the first embodiment of the present invention, the liquid crystal display device is configured in the same manner as the liquid crystal display device according to the first embodiment of the present invention described above with reference to FIGS. Detailed description of the configuration will be replaced by the above description, and only the manufacturing method will be described.

First, as shown in FIG. 5A, a liquid crystal display panel 100 including a liquid crystal layer formed between the lower substrate 110 and the upper substrate 120 is prepared.

As illustrated in FIG. 5B, a printed circuit including the above-described memory device 220, a reference gamma voltage generator 210 for generating a plurality of gamma reference voltages GMA, and the timing controller 230 described above. The substrate 200 is prepared.

The drive information data necessary for driving the liquid crystal is input to the memory device 220 through the connector 202 formed on the printed circuit board 200. That is, after connecting the light equipment to the connector 202, the drive information data from the writing equipment to the two active wirings (SDA (Data), SCL (Clock)) formed on the printed circuit board 200 via the connector 202 The driving information data is input and stored in the memory device 220 by applying the SDA and the clock signal SCL. In this case, since the memory device 220 is in a state in which a write preventing power is not applied, the driving information data SDA may be stored in the memory device 220 according to the clock signal SCL by performing a write function.

As illustrated in FIG. 5C, a plurality of gamma reference voltage buffer units 412 for buffering the plurality of gamma reference voltages GMA are built in, and the timing controller 230 may use the plurality of gamma reference voltages GMA. A plurality of data driving circuits 410 for converting a data signal into a data voltage in accordance with the data control signal supplied from the () is provided. In addition, a gate driving circuit 310 for generating a gate signal according to the gate control signal supplied from the timing controller 230 is provided.

As shown in FIG. 5D, the printed circuit board 200, the plurality of data driving circuits 310, and the gate driving circuit 410 are connected. Here, each of the plurality of data driving circuits 410 is mounted on the plurality of data circuit films 400, and each of the plurality of gate driving circuits 310 is mounted on the plurality of gate circuit films 300. Each of the plurality of data circuit films 400 is attached between the printed circuit board 200 and the lower substrate 110 by a tab (TAB) method, so that the plurality of data driving circuits 410 are connected to the printed circuit board 200. Connected. In addition, each of the plurality of gate circuit films 300 is attached to one side of the lower substrate 110 by a tab (TAB) method so that the plurality of gate driving circuits 310 are connected to the gate line.

Accordingly, the buffered predetermined gamma reference voltage GMA output from the gamma reference voltage buffer unit 412 included in the first data driving circuit 410 among the plurality of data driving circuits 410 is stored in the memory device 220. The write protection function of the memory device 220 is performed according to a predetermined gamma reference voltage GMA.

The manufacturing method of the liquid crystal display according to the first exemplary embodiment of the present invention may be applied to the memory device 220 without a separate power supply for writing in a state in which the data circuit film 400 is not connected to the printed circuit board 200. The predetermined gamma reference voltage supplied from the gamma reference voltage buffer unit 412 through the data circuit film 400 is input when necessary driving information data is input and the data circuit film 400 is connected to the printed circuit board 200. The write protection function of the memory device 220 may be stably performed by performing the write protection function of the memory device 220 according to the GMA.

6 is a diagram for describing a liquid crystal display according to a second exemplary embodiment of the present invention.

Referring to FIG. 6, the liquid crystal display according to the second exemplary embodiment of the present invention may include a liquid crystal display panel 100, a printed circuit board 500, a plurality of gate circuit films 300, and a plurality of data circuit films 400. , A control board 600, and a flexible printed circuit 700. The liquid crystal display according to the second exemplary embodiment having the above configuration includes the liquid crystal display according to the first exemplary embodiment described above except for the printed circuit board 500, the control board 600, and the flexible printed circuit 700. Since the same configuration has a description of the same configuration will be replaced with the above description.

Since the printed circuit board 500 has the same configuration as the printed circuit board 200 of the liquid crystal display according to the first embodiment of the present invention except that the timing controller 230 is not mounted, the description thereof will be described. Will be replaced by the above description.

The timing controller 230 described above is mounted on the control board 600. The control board 600 is connected to the printed circuit board 500 through the flexible printed circuit 700 to drive information from the memory device 220 through the printed circuit board 500 and the flexible printed circuit 700. Receive the data, generate a signal for driving the liquid crystal display panel 100 based on the driving information data, and generate the generated signals to the corresponding component through the flexible printed circuit 700 and the printed circuit board 500. Supply.

The flexible printed circuit 700 is connected between the printed circuit board 500 and the control board 600 to relay a signal transmitted between the printed circuit board 500 and the control board 600.

As described above, the liquid crystal display according to the second exemplary embodiment of the present invention is the same as that of the first exemplary embodiment except that the timing controller 230 is mounted on a separate control board 600 instead of the printed circuit board 500. Since it is the same as the liquid crystal display device, it is possible to provide the same effect as the liquid crystal display device of the first embodiment described above.

Meanwhile, in the manufacturing method of the liquid crystal display according to the second exemplary embodiment of the present invention, a process of connecting the control board 600 on which the timing controller 230 is mounted and the printed circuit board 500 to the flexible printed circuit 700 is performed. Except for further comprising the same as the manufacturing method of the first embodiment described above with reference to Figures 5a to 5d it can provide the same effects as the manufacturing method of the first embodiment described above.

Meanwhile, in the above-described liquid crystal display of the present invention and a method of manufacturing the same, the data driving circuit 410 is illustrated and described as being mounted on the data circuit film 400, but is not limited thereto. The lower substrate 110 may be mounted in a chip form.

Those skilled in the art to which the present invention pertains will understand that the present invention can be implemented in other specific forms without changing the technical spirit or essential features. Therefore, it is to be understood that the embodiments described above are exemplary in all respects and not restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

1 is a diagram schematically illustrating a liquid crystal display according to a first exemplary embodiment of the present invention.

FIG. 2 is an enlarged view of a portion A shown in FIG. 1.

FIG. 3 is a diagram for describing the memory device shown in FIG. 2.

FIG. 4 is a diagram for describing the data driving circuit shown in FIG. 1.

5A to 5D are diagrams for describing a method of manufacturing a liquid crystal display according to a first embodiment of the present invention.

6 is a diagram for schematically describing a liquid crystal display according to a second exemplary embodiment of the present invention.

<Explanation of Signs of Major Parts of Drawings>

100: liquid crystal display panel 110: lower substrate

120: upper substrate 200, 500: printed circuit board

210: gamma reference voltage generator 212: storage unit

214: digital variable resistance section 216: gamma reference voltage output section

220: memory element 222: write protection power supply circuit

230: timing controller 300: gate circuit film

310: gate driving circuit 400: data circuit film

410: data driving circuit 412: gamma reference voltage buffer

600: control board 700: flexible printed circuit

Claims (10)

A liquid crystal display panel which displays an image by adjusting a light transmittance of a liquid crystal layer formed between the lower substrate and the upper substrate; A reference gamma voltage generator configured to generate a plurality of gamma reference voltages; A gamma reference voltage buffer unit configured to buffer the plurality of gamma reference voltages; A plurality of data driving circuits having a built-in gamma reference voltage buffer unit and converting a data signal into a data voltage using the plurality of gamma reference voltages supplied from the gamma reference voltage buffer unit to supply the data voltage to the liquid crystal display panel; A timing controller which controls the plurality of data driving circuits based on driving information data required for driving the liquid crystal and supplies the data signals to the plurality of data driving circuits; And And a memory device configured to store the driving information data and perform a write protection function by a predetermined gamma reference voltage output from the gamma reference voltage buffer unit. The method of claim 1, A printed circuit board on which the memory device, the gamma reference voltage generator, and the timing controller are mounted; And And a plurality of data circuit films attached between the printed circuit board and the liquid crystal panel and mounted with the respective data driving circuits. The method of claim 1, A control board on which the timing controller is mounted; A printed circuit board on which the memory device and the gamma reference voltage generator are mounted; A flexible printed circuit connecting the control board and the printed circuit board; And And a plurality of data circuit films attached between the printed circuit board and the liquid crystal panel and to which the respective data driving circuits are connected. The method according to claim 2 or 3, The memory device may perform a write protection function by the predetermined gamma reference voltage supplied from the gamma reference voltage buffer unit via an output terminal of the data driving circuit, the data circuit film, and the printed circuit board. Liquid crystal display device. The method according to claim 2 or 3, And the memory device stores the driving information data inputted through a connector formed on the printed circuit board when the write protection function is released in the non-drive state of the data driving circuit. The method of claim 5, The gamma reference voltage generator, A storage unit for storing gamma voltage information data input from the outside through the connector; A digital variable resistor unit for adjusting a resistance value of the variable resistor connected in series to correspond to the gamma voltage information data stored in the storage unit; And And a gamma reference voltage output unit configured to output the plurality of gamma reference voltages generated according to the resistance value adjusted by the digital variable resistor unit. Generating a plurality of gamma reference voltages; Supplying the plurality of gamma reference voltages to a plurality of data driving circuits supplying a data voltage to a liquid crystal display panel; Buffering and outputting the plurality of gamma reference voltages using a gamma reference voltage buffer unit built in each of the plurality of data driving circuits; Supplying a predetermined gamma reference voltage output from the gamma reference voltage buffer unit to a memory device storing driving information data required for driving the liquid crystal; And And performing a write protection function of the memory device according to the predetermined gamma reference voltage. The method of claim 7, wherein The memory element is write-protected from the gamma reference voltage buffer by an output terminal of the data driving circuit, a data circuit film on which the data driving circuit is mounted, and the predetermined gamma reference voltage supplied through the printed circuit board. A method of driving a liquid crystal display, characterized in that to perform a function. Providing a liquid crystal display panel having a liquid crystal layer formed between the lower substrate and the upper substrate; Providing a printed circuit board including a memory device and a reference gamma voltage generator configured to generate a plurality of gamma reference voltages; Inputting and storing driving information data required for driving the liquid crystal into the memory device through a connector formed on the printed circuit board; A gamma reference voltage buffer unit configured to buffer the plurality of gamma reference voltages, and to provide a plurality of data driving circuits for converting a data signal into a data voltage using the plurality of gamma reference voltages to supply the data voltages to the liquid crystal display panel step; Connecting the printed circuit board and the plurality of data driving circuits; Supplying a predetermined gamma reference voltage output from the gamma reference voltage buffer unit to the memory device; And And performing a write protection function of the memory device according to the predetermined gamma reference voltage. The method of claim 9, The step of connecting the printed circuit board and the plurality of data driving circuits, Providing a plurality of data circuit films on which each of the plurality of data driving circuits is mounted; And Attaching each of the plurality of data circuit films between the printed circuit board and the lower substrate.

Images