KR20110068230A - Multilayer ceramic capacitor - Google Patents

Abstract

PURPOSE: A multilayer ceramic capacitor is provided to prevent a crack and insulation breakdown due to thermal impact by thickening the dielectric layer of the outer side than the dielectric layer of the inner side of an effective layer. CONSTITUTION: A dielectric layer(6) and an inner electrode(4) are alternatively formed in an effective layer(20). The effective layer is comprised of an inner side(22) and an outer side(24). The dielectric layer of the outer side is thicker than the dielectric layer of the inner side. A protection layer(10) protects the effective layer from an external impact. The outer side is 0.1 to 0.3 times thicker than the protection layer.

Description

Multilayer Ceramic Capacitor

The present invention relates to a multilayer ceramic capacitor, and more particularly, to a multilayer ceramic capacitor capable of stably securing capacitance and preventing cracks and dielectric breakdown due to thermal shock.

In general, a multilayer ceramic capacitor includes a plurality of ceramic dielectric sheets and internal electrodes inserted between the plurality of ceramic dielectric sheets. Such multilayer ceramic capacitors are widely used as capacitive components of various electronic devices because of their small size, high capacitance, and easy mounting on a substrate.

Recently, as electronic products are miniaturized and multifunctional, chip components are also miniaturized and highly functionalized, and thus, multilayer ceramic capacitors are required to have high capacity and large capacity. Therefore, in recent years, multilayer ceramic capacitors having a thickness of 2 μm or less and a laminated number of 500 or more layers have been manufactured.

However, due to the thinning and high lamination of the ceramic dielectric layer, the proportion of the volume occupied by the internal electrode layers increases, thereby causing cracks or insulation on the ceramic laminate due to thermal shock applied in a circuit board mounting process such as firing and reflow soldering. There is a problem that destruction occurs.

Specifically, cracks are caused by stresses caused by the difference in thermal expansion coefficients of the materials forming the ceramic layer and the internal electrode layer acting on the ceramic laminate, and are particularly generated at both edges of the upper and lower portions of the multilayer ceramic capacitor.

In addition, a stress is generated at the top and bottom of the dielectric material due to the thermal change, and when voltage is applied, dielectric breakdown of the dielectric layer may occur.

An object of the present invention is to provide a multilayer ceramic capacitor that can effectively prevent cracks and dielectric breakdown of a ceramic laminate due to thermal shock while ensuring a stable capacitance.

A multilayer ceramic capacitor according to an embodiment of the present invention includes an effective layer in which internal electrodes and dielectric layers are alternately stacked; And a protective layer formed by stacking dielectric layers on upper and lower surfaces of the effective layer, wherein the effective layer is formed of an outer side, an inner side, and an outer side in order in the stacking direction, and the thickness of the dielectric layer of the outer side is It is thicker than the thickness of the dielectric layer, the thickness of the outer portion may be 0.1 to 0.3 times the thickness of the protective layer.

The thickness of the dielectric layer on the outer side of the multilayer ceramic capacitor according to the exemplary embodiment of the present invention may be 1.05 to 1.30 times the thickness of the dielectric layer on the inner side.

The thickness of the dielectric layer of the effective layer of the multilayer ceramic capacitor according to the exemplary embodiment of the present invention may be 5 μm or less.

The number of stacked layers of the dielectric layers of the effective layer of the multilayer ceramic capacitor according to an embodiment of the present invention may be 100 to 1000.

In the multilayer ceramic capacitor according to the present invention, the thickness of the dielectric layers in the upper and lower portions of the effective layer in which the dielectric layers and the internal electrodes are alternately stacked is formed thicker than the other dielectric layers in the effective layer, so that the cracks are likely to occur at the upper and lower portions of the effective layer. Insulation breakdown can be prevented.

In addition, by controlling the thickness of the inside of the effective layer to form a thick dielectric layer, it is possible to effectively prevent cracks and breakdown while ensuring a stable capacitance.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. However, in describing the preferred embodiment of the present invention in detail, if it is determined that the detailed description of the related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

In addition, the same reference numerals are used throughout the drawings for parts having similar functions and functions.

In addition, in the entire specification, when a part is referred to as being 'connected' to another part, it may be referred to as 'indirectly connected' not only with 'directly connected' . In addition, "including" a certain component means that it may further include other components, without excluding other components, unless specifically stated otherwise.

1 is a perspective view of a multilayer ceramic capacitor according to an exemplary embodiment of the present invention.

Referring to FIG. 1, a multilayer ceramic capacitor according to an exemplary embodiment of the present invention may include a capacitor body 1 and an external electrode 2.

In the capacitor body 1, a plurality of dielectric layers may be stacked therein, and an internal electrode may be inserted between the plurality of dielectric layers. In this case, the dielectric layer may be formed using barium titanate (Ba ₂ TiO ₃ ), and the internal electrode may be formed using nickel (Ni), tungsten (W), or cobalt (Co).

The external electrode 2 may be formed on both side surfaces of the capacitor body 1. The external electrode 2 may serve as an external terminal by being electrically connected to the internal electrode exposed on the outer surface of the capacitor body 1. In this case, the external electrode 2 may be formed using copper (Cu).

2 is a cross-sectional view taken along line AA ′ of FIG. 1, and FIG. 3 is a cross-sectional view taken along line B-B ′ of FIG. 1.

2 and 3, a multilayer ceramic capacitor according to an exemplary embodiment of the present invention may include an effective layer 20 in which a dielectric layer 6 and an internal electrode 4 are alternately stacked therein. In addition, the upper and lower surfaces of the effective layer 20 may include a protective layer 10 formed by stacking dielectric layers.

The effective layer 20 is composed of an outer portion 24, an inner portion 22, and an outer portion 24 in order in the stacking direction.

The protective layer 10 may be formed by sequentially stacking a plurality of dielectric layers on the upper and lower surfaces of the effective layer 20 to protect the effective layer 20 from external shocks and the like.

When the internal electrode 4 of the effective layer 20 is formed of nickel (Ni), its thermal expansion coefficient is about 13 × 10 ⁻⁶ / ° C., and the thermal expansion coefficient of the dielectric layer 6 formed of ceramic is about 8 × 10 ^{−. 6} / ° C. Due to the difference in the coefficient of thermal expansion between the dielectric layer 6 and the internal electrode 4, a stress is applied to the dielectric layer 6 when thermal shock is applied in a process such as firing and reflow soldering to a circuit board. Therefore, a crack may occur in the dielectric layer 6 due to stress during thermal shock, or an insulation breakdown may occur when a voltage is applied while the stress is applied. In particular, the crack and the dielectric breakdown phenomenon is likely to occur in the upper and lower portions of the effective layer 20, that is, the outer portion 24.

Accordingly, as shown in FIG. 2, in the multilayer ceramic capacitor according to the exemplary embodiment, the thickness t ₁ of the dielectric layer of the outer part 24 of the effective layer 20 is determined by the thickness t of the dielectric layer of the inner part 22. By forming thicker than ₂ ) it is possible to prevent such cracks and breakdown.

On the other hand, the capacitance of the multilayer ceramic capacitor is inversely proportional to the thickness of the dielectric layer 6 positioned between the internal electrodes 4, so that as the thickness t ₁ of the dielectric layer of the outer part 24 becomes thicker, the capacitance of the multilayer ceramic capacitor is increased. Will decrease. In addition, as the overall thickness of the outer part 24 forming the thickness of the dielectric layer 6 becomes thicker, the capacitance of the multilayer ceramic capacitor decreases.

It is important to stably maintain the capacitance while preventing cracks and dielectric breakdown due to thermal shock, so how thick the thickness t ₁ of the dielectric layer of the outer part 24 is compared with the thickness t ₂ of the dielectric layer of the inner part 22. Whether to form or the total thickness of the outer portion 24 can be determined through experiments.

Example Ratio to thickness of dielectric layer
(t ₁ / t ₂ ) Thickness ratio of the outer part to the protective layer
(Y / X)
Breakdown voltage
(V)
Capacitance
(uF)
Thermal shock test crack generation
Count One 1.00 0.3 91 10.3 11/300 2 1.03 0.3 93 10.3 3/300 3 1.05 0.3 97 10.2 0/300 4 1.10 0.3 97 10.2 0/300 5 1.23 0.3 97 10.2 0/300 6 1.30 0.3 97 10.1 0/300 7 1.40 0.3 97 9.8 0/300

Table 1 shows the thickness ratio of the outer portion to the protective layer (Y / X, where X is the thickness of the protective layer 10 in the lamination direction, and Y is the thickness of the outer portion 24 in the lamination direction) to 0.3. It is a table showing the results of experiments on cracks, breakdown phenomena, and capacitance against thermal shock while fixing and changing the ratio (t ₁ / t ₂ ) to the thickness of the dielectric layer.

As a conductive paste for forming the internal electrode 4, nickel (Ni) powder having a particle size of 0.1 μm to 0.2 μm was used, and the thickness t ₁ of the dielectric layer of the outer portion 24 of the multilayer ceramic capacitor thus formed was 0.7. At 0.8 μm, the thickness t ₂ of the dielectric layer of the inner part 22 is 0.8 μm to 1 μm. In addition, the thermal shock test was made by immersing in a 320 ° C lead bath for 2 seconds.

Referring to Table 1, the number of cracks is reduced from the point where the ratio (t ₁ / t ₂ ) to the thickness of the dielectric layer is 1.05 or more, and the capacitance is reduced when it exceeds 1.30. Therefore, it can be seen that it is appropriate to set the ratio (t ₁ / t ₂ ) to the thickness of the dielectric layer to 1.05 to 1.30 in order to stably secure the capacitance and prevent cracking and dielectric breakdown.

Example Ratio to thickness of dielectric layer
(t ₁ / t ₂ ) Thickness ratio of the outer part to the protective layer
(Y / X)
Breakdown voltage
(V)
Capacitance
(uF)
Thermal shock test crack generation
Count One 1.10 0.05 93 10.3 1/300 2 1.10 0.1 97 10.2 0/300 3 1.10 0.2 97 10.2 0/300 4 1.10 0.3 97 10.2 0/300 5 1.10 0.35 97 9.9 0/300

Table 2 shows the cracks against thermal shock while fixing the ratio (t ₁ / t ₂ ) to the thickness of the dielectric layer of the multilayer ceramic capacitor according to the present invention to 1.10 and changing the thickness ratio (Y / X) of the outer part to the protective layer. , Table 1 shows the results of experiments on dielectric breakdown and capacitance.

As a conductive paste for forming the internal electrode 4, nickel (Ni) powder having a particle size of 0.1 μm to 0.2 μm was used, and the thickness t ₁ of the dielectric layer of the outer portion 24 of the multilayer ceramic capacitor thus formed was 0.7. At 0.8 μm, the thickness t ₂ of the dielectric layer of the inner part 22 is 0.8 μm to 1 μm. In addition, the thermal shock test was made by immersing in a 320 ° C lead bath for 2 seconds.

Referring to Table 2, when the thickness ratio (Y / X) of the outer portion to the protective layer is less than 0.1 it can be seen that the number of cracks is increased and the dielectric breakdown voltage is lowered, the capacitance is reduced when it exceeds 0.3. Therefore, it can be seen that it is appropriate to set the thickness ratio (Y / X) of the outer part to the protective layer to 0.1 to 0.3 in order to stably secure the capacitance and to prevent cracking and dielectric breakdown.

The present invention is not limited by the above-described embodiment and the accompanying drawings. It will be apparent to those skilled in the art that the present invention may be substituted, modified, and changed in accordance with the present invention without departing from the spirit of the present invention.

1 is a perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention;

FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1;

3 is a cross-sectional view taken along line BB ′ of FIG. 1.

<Brief description of the main parts of the drawing>

1: capacitor body 2: external electrode

4: internal electrode 6: dielectric layer

10: protective layer 20: effective layer

22: inner part 24: outer part

Claims (4)

An effective layer in which internal electrodes and dielectric layers are alternately stacked; And A protective layer formed by stacking a dielectric layer on upper and lower surfaces of the effective layer; Including; The effective layer is composed of an outer portion, an inner portion, and an outer portion in order in the stacking direction, and the thickness of the dielectric layer on the outer portion is thicker than that of the dielectric layer on the inner portion, The thickness of the outer portion is a multilayer ceramic capacitor of 0.1 to 0.3 times the thickness of the protective layer. The method of claim 1, The thickness of the dielectric layer of the outer portion is a multilayer ceramic capacitor, characterized in that 1.05 to 1.30 times the thickness of the dielectric layer of the inner portion. The method of claim 1, The thickness of the dielectric layer of the effective layer is a multilayer ceramic capacitor, characterized in that less than 5um. The method of claim 1, Multilayer ceramic capacitors, characterized in that the number of stacked layers of the dielectric layer of the effective layer.

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