KR20110066333A - Flat panel display device - Google Patents

Abstract

PURPOSE: A flat panel display device is provided to reduce power consumption and increase usability in various fields. CONSTITUTION: A flat panel display device comprises a lower substrate(100), an upper substrate(200), and a driving integrated circuit(300). The lower substrate comprises a plurality of gate lines and data lines for defining a plurality of non-display pixels in a non-display area(114). The upper substrate is placed on the lower substrate facing the display area. The driving integrated circuit creates a dummy signal coping with the driving mode and transmits the signal to the data line coping with the non-display area.

Description

[0001] FLAT PANEL DISPLAY DEVICE [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a flat panel display, and more particularly, to a flat panel display capable of varying the fields of use of a flat panel display and reducing power consumption.

Currently, various flat panel display devices capable of reducing weight and volume, which are disadvantages of cathode ray tubes (CRTs), are being developed. A flat panel display device includes a liquid crystal display (LCD), a field emission display, a plasma display panel (PDP), and a light emitting diode (PDP) display device.

Among such flat panel display devices, a liquid crystal display device and a light emitting diode display device display a desired image by supplying a data signal according to image information to pixels arranged in a matrix form using a thin film transistor. At this time, the liquid crystal display device displays the desired image by adjusting the light transmittance of the liquid crystal according to the data signal. The light emitting diode display device displays a desired image by controlling the current flowing through the light emitting element according to the data signal.

The flat panel display device including the liquid crystal display device and the light emitting diode display device has a rectangular shape, and the display panel constituting the flat panel display device has a rectangular shape.

However, the conventional flat panel display has a problem in that it can not be diversified because of its rectangular shape.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a flat panel display device capable of various fields of use of a flat panel display device and capable of reducing power consumption.

According to an aspect of the present invention, there is provided a flat panel display including a plurality of display pixels defined in a display region having a rectangular or non-square shape, and a plurality of non-display pixels in a non-display region other than the display region A lower substrate including a plurality of gate lines and a plurality of data lines intersecting with each other to define; An upper substrate formed in the same shape as the display region and attached to the lower substrate so as to face the display region; And an actual data signal according to a driving mode of a normally black mode or a normally white mode is generated and supplied to the data lines corresponding to the plurality of display pixels and the dummy data corresponding to the driving mode And a driving integrated circuit for generating a signal and supplying the signal to a data line corresponding to the plurality of non-display pixels.

The dummy data signal is a black signal when the driving mode is normally black and a white signal when the driving mode is normally white.

The display area is formed in any one of a circular shape, an elliptical shape, a heart shape, a rectangular shape other than a square shape, and a polygonal shape including a curved shape.

As described above, in the flat panel display device according to the present invention, the display area is formed in a shape other than a square or rectangular shape, and the position information of the non-display pixel corresponding to the position of the non- The dummy data signal is corrected so as to correspond to the drive mode and supplied to the corresponding data line, thereby providing the following effects.

First, there is an effect that the field of use of the flat panel display device can be diversified through diversification of the product design.

Secondly, the driving mode and the dummy data signal are optimized to reduce the power consumption of the driving integrated circuit according to the supply of the dummy data signal, thereby reducing the overall power consumption of the flat panel display.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a schematic view for explaining a flat panel display according to an embodiment of the present invention.

Referring to FIG. 1, a flat panel display according to a first embodiment of the present invention includes a lower substrate 100; An upper substrate 200; And a driving integrated circuit (300).

The lower substrate 100 defines a plurality of non-display pixels 112 in a display region 110 having a rectangular or non-rectangular shape and a plurality of non-display pixels 112 in a non- And a plurality of gate lines GL and a plurality of data lines DL crossing each other to define the non-display pixels 116.

The display region 110 is formed to have a circular shape. Here, the display region 110 is not limited to a circular shape, but may be an ellipse shape (a), a heart shape (b), a polygonal shape (c, d) other than a rectangular shape or a square shape, And a polygonal shape (e) including a polygonal shape.

The plurality of display pixels 112 are formed in each of the regions defined by the plurality of gate lines GL and the plurality of data lines DL formed so as to intersect the inside of the display region 110. [ Each of the plurality of display pixels 112 includes a thin film transistor T connected to one of a plurality of gate lines GL and a plurality of data lines DL, And a pixel cell (P) connected to the scan electrode (T).

The thin film transistor T is switched in accordance with a gate pulse supplied to the gate line GL to supply the actual data signal to the pixel cell P supplied to the data line DL.

The pixel cell P displays an image corresponding to an actual data signal supplied through the thin film transistor T. [ Here, the pixel cell P may be a liquid crystal cell that displays a desired image by adjusting the light transmittance of the liquid crystal according to an actual data signal, or may be a light emitting cell that displays a desired image by controlling a current flowing through the light emitting device according to a data signal .

As described above, the plurality of display pixels 112 are formed in the display region 110 of a predetermined shape and display an image corresponding to an actual data signal supplied from the data line DL through the thin film transistor T. Here, the plurality of display pixels 112 may be formed to have different numbers for each horizontal line corresponding to the gate lines according to the shape of the display region 100, and the display region 110 and the non-display region 114 (Not shown) or a black matrix (not shown) for bonding the lower substrate 100 and the upper substrate 200 to each other or a portion of the display region 110 Some of them may be removed.

The non-display area 114 is defined as an area other than the display area 110 of the lower substrate 100.

A plurality of non-display pixels 116 are formed in a region defined by a plurality of gate lines GL and a plurality of data lines DL formed outside the display region 110. [ At this time, the gate line GL and the data line DL are formed in each of the plurality of non-display pixels 116, but the thin film transistor T is not formed as in the plurality of display pixels 112, The image displayed by the display unit 110 is not affected. The plurality of non-display pixels 116 may be obscured by a sealing member (not shown) or a black matrix (not shown) for bonding the lower substrate 100 and the upper substrate 200 together, Depending on the shape, some can be removed.

The upper substrate 200 is formed to have the same shape as the display region 110 and is attached to the lower substrate 100 so as to face the display region 110. In this case, when the plurality of display pixels 112 include pixel cells P made of liquid crystal cells, the upper substrate 200 may include a color filter (not shown) corresponding to each non-display pixel 112, (Not shown). At this time, the common electrode may be formed in the liquid crystal cell P of the lower substrate 100 according to the driving method of the liquid crystal cell. On the other hand, when the plurality of display pixels 112 include pixel cells P made of light emitting cells, the upper substrate 200 includes a moisture absorbent (not shown) for protecting the light emitting cells from oxygen or moisture, do.

May be attached to each other by a sealing member formed on the sealing line 150 formed along the edges of the display region 110 of the lower substrate 100 and the upper substrate 200.

The driving integrated circuit 300 is formed in the non-display area 114 corresponding to the lower portion of the lower substrate 100. [ The driving integrated circuit 300 generates an actual data signal in accordance with a driving mode of a normally black or a normally white mode and outputs the data signal to the data lines DL And supplies a dummy data signal corresponding to the driving mode to a data line DL corresponding to the plurality of non-display pixels 116. [ Here, when the pixel cell P is a liquid crystal cell, the normally white type driving mode includes the TN mode liquid crystal cell, and the normally black type driving mode may include the IPS mode or VA mode liquid crystal cell. have.

3, the driving integrated circuit 300 includes a control signal generating unit 310, a gate driving unit 320, a pixel information storing unit 330, a data converting unit 340, And a driving unit 350.

The control signal generation unit 310 generates timing control signals DCS and GCS for driving the pixels 112 using a timing synchronization signal TSS supplied from the outside.

The timing synchronization signal TSS includes a vertical synchronization signal Vsync; A horizontal synchronizing signal Hsync; A data enable signal (Data Enable); And a dot clock (DCLK).

The timing control signals DCS and GCS include a data control signal DCS for supplying an actual data signal to the data line DL; And a gate control signal (GCS) for supplying a gate pulse (GP) to the gate line (GL).

The data control signal DCS includes a source start pulse (Source Start Pulse); A source sampling clock; Source Output Enable; And the polarity control signal POL described above.

The gate control signal GCS includes a gate start pulse (Gate Start Pulse); A gate shift clock; And gate output enable (Gate Output Enable).

The gate driver 320 generates a gate pulse GP for switching the thin film transistor T of each display pixel 112 according to the gate control signal GCS and sequentially supplies the gate pulse GP to the gate line GL.

The pixel information storage unit 330 stores position information of the non-display pixels 116 formed on the respective horizontal lines corresponding to the plurality of gate lines GL.

In this case, on the lower substrate 100, there are horizontal lines in which at most n display pixels 112 are formed according to the shape of the display region 100, while horizontal lines in which m non-display pixels 116 smaller than n are formed Line is present. Accordingly, the number of data lines is n in order to supply the data signals to the n display pixels 112. a data signal is supplied to each of n data lines when driving a horizontal line in which n display pixels 112 are formed, and when a horizontal line in which i display pixels 112 smaller than n are formed, n data lines And the data signal is supplied to the data bus. For example, assuming that a circular display area 110 is formed in an area where nine data lines DL and nine gate lines GL intersect, as shown in FIG. 4, each horizontal line The number of the non-display pixels 116 varies depending on the circular shape of the display region 110. FIG. That is, on the second horizontal line, seven display pixels 112 to which data signals are supplied from the second to eighth data lines DL2 to DL8 formed in the display region 110, and first to ninth data lines Two non-display pixels 116 to which data signals are supplied from the first to ninth data lines DL1 to DL9 are provided in the display region 110 on the third horizontal line while the two non- There are only nine display pixels 112 to which a data signal is supplied. Accordingly, a method of setting the position information of the non-display pixel 116 will be described with reference to FIG. 4, for example.

First, coordinates ((1, 1) to (9, 9) in the form of a matrix formed by intersection of nine data lines (DL) and ten gate lines (GL) are virtually set.

Subsequently, the coordinates corresponding to the non-display pixels 116 located outside the display area 100 in accordance with the shape of the display area 110 among the coordinates ((1, 1) to (9, 9) The location information of the non-display pixel 116 is extracted and stored in the pixel information storage unit 330 to set the location information of the non-display pixel 116. [

5, the data conversion unit 340 includes a data alignment unit 341, a line memory 343, a counter 345, a correction position information generation unit 347, and a data correction unit 349, .

The data sorting unit 341 arranges input data Idata inputted from the outside so as to correspond to the number of data lines DL to generate alignment data Idata1 in units of horizontal lines.

The line memory 343 stores the alignment data Idata1 supplied from the data arrangement unit 341 in units of horizontal lines and supplies the stored data Idata2 of the stored horizontal lines to the data correction unit 349. [

The counter 345 counts the horizontal synchronization signal Hsync corresponding to the driving timing of each horizontal line among the timing control signals TSS supplied from the outside to generate the display line information DLI. Here, the horizontal synchronization signal Hsync may be supplied from the control signal generation unit 310. [

The correction position information generation unit 347 generates the data correction position information PI using the position information of the non-display pixels 116 corresponding to the display line information DLI supplied from the counter 345. [ That is, when the actual data signal is supplied to the i data lines DL among the n data lines DL to drive the display pixels 112 of each horizontal line, the correction position information generator 347 outputs i The data correction position information PI corresponding to the position of the non-display pixel 116 to which the dummy data signal is supplied to the other data lines DL except for the data line DL is generated.

The data correction unit 349 corrects the storage data Idata2 corresponding to the data correction position information PI among the storage data Idata2 in units of horizontal lines supplied from the line memory 343 using the data correction position information PI, ) In accordance with the drive mode (DMS) to generate dummy data, generate the remaining data (Idata2) excluding the dummy data as actual data, and generate the dummy data and the data of one horizontal line R, G, and B) to the data driver 350.

Here, the drive mode (DMS) may be the normally black or normally white mode described above. When the drive mode signal DMS is in the normally black mode, the dummy data has a gray level value corresponding to the black signal. When the drive mode signal DMS corresponds to the normally white mode, As shown in FIG. For example, assuming that the stored data has a tone value of 8 bits, the dummy data has a gray level value of "0" in the case of normally black, and the gray level value of "255" Lt; / RTI >

The correction of the dummy data performed in the data correction unit 349 will be described with reference to the ninth horizontal line 9H in FIG. 4 as follows.

First, the dummy data corresponding to the black signal is assumed to be "0 ", and the dummy data corresponding to the white signal is assumed to be" 1 ".

When the drive mode signal DMS is in the normally black mode, as shown in FIG. 6A, the data correction unit 349 corrects the data DMS according to the data correction position information PI corresponding to the position information of the non- The first and second stored data among the stored data of the ninth horizontal line 9H and the eighth and ninth data are corrected to dummy data of "0 ".

6B, when the drive mode signal DMS is in the normally white mode, the data correction unit 349 corrects the data correction position information PI (i) corresponding to the position information of the non-display pixel 116, The first and second stored data and the eighth and ninth data of the stored data of the ninth horizontal line 9H are corrected to dummy data of "1 ".

3, the data driver 350 receives the data (R, G, B) of one horizontal line supplied from the data converter 340 according to the data control signal DCS supplied from the control signal generator 310 And converts the latched data (R, G, B) into a positive / negative analog form using an analog positive / negative gamma voltage, and then generates a data signal having a polarity corresponding to the polarity control signal And supplies them to the respective data lines DL. Here, the dummy data supplied to the data driver 350 is converted into a dummy data signal corresponding to the white voltage or the black voltage and supplied to the corresponding data line DL, and the actual data is converted into an actual data signal corresponding to the gray scale voltage And supplied to the display pixel 112 through the corresponding data line DL.

In the flat panel display device according to the embodiment of the present invention, the display region 110 is formed in a shape other than a square or rectangular shape, and a non-display pixel 116 formed outside the display region 110 for each horizontal line The dummy data signal is corrected to correspond to the driving mode and supplied to the corresponding data line DL in accordance with the position information of the non-display pixel 116 corresponding to the position so that the driving mode and the dummy data signal are optimized, The power consumption of the driving integrated circuit 300 can be reduced. Therefore, the present invention can reduce the overall power consumption of the flat panel display.

Meanwhile, the flat panel display device according to the embodiment of the present invention can be applied to a display device including a flat display panel such as an external screen of a dual mobile phone, a mobile communication terminal, a portable game machine, and a portable video player. Particularly, the flat panel display according to the above-described embodiment of the present invention can be used in a release product including a circle such as an instrument panel, a clock, etc. of a vehicle by having a display panel of a release type corresponding to the release display area.

As a result, the present invention can diversify the field of use of the flat panel display device by diversifying the product design.

It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

1 is a schematic view for explaining a flat panel display according to an embodiment of the present invention.

Fig. 2 is a view showing various embodiments of the shape of the display area shown in Fig.

3 is a block diagram for explaining the driving integrated circuit shown in FIG.

FIG. 4 is a diagram for explaining an example of a method for setting position information of non-display pixels in the pixel information storage unit shown in FIG.

5 is a block diagram for explaining the data conversion unit shown in FIG.

6A is a diagram for explaining a method of correcting dummy data according to the normally black mode according to the present invention.

6B is a diagram for explaining a method of correcting dummy data according to the normally white mode according to the present invention.

Description of the Related Art [0002]

100: lower substrate 200: upper substrate

300: driving integrated circuit 310: control signal generating unit

320: Gate driver 330: Pixel information storage unit

340: data conversion unit 341: data alignment unit

345: counter 347: correction position information generating unit

349: Data correction unit 350: Data driving unit

Claims (9)

A plurality of display pixels are defined in a display region having a shape other than a rectangular or regular shape and a plurality of gate lines and a plurality of data lines intersect to define a plurality of non-display pixels in a non-display region other than the display region A lower substrate; An upper substrate formed in the same shape as the display region and attached to the lower substrate so as to face the display region; And And generates an actual data signal according to a driving mode of a normally black mode or a normally white mode and supplies the data signal to a data line corresponding to the plurality of display pixels, And supplies the generated data to the data lines corresponding to the plurality of non-display pixels. The method according to claim 1, Wherein the dummy data signal is a black signal when the driving mode is normally black and a white signal when the driving mode is normally white. The method according to claim 1, Wherein the display region is formed in any one of a circular shape, an elliptical shape, a heart shape, a rectangular shape other than a square shape, and a polygonal shape including a curved surface. The method according to claim 1, The display pixel includes: A thin film transistor connected to the gate line and the data line; And And a pixel cell for displaying an image corresponding to the actual data signal supplied according to the switching of the thin film transistor. 5. The method of claim 4, The drive integrated circuit comprising: A control signal generator for generating a timing control signal for driving the pixel using the input timing synchronization signal; A gate driver for generating a gate pulse for switching the thin film transistor of each display pixel according to the timing control signal and supplying the generated gate pulse to the gate line; A pixel information storage unit for storing position information of the non-display pixels formed on each horizontal line corresponding to each of the plurality of gate lines; Display data to be supplied to the plurality of display pixels and dummy data to be supplied to the plurality of non-display pixels by using the drive mode and the position information of the non-display pixel, part; And And converting the actual data and the dummy data into an analog form in accordance with the timing control signal to generate the actual data signal and the dummy data signal and supplying the generated actual data signal and the dummy data signal to the corresponding data line And a data driver. 6. The method of claim 5, And the position information of the non-display pixel is a position of a non-display pixel corresponding to a remaining data line except a data line for supplying an actual data signal to the display pixel from the drive integrated circuit when each horizontal line is driven Flat panel display. 6. The method of claim 5, Wherein the data conversion unit comprises: A data alignment unit for aligning the input data so as to correspond to the number of the data lines to generate alignment data in units of horizontal lines; A counter for generating display line information by counting a horizontal synchronizing signal corresponding to a driving timing of each horizontal line; A correction position information generation unit that generates correction position information using position information of the non-display pixel corresponding to the display line information; And Wherein the alignment data corresponding to the correction position information among the alignment data in the horizontal line unit is corrected according to the driving mode by using the correction position information to generate the dummy data, And a data correction unit configured to generate the data and supply the data to the data driver. 8. The method of claim 7, Wherein the data conversion unit further comprises a line memory for storing the alignment data supplied from the data alignment unit for each horizontal line and for providing the stored data to the data correction unit. 8. The method of claim 7, The dummy data includes: A gray level value corresponding to a black signal when the driving mode is normally black, And a gray level value corresponding to a white signal when the driving mode is the normally white.

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