KR20110065179A

KR20110065179A - Seal ring of image sensor and manufacuring method of seal ring of image sensor

Info

Publication number: KR20110065179A
Application number: KR1020090122052A
Authority: KR
Inventors: 박유배
Original assignee: 주식회사 동부하이텍
Priority date: 2009-12-09
Filing date: 2009-12-09
Publication date: 2011-06-15

Abstract

PURPOSE: The sealing of an image sensor and a method for manufacturing the sealing of the image sensor are provided to increase the high temperature resistance of the sealing by forming the sealing in a multiple partition structure and a supporting wall structure. CONSTITUTION: A plurality of element isolation films(112) is formed at the semiconductor substrate(110) in the peripheral side of the chip region of an image sensor and defines a sealing region. An insulating film(120) is formed on the semiconductor substrate in the sealing region and is formed into a multiple stacked structure. A plurality of contact plugs(122, 132, 142) or vias are formed on the insulating film to surround the chip region and are formed into partition structures.

Description

Seal of image sensor and manufacturing method of seal of image sensor {Seal ring of image sensor and manufacuring method of seal ring of image sensor}

Embodiments relate to a sealing of an image sensor and a method of manufacturing a seal of an image sensor.

After the image sensor is manufactured, a sealing ring (also referred to as a "guard ring") process is performed before the packaging process.

The sealing is a structure formed through a general semiconductor process in order to prevent external moisture, chemicals, impurities, etc. from penetrating into the image sensor through the interface of each structure of the image sensor or the porous material layer.

1 is a top view schematically illustrating a general sealing structure of an image sensor, and FIG. 2 is a side cross-sectional view of the sealing structure based on the display line A-A 'of FIG. 1.

As shown in FIG. 1, the sealing 10 is formed to surround a chip area of an image sensor, and a scribe lane (cutting space) for chip separation between the sealing 10 of adjacent chips. 20 is formed.

Referring to FIG. 2, a device isolation layer 11 is formed on a semiconductor substrate 10 to define a sealing region, and the first insulating layer 12 including the first contact plug 13 may be formed by chemical vapor deposition (CVD) or the like. Form through the process.

Subsequently, a first metal layer 14 connected to the first contact plug 13 is formed on the first insulating layer 12, and a second insulating layer 15 is formed thereon. Vias 16 connected to the first metal layer 14 are formed in the second insulating layer 15.

Subsequently, a second metal layer 17 connected to the via 16 is formed on the second insulating layer 15, and a third insulating layer 18 is formed thereon. A second contact plug 19 is formed on the third insulating layer 18 to be connected to the second metal layer 17.

Subsequently, a third metal layer 20 is formed on the third insulating film 18, and a fourth insulating film 20 is formed thereon.

As described above, penetration of external moisture and impurities may be shielded by a plurality of horizontally formed contact plugs, vias and vertically formed insulating layers and metal layers.

Meanwhile, in the process of converting an optical signal into an electrical signal, an image sensor generates a dark current at low illumination, and a hydrogen annealing process is performed to improve the problem.

The hydrogen annealing process has a higher effect of improving the dark current characteristics at higher temperatures, but when the high temperature is applied to the sealing, damage such as stress is generated at the interface between the metal layers 14, 17 and 20 and a heellock is formed ( defects occur.

In particular, the damage caused by the high temperature is more severe as the area of the metal layer is wider and longer, so the effect of the damage in the sealing surrounding the chip region can be said to be fatal.

The embodiment provides a sealing method of an image sensor and a sealing manufacturing method of an image sensor having a structure capable of minimizing damage when a high temperature process such as an annealing process is performed on the image sensor.

The sealing of the image sensor according to the embodiment may include a plurality of device isolation layers formed on a semiconductor substrate outside the chip region of the image sensor to define a sealing ring region; An insulating film formed on the semiconductor substrate in the sealing region and forming a plurality of stacked structures; And a plurality of contact plugs or vias formed in a line shape to surround the chip region to form a partition structure and vertically corresponding to each other.

According to an embodiment, there is provided a method of manufacturing a sealing of an image sensor, the method comprising: forming a plurality of device isolation layers defining a sealing ring region on a semiconductor substrate outside a chip region of an image sensor; Forming a first insulating film on the semiconductor substrate in the sealing region; Forming a plurality of first contact plugs or first vias formed in a line shape on the first insulating layer to surround the chip region to form a barrier rib structure; Forming an n-th insulating film on the first insulating film; And forming an nth contact plug or an nth via on the nth insulating layer so as to vertically correspond to the first contact plug or the first via, wherein “n” is greater than 2 and several tens or less. do.

According to the embodiment, the following effects are obtained.

First, it is possible to enhance the high temperature resistance of the sealing by forming a sealing of a multi-barrier structure and a support wall structure by excluding a metal layer of a wide long elongated cylindrical structure made of aluminum, which is highly deformed with respect to thermal energy, as in the related art.

Second, as the high temperature resistance of the seal is enhanced, damage to the seal can be minimized, and the life of the packaged image sensor chip can be extended.

With reference to the accompanying drawings, the sealing of the image sensor and the sealing method of the image sensor according to the embodiment will be described in detail.

Hereinafter, in describing the embodiments, detailed descriptions of related well-known functions or configurations are deemed to unnecessarily obscure the subject matter of the present invention, and thus only the essential components directly related to the technical spirit of the present invention will be referred to. .

In the description of an embodiment according to the present invention, each layer (film), region, pattern or structure may be "on" or "under" the substrate, each layer (film), region, pad or pattern. "On" and "under" include both "directly" or "indirectly" formed through another layer, as described in do. Also, the criteria for top, bottom, or bottom of each layer will be described with reference to the drawings.

3 is a top view schematically illustrating a sealing structure of the image sensor according to the first embodiment, and FIG. 4 is a side cross-sectional view of the sealing structure based on the display line BB ′ of FIG. 3.

As shown in FIG. 3, the sealing 100 according to the first exemplary embodiment is formed to surround a chip area of an image sensor, and a scribe lane for chip separation is formed between the sealing 100 of adjacent chips. A scribe lane; cutting space 200 is formed.

Referring to FIG. 4, a trench is formed in the semiconductor substrate 110, and an isolation layer 112 is formed by filling an insulating layer in the trench. The device isolation layer 112 defines a sealing region.

A first insulating layer 120 is formed on the semiconductor substrate 110 on which the device isolation layer 112 is formed, and a plurality of first contact holes are formed in the first insulating layer 120.

Although the first contact hole has a line shape surrounding the chip region, it has been described as having a double structure in the first embodiment. However, the first contact hole may have multiple structures.

Thereafter, the first contact hole is buried to form a metal layer on the first insulating layer 120, and a process such as chemical mechanical polishing (CMP), etch back, etc. is performed to expose the first insulating layer 120. The metal layer is planarized through.

Thus, the first contact plug 122 is formed.

When the first contact plug 122 is formed, a second insulating layer 130 is formed on the first insulating layer 120, and a plurality of second contact holes are formed in the second insulating layer 130.

Like the first contact hole, the second contact hole is formed at a position corresponding to the first contact hole perpendicularly to the chip area as a line shape surrounding the chip area.

Thereafter, the second contact hole is buried to form a metal layer on the second insulating layer 130, and the metal layer is planarized so that the second insulating layer 130 is exposed.

Thus, the second contact plug 132 is formed.

When the second contact plug 132 is formed, a third insulating layer 140 is formed on the second insulating layer 130, and a plurality of third contact holes are formed in the third insulating layer 140.

The third contact hole is formed at a position corresponding to the first contact hole and the second contact hole in the form of a line surrounding the chip region like the first contact hole.

Thereafter, the third contact hole is buried to form a metal layer on the third insulating layer 140, and the metal layer is planarized so that the third insulating layer 140 is exposed.

Thus, the third contact plug 142 is formed.

Subsequently, although not shown in the drawing, a fourth insulating layer may be further formed on the third insulating layer 140.

The metal layers constituting the contact plugs 122, 132, and 142 may be formed of a material including, for example, tungsten with low thermal deformation.

In the first embodiment, the contact plugs 122, 132, and 142 are formed on the insulating layers 120, 130, and 140, but the contact plugs 122, 132, and 142 may be via according to the size and process. Of course, it can be formed into a structure.

In addition, although the contact plugs 122, 132, and 142 have been described as having a laminated structure of three layers, the contact plugs 122, 132, and 142 may be formed as a laminated structure having two or more layers.

According to the first embodiment, the sealing is carried out through the contact plugs 122, 132, and 142 of the multi-partition structure, excluding a metal layer having a wide and long flat cylindrical structure made of aluminum, which is severely deformed with respect to thermal energy as in the prior art. Formation can increase the resistance to high temperatures.

5 is a top view schematically illustrating a sealing structure of an image sensor according to a second embodiment.

Since the image sensor according to the second embodiment basically has the same configuration as the first embodiment, repeated descriptions thereof will be omitted.

However, the image sensor according to the second embodiment is different in that the contact plugs 122, 132, and 142 forming the partition structure are divided into predetermined sections and connected horizontally in a predetermined size.

That is, the plurality of contact plugs 310 are formed to vertically correspond to the insulating layers 120, 130, and 140 in a direction perpendicular to the lines formed by the contact plugs 122, 132, and 142. When shown from the upper side as shown, it is possible to form a seal of the contact plug partition structure of the "H-beam" type.

Therefore, the contact plugs 122, 132, and 142 of the barrier rib structure may be firmly supported by the contact plug 310 of the support wall structure.

In this case, it is possible to form a seal that is physically more robust as well as the side of the thermal expansion.

The present invention has been described above with reference to its preferred embodiments, which are merely examples and are not intended to limit the present invention, and those skilled in the art to which the present invention pertains should not depart from the essential characteristics of the present invention. It will be appreciated that various modifications and applications are not possible that are not illustrated above. For example, each component specifically shown in the embodiments of the present invention can be modified and implemented. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

1 is a top view schematically showing a general sealing structure of an image sensor.

FIG. 2 is a side cross-sectional view of the sealing structure based on the display line A-A 'of FIG. 1. FIG.

3 is a top view schematically illustrating a sealing structure of an image sensor according to a first embodiment;

4 is a side cross-sectional view of the sealing structure based on the display line BB ′ of FIG. 3.

Claims

A plurality of device isolation layers formed on the semiconductor substrate outside the chip region of the image sensor to define a seal ring region;

An insulating film formed on the semiconductor substrate in the sealing region and forming a plurality of stacked structures; And

A sealing of an image sensor including a plurality of contact plugs or vias formed in a line shape to surround the chip region to form a partition structure, and vertically corresponding to each other.

The method of claim 1, wherein the contact plug or the via is

Sealing of an image sensor comprising a tungsten.

The method of claim 1, wherein the contact plug or the via is

And sealing the semiconductor substrate between the device isolation layers.

The method of claim 1,

The chip of the image sensor forms a large array

Sealing of the image sensor, characterized in that the scribe lane (scribe lane) region is formed by spaced apart between the contact plug or the via of the adjacent chip region at a predetermined interval.

The method of claim 1,

Contact plugs or vias of a plurality of support wall structures formed on the insulating layer to be perpendicular to the line shape and connected horizontally by dividing the contact plugs or vias that form the partition structure into predetermined sections and vertically corresponding to each other. Sealing of the image sensor comprising a.

Forming a plurality of device isolation layers defining a seal ring region on a semiconductor substrate outside the chip region of the image sensor;

Forming a first insulating film on the semiconductor substrate in the sealing region;

Forming a plurality of first contact plugs or first vias formed in a line shape on the first insulating layer to surround the chip region to form a barrier rib structure;

Forming an n-th insulating film on the first insulating film; And

Forming an nth contact plug or an nth via on the nth insulating layer to vertically correspond to the first contact plug or the first via,

" n " is greater than 2 and several tens or less, the manufacturing method of the sealing of an image sensor.

The method of claim 6, wherein the contact plug or the via is

Sealing manufacturing method of an image sensor comprising a tungsten.

The method of claim 6, wherein the contact plug or the via is

And sealing the semiconductor substrate between the device isolation layers.

The method of claim 6,

The chip of the image sensor forms a large array

And a scribe lane region is formed between the contact plugs and the vias of adjacent chip regions at predetermined intervals to form a scribe lane region.

The method of claim 6,

In the forming of the first contact plug or the first via, the first contact plug or the first via which is formed perpendicular to the line shape on the first insulating layer and forms the partition structure is divided horizontally by a predetermined section. The first contact plugs or the first vias of the plurality of support wall structures formed to be perpendicular to each other;

The forming of the nth contact plug or the nth via may include forming an nth contact plug or an nth contact plug or a support wall structure perpendicular to the first contact plug or the first via of the support wall structure on the nth insulating layer. and n forming vias.