KR20110043351A - Liquid crystal display device and method for fabricating the same - Google Patents

Abstract

PURPOSE: A liquid crystal display device and manufacturing method thereof are provided to reduce a manufacturing cost without etching down or over s slit area applying area of a slit mask. CONSTITUTION: A substrate is included in a pixel area and an automatic probe area. A plurality of gate lines and data lines is formed in a pixel area of the substrate. A thin film transistor(104) is formed in a gate line and a data line. A plurality of second thin film transistors that is formed in the automatic probe domain of a substrate is connected to a drain electrode. A third thin film transistor(105) is used to the automatic probe inspection.

Description

Liquid crystal display and its manufacturing method {LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method of manufacturing the same. In the thin film transistor for auto probe inspection, the gate electrodes are formed to be spaced apart from each other and connected through a line to minimize the size of the gate electrode, thereby reducing the size of the thin film transistor and the auto in the pixel. When the slit mask is applied in the process of forming the thin film transistor for probe inspection together, the slit region application region of the slit mask is over (due to the difference in size and gate electrode area between the thin film transistor in the pixel and the thin film transistor for auto probe inspection). The present invention relates to a liquid crystal display device and a method of manufacturing the same, which do not cause a problem of over etching or down etching.

The application range is gradually increasing. Accordingly, the liquid crystal display device is widely used as a means for displaying a screen in portable computers, mobile phones, office automation equipment and the like.

In general, a liquid crystal display device displays a desired image on a screen by adjusting the amount of light transmitted according to image signals applied to a plurality of control switching elements arranged in a matrix.

The liquid crystal display includes a liquid crystal panel in which a color filter substrate as an upper substrate and a thin film transistor array substrate as a lower substrate are opposed to each other, and a liquid crystal layer is formed between the two substrates, and a scan signal and image information are supplied to the liquid crystal panel. It is configured to include a drive unit for operating.

A liquid crystal display device having such a configuration includes a process of forming a plurality of elements and wirings on a color filter substrate and a thin film transistor array substrate, and bonding the color filter substrate and the thin film transistor array substrate to inject liquid crystal to form a liquid crystal panel. And a plurality of processes and inspections including an auto probe inspection for inspecting the liquid crystal panel.

In the auto probe inspection, a predetermined signal is applied to the liquid crystal panel to be inspected to determine whether the pixel is normally driven or defective. In the liquid crystal panel, thin film transistors for applying a predetermined signal are formed for each gate line and data line. The auto probe inspection will be described in detail with reference to the accompanying drawings as follows.

FIG. 1 is a circuit diagram of a thin film transistor array substrate of a conventional liquid crystal display device having a thin film transistor for auto probe inspection. FIG. 2 is an enlarged plan view of a portion of FIG. 1, and FIG. Illustrations of the active layers and the n + layers of the first to third thin film transistors are omitted.

As shown in FIG. 1, a conventional liquid crystal display device includes a thin film transistor array substrate 1 in which a pixel region and an auto probe region are defined. A gate line 2 and a data line 3 formed in the pixel region of the thin film transistor array substrate 1 to define a plurality of pixels, and a gate line 2 and a data line of the pixel ( A plurality of first thin film transistors 4 formed to be connected to the gate line 2 and the data line 3 in a region where 3) intersects and a drain electrode 4e of the first thin film transistor 4 are connected to each other. The pixel electrode 11 formed for each pixel, the plurality of second thin film transistors 6 formed in the auto probe region such that the drain electrode 6e is connected to the gate line 2, and the drain electrode 5e are connected to the data line ( 3 and a plurality of third thin film transistors 5 formed in the auto probe region to be connected to the auto probe region, and the color filters corresponding to the pixels of the thin film transistor array substrate 1 disposed to face the thin film transistor array substrate 1. Containing Is composed of multiple filter layer the color filter substrate (not shown), and the thin film transistor array substrate 1 and the color liquid crystal layer (not shown) formed between the filter substrate (not shown) is formed.

Referring to FIG. 2, the gate electrodes 6a of the plurality of second thin film transistors 6 formed in the auto probe region of the thin film transistor array substrate 1 are all connected to each other so as to be parallel to the gate line 2. And a plurality of gate electrodes 5a of the plurality of third thin film transistors 5 are also connected to each other and formed in a line shape so as to be parallel to the data line 3. The gate electrode 6a of the thin film transistor 6 and the gate electrode 5a of the third thin film transistor 5 have a very large size compared with the gate electrode 4a of the first thin film transistor 4 in the pixel. .

In the general liquid crystal display device as described above, an auto probe test is performed after the thin film transistor array substrate 1 and the color filter substrate are bonded together and a liquid crystal is injected to form a liquid crystal panel. After the first test signal is input to the line 2 through the second thin film transistor 6 and the second test signal is input to the data line 3 through the third thin film transistor 5, whether the pixel is normally driven or the like. Will be examined. After the manufacturing process of the liquid crystal display device is completed, the second thin film transistor 6 and the third thin film transistor 5 remain in a state in which no signal is input and not driven.

The conventional liquid crystal display device as described above has the first thin film transistor 4 and the first thin film transistor 4 when the slit marks (not shown) are applied in the process of forming the first to third thin film transistors 4, 6, and 5 together. Due to the size difference between the second and third thin film transistors 6 and 5 and the size difference between the gate electrodes 4a, 6a and 5a, the slit region application portion of the slit mask (or halftone mask) is overetched. Or down etched.

That is, when the transmittance of the slit region of the slit mask is matched to the second and third thin film transistors 5 and 6, the slit region application site of the slit mask is the n + layer (not shown) of the first thin film transistor 4. When the layer between the source electrodes 6d and 5d and the drain electrodes 6e and 5e is removed, the active layer (not shown) exposed by the removal of the n + layer along with the removal of the n + layer is excessively removed. A problem arises, and when the transmittance of the slit region of the slit mask is matched to the first thin film transistor 4, the slit region of the slit mask in the n + layers (not shown) of the second and third thin film transistors 6 and 5. The problem arises that the n + layer is etched less than the target value during etching to remove the region between the source electrode 4d and the drain electrode 4e, which is an application site.

Accordingly, an object of the present invention is to solve the above problems, and an object of the present invention is to form the gate electrodes spaced apart from each other in the second and third thin film transistors for the auto probe inspection, and then, respectively, the first and second lines are formed. By connecting through, when the slit mask is applied in the process of forming the first thin film transistor in the pixel and the second and third thin film transistors for the auto probe inspection together, the size difference and the gate electrode size difference between the first and third thin film transistors The present invention provides a liquid crystal display device and a method of manufacturing the same, which do not cause a problem that the slit region application portion of the slit mask is over etched or down etched.

According to an exemplary embodiment of the present invention, a liquid crystal display device includes: a substrate in which a pixel region and an auto probe region are defined; A plurality of gate lines and data lines formed in the pixel region of the substrate to cross each other to define a plurality of pixels; A plurality of first thin film transistors formed to be connected to the gate line and the data line in an area where the gate line and the data line of the pixel cross each other; A plurality of second thin film transistors formed in the auto probe region of the substrate, each of the second thin film transistors being formed for each gate line such that a drain electrode is connected to the gate line and used for auto probe inspection; And a plurality of third thin film transistors formed in the auto probe region of the substrate and formed one by one for each data line such that a drain electrode is connected to the data line and used for auto probe inspection. Characterized in that configured to include. The gate electrodes of the plurality of second thin film transistors are patterned and spaced apart from each other for each second thin film transistor, and are connected to each other through a first line, and the gate electrodes of the plurality of third thin film transistors are spaced apart from each other for each third thin film transistor. Patterned and connected to each other via a second line.

According to an exemplary embodiment of the present invention, a gate electrode of a plurality of first thin film transistors is formed in a pixel region on a substrate, and a plurality of gate electrodes are formed in an auto probe region on a substrate. Gate electrodes spaced apart from each other of the second thin film transistor, gate electrodes spaced apart from each other of the plurality of second thin film transistors, first lines connecting the gate electrodes of the plurality of second thin film transistors to each other, and a plurality of third thin films Forming a gate line spaced apart from each other of the transistor and a second line connecting the gate electrode of the third thin film transistor to each other; Forming a gate insulating film; Forming an active layer forming layer, an n + layer forming layer, a source / drain forming layer, and a photosensitive film on the gate insulating film; Photolithography using a mask in which blocking regions are provided in regions corresponding to the source and drain electrodes of the first to third thin film transistors to be formed later, and slit regions are provided in the regions corresponding to the source and drain electrodes to be formed later. Forming a first photoresist pattern in which a region corresponding to the transmission region of the mask is removed; Selectively removing an active layer forming layer, an n + layer forming layer, and a source / drain forming layer using the first photoresist pattern to form an active layer and an n + layer; Removing a region of the first photoresist pattern corresponding to the slit region of the mask to form a second photoresist pattern; And selectively removing the source / drain forming layer using the second photoresist pattern to form a source electrode and a drain electrode, and removing an entire region corresponding to the source electrode and the drain electrode from the n + layer. It is made, including.

According to an exemplary embodiment of the present invention, a liquid crystal display and a method of manufacturing the same have a structure in which a gate electrode of a second thin film transistor for auto probe inspection is spaced apart from each other, thereby minimizing the size of the gate electrode and forming a third electrode. By forming the gate electrodes of the thin film transistors to be spaced apart from each other to minimize the size of the gate electrode, the size difference and the gate electrode between the first thin film transistor and the second and third thin film transistors in the process of forming the first to third thin film transistors together Due to the size difference, the problem that the slit area application portion of the mask is removed more or less than the target value during etching is minimized.

Accordingly, in the process of forming the first to third thin film transistors, a slit including a plurality of slit regions having the same transmittance without using a multi-tone mask including a plurality of slit regions having different transmittances is formed. Since a mask (or half-tone mask) can be used, manufacturing cost can be reduced.

Hereinafter, a liquid crystal display and a manufacturing method thereof according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First, a liquid crystal display according to a preferred embodiment of the present invention will be described with reference to FIGS. 3 and 4 as follows.

3 and 4, a liquid crystal display according to an exemplary embodiment of the present invention includes a first substrate 101 in which a pixel region and an auto probe region are defined; A plurality of gate lines 102 and data lines 103 formed in the pixel areas of the first substrate 101 to cross each other to define a plurality of pixels; A plurality of first thin film transistors 104 formed to be connected to the gate line 102 and the data line 103 in a region where the gate line 102 and the data line 103 of the pixel cross each other; A plurality of second thin film transistors formed in the auto probe region of the first substrate 101, one drain electrode 106e is formed for each gate line 102 to be connected to the gate line 102, and are used for the auto probe inspection. 106; And a plurality of third thin film transistors 105 formed in the auto probe region of the substrate and formed one by one for each data line 103 so that the drain electrode 105e is connected to the data line 103. Characterized in that configured to include. The gate electrodes 106a of the plurality of second thin film transistors 106 are patterned and spaced apart from each other for each of the second thin film transistors 106, and are connected to each other through the first line 108. The gate electrode 105a of the transistor 105 is patterned spaced apart from each other for each third thin film transistor 105 and connected to each other through the second line 107.

Each component of the liquid crystal display according to the preferred embodiment of the present invention having such a configuration will be described in detail as follows.

A liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel including a first substrate 101 which is a thin film transistor array substrate and a second substrate which is a color filter substrate (not shown), and the first substrate of the liquid crystal panel. A liquid crystal layer (not shown) is formed between the second substrate and the second substrate.

A pixel region and an auto probe region are defined on the first substrate 101, and a plurality of gate lines 102 and a plurality of data lines 103 cross each other in the pixel region of the first substrate 101. Pixels are provided.

The first thin film transistor 104 is formed in an area where the gate line 102 and the data line 103 of each pixel cross each other.

The first thin film transistor 104 may include a gate electrode 104a formed on the first substrate 101, a gate insulating film 109 formed on the gate electrode 104a, and a gate insulating film 109. An active layer 104b, an n + layer 104c formed on the active layer 104b, and a source electrode 104d and a drain electrode 104e formed on the n + layer 104c and spaced apart from each other. The protective layer 110 is formed on the first thin film transistor 104 having such a configuration.

On the first substrate 101 on which the first thin film transistor 104 and the protective layer 110 are formed, the first thin film transistor 104 and the drain electrode 104e of the first thin film transistor 104 are connected through a contact hole formed in the protective layer 110. The pixel electrode 111 is formed for each pixel.

Although not shown, a common electrode supplied with a common voltage is formed on the second substrate (not shown), and the common voltage supplied to the common electrode is perpendicular to the pixel signal supplied to the pixel electrode 111. An electric field is formed to drive the liquid crystal layer. In this case, the common electrode is formed on the second substrate as an example for convenience of description, and the common electrode is formed on the first substrate so that the common voltage applied to the common electrode is applied to the pixel electrode 111. The liquid crystal may be driven by forming a horizontal electric field together with the pixel signal.

In the auto probe region of the first substrate 101, a second thin film transistor 106 is provided for each gate line 102 so that the drain electrode 106e is connected to the gate line 102.

The second thin film transistor 106 is formed on the gate electrode 106a formed on the first substrate 101, the gate insulating film 109 formed on the gate electrode 106a, and the gate insulating film 109. An active layer 106b, an n + layer 106c formed on the active layer 106b, and a source electrode 106d and a drain electrode 106e formed on the n + layer 106c and spaced apart from each other. It is composed.

The gate electrodes 106a of the plurality of second thin film transistors 106 are patterned to be spaced apart from each other for each of the second thin film transistors 106, and the gate electrodes 106a of the plurality of second thin film transistors 106 are firstly formed. Are connected to each other via line 108.

The first line 106 is formed in a direction parallel to the data line 103, and is formed to be connected to each other with the same material on the same layer as the gate electrode 106a of the second thin film transistor 106. The gate electrode 104a and the gate line 102 of the transistor 104 are formed of the same material on the same layer.

The source electrode 106d and the drain electrode 106e of the second thin film transistor 106 are the source electrode 104d and the drain electrode 104e of the first thin film transistor 104, and the second thin film transistor 106. The source electrode 106d, the drain electrode 106e, and the data line 103 are formed of the same material on the same layer, and the gate line 102 is connected through a contact hole formed in the gate insulating film 109.

In the auto probe region of the first substrate 101, a third thin film transistor 105 is provided for each data line 103 so that the drain electrode 105e is connected to the data line 103.

The third thin film transistor 105 is formed on the gate electrode 105a formed on the first substrate 101, the gate insulating film 109 formed on the gate electrode 105a, and the gate insulating film 109. An active layer 105b, an n + layer 105c formed on the active layer 105b, and a source electrode 105d and a drain electrode 105e formed on the n + layer 105c and spaced apart from each other. It is composed.

The gate electrodes 105a of the plurality of third thin film transistors 105 are patterned to be spaced apart from each other for each of the third thin film transistors 105, and the gate electrodes 105a of the plurality of third thin film transistors 105 are secondly formed. Are connected to each other via line 107.

The second line 107 is formed in a direction parallel to the gate line 102, and is formed to be connected to each other with the same material on the same layer as the gate electrode 105a of the third thin film transistor 105. The gate electrode 104a and the gate line 102 of the transistor 104 are formed of the same material on the same layer.

The source electrode 105d and the drain electrode 105e of the third thin film transistor 105 are the source electrode 104d and the drain electrode 104e and the first thin film transistor 104 of the first thin film transistor 104. The source electrode 104d and the drain electrode 104e and the data line 103 are formed of the same material on the same layer.

Although not shown in detail, a color including a color filter corresponding to a pixel defined on the first substrate 101 on a second substrate (not shown) facing the first substrate 101 having the above-described configuration. A filter layer (not shown) is formed, and a black matrix (not shown) is formed on at least the gate line 102, the data line 103, the first thin film transistor 104, and the auto probe region on the first substrate 101. .

In the above description of the liquid crystal display according to the exemplary embodiment of the present invention, the second thin film transistor 106 on the gate line 102 side and the third thin film transistor 105 on the data line 103 side for auto probe inspection. ), But the present invention is not limited thereto, and the gate driver for driving the gate line 102 is directly gated on a first substrate 101 (GIP). In the case where the free area is not secured and the second thin film transistor 106 on the gate line 102 side is not formed, but only the third thin film transistor 105 on the data line 103 side is formed. Etc. Various embodiments will be possible without departing from the spirit of the invention.

Hereinafter, a method of manufacturing a liquid crystal display device according to an exemplary embodiment of the present invention will be described with reference to FIGS. 5A to 5F.

5A through 5F illustrate a cross-sectional view of a part of a manufacturing process of the first thin film transistor 104 and the third thin film transistor 105 of FIG. 4, and the drain electrode 106e of the second thin film transistor 106 contacts. The remaining structure is the same as that of the third thin film transistor 105 except that it is connected to the gate line 102 through the hole, and thus not illustrated. Therefore, in the following description of the manufacturing process of the liquid crystal display according to the preferred embodiment of the present invention, reference to FIG. 3 will be described with reference to the second thin film transistor 106.

First, the gate electrodes 104a of the plurality of first thin film transistors 104, the gate electrodes 106a of the plurality of second thin film transistors 106, and the gate electrodes of the plurality of second thin film transistors 106. The first line 108 connecting the 106a to each other, the gate electrodes 105a of the plurality of third thin film transistors 105 and the gate electrodes 105a of the plurality of third thin film transistors 105 are connected to each other. The first substrate 101 on which the second line 107, the gate line 102, and the gate insulating film 109 are connected to each other is prepared.

Next, as shown in FIG. 5A, the gate electrode 104a of the first thin film transistor 104, the gate electrode 106a of the second thin film transistor 106, the first line 108, and the third thin film transistor are shown. An active layer forming layer 121, n + on the first substrate 101 on which the gate electrode 105a, the second line 107, the gate line 102 and the gate insulating film 109 are formed. After the layer forming layer 122, the source / drain forming layer 123, and the photosensitive film 124 are formed in this order, the mask 125 having the blocking region, the slit region (or semi-transmissive region), and the exposed region is formed. Photolithography is used to form a first photoresist pattern 124a as shown in FIG. 5B. Here, the portion of the first photoresist layer pattern 124a that corresponds to the exposed region of the mask 125 is entirely removed, and the portion of the first photoresist pattern 124a that corresponds to the slit region is removed only by a predetermined thickness.

The mask 125 may include the source electrodes 104d, 106d and 105d, the drain electrodes 104e, 106e and 105e and the data lines of the first to third thin film transistors 104, 106 and 105 to be formed in a later step. A blocking region is provided in a region corresponding to 103, a diffraction region is provided in a region between the source electrodes 104d, 106d, and 105d and the drain electrodes 104e, 106e, and 105e, and an exposed region is provided in the remaining regions.

Next, as shown in FIG. 5C, the active layer forming layer 121, the n + layer forming layer 122, and the source / drain forming layer 123 are formed using the first photosensitive film pattern 124a. It is selectively removed through etching to form the active layer 104b and the n + layer 104c.

Next, as illustrated in FIG. 5D, a region corresponding to the slit region of the mask 125 is removed from the first photoresist pattern 124a to form a second photoresist pattern 124b.

Next, as illustrated in FIG. 5E, the source / drain forming layer 123 is selectively removed by etching using the second photoresist layer pattern 124b to form a source electrode of the first thin film transistor 104. 104d) and the drain electrode 104e, the source electrode 106d and the drain electrode 106e of the second thin film transistor 106, the source electrode 105d and the drain electrode 105e of the third thin film transistor 105 And forming a data line 103 and selectively etching a region located between the source electrodes 104d, 106d and 105d and the drain electrodes 104e, 106e and 105e among the n + layers 10ec, 106c and 105c by etching. After removal, the second photosensitive film pattern 124b is removed. In this case, an area between the source electrodes 104d, 106d and 105d and the drain electrodes 104e, 106e and 105e of the active forming layer 121 may be removed together with a predetermined thickness.

Next, as shown in FIG. 5F, the protective layer 110 is formed on the first substrate 101 on which the gate line 102, the data line 103, and the first to third thin film transistors 104, 106, and 105 are formed. ) And a contact hole exposing the drain electrode 104e of the first thin film transistor 104 to the protective layer 110, and then forming a pixel electrode 111 on the protective layer 110 to form a protective layer. It is connected to the drain electrode 104e of the first thin film transistor 104 through the contact hole of 110.

As described above, the present invention forms the gate electrode 106a of the second thin film transistor 106 for auto probe inspection to be spaced apart from each other, thereby minimizing the size of the gate electrode 106a and the gate of the third thin film transistor 105. By forming the electrodes 105a to be spaced apart from each other to minimize the size of the gate electrode 105a, the first thin film transistors 104 and the first thin film transistors 104, 106, and 105 are formed together. Due to the size difference between the second and third thin film transistors 106 and 105 and the size difference between the gate electrodes 104a, 106a and 105a, the slit region application portion of the mask 125 may be over etched or down during etching. ) The problem of etching is minimized, so that a plurality of slit regions having the same transmittance can be included without using a multi-tone mask including a plurality of slit regions having different transmittances. Since using a slit mask (or a half-tone mask), the production costs are to be reduced.

1 is a circuit diagram of a thin film transistor array substrate provided in a conventional general liquid crystal display device.

FIG. 2 is an enlarged plan view of a portion of the thin film transistor array substrate of FIG. 2. FIG.

3 is a plan view illustrating a first substrate provided in a liquid crystal display according to a preferred embodiment of the present invention.

FIG. 4 is a cross-sectional view illustrating a cross section taken along lines II ′ and II ′ of FIG. 3.

5A-5F are cross-sectional views illustrating a portion of a method of manufacturing the first substrate of FIG. 4.

** Description of the symbols for the main parts of the drawings **

101: first substrate 102: gate line

103: data line 104; First thin film transistor

105: third thin film transistor 106: second thin film transistor

107: second line 108: first line

109: gate insulating film 110: protective layer

111 pixel electrode 121 active layer forming layer

122: layer for forming an n + layer 123: layer for forming a source / drain

124: photosensitive film 124a: first photosensitive film pattern

124b: second photosensitive film pattern 125: mask

Claims (10)

A substrate in which a pixel region and an auto probe region are defined; A plurality of gate lines and data lines formed in the pixel region of the substrate to cross each other to define a plurality of pixels; A plurality of first thin film transistors formed to be connected to the gate line and the data line in an area where the gate line and the data line of the pixel cross each other; A plurality of second thin film transistors formed in the auto probe region of the substrate, each of the second thin film transistors being formed for each gate line such that a drain electrode is connected to the gate line and used for auto probe inspection; And A third thin film transistor formed in the auto probe region of the substrate and formed one by one for each data line such that a drain electrode is connected to the data line and used for auto probe inspection; It is configured to include, The gate electrodes of the plurality of second thin film transistors are patterned spaced apart from each other for each of the second thin film transistors and are connected to each other through a first line, and the gate electrodes of the plurality of third thin film transistors are spaced apart from each other for each of the third thin film transistors. And connected to each other via a second line. The liquid crystal display of claim 1, wherein the first line is formed of the same material on the same layer as the gate electrode of the second thin film transistor. The liquid crystal display of claim 2, wherein the first line is formed of the same material as the gate electrode and the gate line of the first thin film transistor. The liquid crystal display of claim 1, wherein the second line is formed of the same material as the gate electrode and the gate line of the third thin film transistor. The liquid crystal display of claim 1, wherein the second line is formed of the same material as the gate electrode and the gate line of the first thin film transistor. A substrate in which a pixel region and an auto probe region are defined; A plurality of gate lines and data lines formed in the pixel region of the substrate to cross each other to define a plurality of pixels; A plurality of first thin film transistors formed to be connected to the gate line and the data line in an area where the gate line and the data line of the pixel cross each other; And A plurality of second thin film transistors formed in the auto probe region of the substrate and formed one by one for each data line such that a drain electrode is connected to the data line and used for auto probe inspection; It is configured to include, The gate electrodes of the plurality of second thin film transistors are patterned and spaced apart from each other for each second thin film transistor, and are connected to each other through a first line. 7. The liquid crystal display device according to claim 6, wherein the first line is formed of the same material on the same layer as the gate electrode of the second thin film transistor. 8. The liquid crystal display device according to claim 7, wherein the first line is formed of the same material as the gate electrode and the gate line of the first thin film transistor. Forming gate electrodes of the plurality of first thin film transistors in a pixel region on the substrate, spaced-apart gate electrodes of the plurality of second thin film transistors in an auto probe region on the substrate, and gate electrodes spaced apart from each other of the plurality of second thin film transistors And a first line connecting the gate electrodes of the plurality of second thin film transistors to each other, a gate electrode spaced apart from each other, and a second line connecting the gate electrodes of the third thin film transistors to each other. Forming a; Forming a gate insulating film; Forming an active layer forming layer, an n + layer forming layer, a source / drain forming layer, and a photosensitive film on the gate insulating film; Photolithography using a mask in which blocking regions are provided in regions corresponding to the source and drain electrodes of the first to third thin film transistors to be formed later, and slit regions are provided in the regions corresponding to the source and drain electrodes to be formed later. Forming a first photoresist pattern in which a region corresponding to the transmission region of the mask is removed; Selectively removing an active layer forming layer, an n + layer forming layer, and a source / drain forming layer using the first photoresist pattern to form an active layer and an n + layer; Removing a region of the first photoresist pattern corresponding to the slit region of the mask to form a second photoresist pattern; And Selectively removing the source / drain forming layer using the second photoresist pattern to form a source electrode and a drain electrode, and removing an entire region corresponding to the source electrode and the drain electrode from the n + layer; Method of manufacturing a liquid crystal display device comprising a. 10. The method of claim 9, wherein in the removing of the entire region corresponding to the source electrode and the drain electrode from the n + layer, the region corresponding to the source electrode and the drain electrode in the active layer is removed together with a predetermined thickness. Method of manufacturing a liquid crystal display device.

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