KR20110011053A - Back contact solar cells and method for manufacturing thereof - Google Patents

Abstract

PURPOSE: A rear electrode solar cell and a manufacturing method thereof are provided to improve a response property in a short wavelength by moving the charge of a silicon wafer along a hole where a transparent conductive layer and a conductive material are filled. CONSTITUTION: A hole is formed on a semiconductor substrate. An emitter region is formed by doping impurities to the entire area of the semiconductor substrate. The conductive material is filled in the hole. A TCO(Transparent Conducting Oxide) layer(108) is formed in the front side of the semiconductor substrate. A base electrode(110) is formed in the rear side of the semiconductor substrate.

Description

Back electrode solar cell and method for manufacturing same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a back electrode solar cell, and more particularly, to a back electrode solar cell in which a hole formed in a semiconductor substrate is filled with a conductive material and a TCO layer is formed on the front surface of the semiconductor substrate.

The electrodes of the solar cell are formed on the front and rear surfaces of the solar cell, respectively, but the electrodes formed on the front face reduce the shadowing loss to sunlight.

Therefore, in order to improve the efficiency of solar cells, the general trend is to narrow the area of the electrode formed on the front surface to have a fine pattern as much as possible. However, even in this case, sunlight does not absorb as much as the electrode area formed on the front surface.

Therefore, in order to fundamentally eliminate the reduction of absorption by the electrode at the front of the solar cell, a solar cell having a back electrode structure in which all the electrodes are installed at the rear has been developed.

The back electrode solar cell has a structure in which electrons generated by sunlight incident on the front surface of the silicon wafer are transferred to an electrode formed on the back surface across the inside of the silicon wafer.

However, when the electrons generated on the front surface of the silicon wafer are transferred to the electrode formed on the back surface, most of the electrons are not transferred due to the internal resistance due to the thickness of the silicon wafer. This leads to a decrease in efficiency of the solar cell.

To solve this problem, high-quality, expensive silicon wafers must be used, but the price of solar cells is inevitably raised.

Therefore, a structure for improving charge collection rate by processing holes in silicon wafers has been proposed, and an example is EWT solar cell of 'Advent Solar'.

1 is a schematic diagram of an EWT solar cell of 'Advent Solar'.

Referring to FIG. 1, an EWT solar cell has holes 2 processed in a silicon wafer 1, and portions of the front and rear surfaces of the silicon wafer 1 ′ formed thereon, and emitter diffusion regions 3 around the holes. Is formed. The base electrode 5 and the emitter electrode 7 are formed on the rear surface. For reference, although the silicon wafer is indicated as 1 'due to the hole 2 processing, it is actually a single cell silicon wafer.

As shown in FIG. 1, since a pn junction is formed around the front and rear portions of the silicon wafer 1 ′ and around the hole, the charge generated by the incident solar light is transmitted through the emitter diffusion region 3. It can move smoothly.

This has the advantage of not having to use a high-quality, expensive wafer in order to improve efficiency in the general back-electrode solar cell structure described above.

However, EWT solar cells of 'Advent Solar' have the following problems.

That is, the emitter diffusion region has a relatively high resistance value. This makes the transfer of charges difficult and results in loss. Therefore, in order to shorten the movement distance of the charge as much as possible, as many holes should be formed in the silicon wafer.

If a high concentration of doping is performed to reduce the resistance of the emitter diffusion region, short wavelength light incident on the front surface of the silicon wafer is absorbed, thereby degrading the optical response characteristic, in particular, the 'blue response' effect.

As a result, on the basis of this, the resistance value of the optimized emitter diffusion region in a typical '12 .5 cm x 12.5 cm 'silicon wafer can be determined, which is about 30 to 50 mW / cm ² and the number of holes is about 15000. Must be at least

Therefore, the conventional EWT solar cell has to process about 15,000 or more holes, causing a problem that the productivity is reduced by that.

Accordingly, an object of the present invention is to solve the above problems, and to facilitate the transfer of charges while reducing the resistance loss in the back electrode solar cell.

Another object of the present invention is to form a relatively small number of holes in a silicon wafer.

According to a feature of the present invention for achieving the above object, forming a hole in the semiconductor substrate; An emitter region forming step of forming an emitter region by doping impurities to the entire area of the semiconductor substrate; A filling step of filling a conductive material in the hole; Forming a transparent conducting oxide (TCO) on the entire surface of the semiconductor substrate; And an electrode forming step of forming a base electrode on a rear surface of the semiconductor substrate.

The conductive material filled in the hole is used as an emitter electrode.

In the filling step, the conductive material may be replaced by a TCO material.

Filling the TCO material in the hole should form an emitter electrode in the electrode forming step.

An emitter removing step of removing the emitter formed on the rear surface of the semiconductor substrate after the filling step; Forming a passivation layer on a back surface of the semiconductor substrate; A contact hole forming step of forming a contact hole in the passivation layer; The electrode forming step may be performed to form an electrode in the formed contact hole.

The emitter is formed by performing shallow doping at low concentrations.

According to another feature of the invention, the semiconductor substrate is impurity doping in the form of a hole (hole); A conductive material filled in the hole; A transparent conductive film (TCO) formed on the entire surface of the semiconductor substrate; And a base electrode and an emitter electrode formed on the rear surface of the semiconductor substrate.

The number of holes formed in the semiconductor substrate is 40 pieces / cm 2 or less.

The conductive material is a material forming a metal or a transparent conductive film (TCO).

The transparent conductive film is indium tin oxide (ITO), aluminum zinc oxide (AZO), indium zinc oxide (IZO: indium zinc oxide), gallium and zinc oxide (GZO: gallium zinc oxide). .

In the present invention, an emitter is formed by doping an impurity doped to a semiconductor substrate in which a hole is formed in a solar cell having an EWT structure, and then filling a hole with a conductive material and forming a TCO layer on the entire surface of the semiconductor substrate. In addition, a base electrode and an emitter electrode are formed on the rear surface of the semiconductor substrate. In this way, the charge generated by the light incident on the front surface of the semiconductor substrate is moved to the electrode along the TCO layer and the conductive material rather than the emitter.

Therefore, the resistance loss is lowered compared to the conventional EWT solar cell, and the emitter layer can be doped at a low concentration, thereby improving the response characteristics at short wavelengths.

In addition, due to such a characteristic, when forming holes in a semiconductor substrate, the number of holes may be less than that of a solar cell having a conventional EWT structure. This can reduce process time and cost, and can be expected to increase production efficiency during production.

Hereinafter, a preferred embodiment of a back cell solar cell of the present invention and a method of manufacturing the same will be described in detail with reference to the accompanying drawings. The present invention is to facilitate the transfer of charge as an electrode in the back electrode, especially in the solar cell of the EWT structure than the conventional.

2 is a cross-sectional view illustrating a process of a back cell solar cell according to a first embodiment of the present invention.

FIG. 2A is a silicon wafer having a predetermined conductivity type that has completed saw damage etching and texturing to manufacture a solar cell.

As shown in FIG. 2B, a plurality of holes are formed in the silicon wafer. At this time, the number of the holes is relatively less than about 15000 formed in the silicon wafer of the '12 .5cm × 12.5cm 'size. This is possible because the relationship between the resistance loss and the short wavelength response characteristic of the EWT solar cell is improved according to the present embodiment. 2B is a silicon wafer in which various damages and the like generated during hole formation are removed together with hole formation. That is, after the hole is formed, a damage removal etching is performed to remove various damages. The removal process may be performed during the saw damage etching process of FIG. 2A. That is, some of the processes of FIGS. 2A and 2B may be changed in order.

In FIG. 2B, although the silicon wafer 100 appears to be divided into a plurality in the drawing, in practice, the hole 102 is formed in one silicon wafer 100. However, for convenience of description, the silicon wafer 100 divided by the holes 102 will be denoted by reference numeral 100 ′. In the following description, the silicon wafer will be described with reference numeral 100 or 100 '.

Next, as shown in FIG. 2C, the emitter layer 104 is formed by doping impurities to the entire surface of the silicon wafer 100 ′. That is, p-n junctions are formed on the front, rear, and side surfaces of the silicon wafer 100 ′ (ie, the portions in contact with the holes). In the impurity doping, phosphorus is implanted when the silicon wafer 100 'is p-type, and boron is implanted when the silicon wafer 100' is n-type to form the emitter layer 104. In this case, the impurities may be shallowly doped to allow the emitter layer 104 to be lightly doped. This is because the charge generated in the silicon wafer 100 'does not move through the emitter layer 104 but through the TCO layer 108 described below. Therefore, low concentration doping of the emitter layer 104 is possible. This becomes a factor for improving the short wavelength response characteristic of the silicon wafer 100 '. The silicon wafer 100 'of FIG. 2C is either a PSG (in the case of an n-type emitter) or a BSG (P-), which is a silicon oxide film formed on the surface of the silicon wafer 100' when the emitter layer 104 is formed. The type emitter is also removed. For reference, in the present exemplary embodiment, the emitter layer formed on the front surface of the silicon wafer 100 'will be described as a' front emitter layer 'and the emitter layer formed on the back surface will be referred to as a' back emitter layer '.

When the formation of the holes 102 in the silicon wafer 100 ′ is completed, a conductive material is filled in the hole 102 and sintered to form a hole as illustrated in FIG. 2D. In this case, the conductive material serves as the emitter electrode 106, and a metal paste may be used as an example of the material to be used.

Meanwhile, when the conductive material is filled in the hole 102 to perform the function of the emitter electrode 106, the conductive material may be formed in the shape of an electrode on the rear surface of the silicon wafer 100 ′. . In addition, instead of the metal paste, a material for forming a transparent conducting oxide (TCO) may be used. If a TCO material is used, a process of forming the emitter electrode 106 should be performed when forming the base electrode 110 to be described below.

Next, after the conductive material is filled in the hole 102, a transparent conducting oxide (TCO) 108 is formed on the entire surface of the silicon wafer 100 ′. The TOC layer 108 is substantially formed over the portion of the hole 102 filled with the front emitter layer and the conductive material. This state is shown in FIG. 2E. The TCO layer 108 is formed using a vacuum deposition method, a spray method, or the like.

On the other hand, the TCO layer 108 is preferably a material having a low specific resistance, performs a passivation function on the surface, and has a low reflectance of light incident on the surface. Examples include Indium Tin Oxide (ITO), Aluminum Zinc Oxide (AZO), Indium Zinc Oxide (IZO), and Gallium Zinc Oxide (GZO). Thus, the TCO layer 108 may be provided as a transfer path of charge on the front surface of the silicon wafer 100 ′.

Next, the base electrode 100 must be formed on the back surface of the silicon wafer 100 ′. To this end, except for the part of the emitter electrode 106 formed on the back surface of the silicon wafer 100 ′, the remaining back emitter layer is removed by an etching method such as wet etching or dry etching. The silicon wafer 100 ′ removed to the back emitter layer is shown in FIG. 2F. Of course, a contact hole may be formed in a portion where the base electrode 110 is to be formed without removing the back emitter layer.

When the back emitter layer is removed as shown in FIG. 2F, the base electrode 110 is formed on the back surface of the silicon wafer 100 ′ as shown in FIG. 2G. The base electrode 110 may be formed by a known electrode forming method or the like.

In the solar cell completed according to the above process, the charge generated in the silicon wafer 100 is moved to the emitter electrode 106 along the portion of the hole 102 filled with the TCO layer 108 and the conductive material. That is, when solar light is applied to the entire surface of the silicon wafer 100, charges are generated, and the generated charges do not move through the emitter layer 104 doped in the silicon wafer 100, but along the TCO material and the conductive material. To move. This can reduce the resistance loss and improve the short wavelength response characteristics of the incident light. In addition, due to the above characteristics, the number of holes may be relatively smaller than that of the solar cell having the conventional EWT structure.

3 is a cross-sectional view illustrating a process of a back cell solar cell according to a second embodiment of the present invention. In describing the second embodiment, the same process as the first embodiment described above will be briefly described.

3A illustrates a silicon wafer 200 having a predetermined conductivity type.

As shown in FIG. 3B, a plurality of holes 201 are formed in the silicon wafer 200. In FIG. 3B, after the hole 201 is formed, a saw damage etching process, a damage removal etching process, a texturing process, and a cleaning process are performed.

Then, as shown in FIG. 3C, the emitter layer 202 is formed by doping impurities with respect to the entire surface of the silicon wafer 200 ′, and the PSG or BSG, which is a silicon oxide film generated when the emitter layer 202 is formed, is removed.

Thereafter, as illustrated in FIG. 3D, the conductive material 204 is filled in the hole 201 and sintered. In this case, the conductive material 204 fills horizontally with the front emitter layer and the back emitter layer as shown in the drawing.

After the conductive material is filled in the hole 201, a TCO layer 206 is formed on the entire surface of the silicon wafer 200 ′ as shown in FIG. 3E. The TCO layer 206 is formed substantially over the surface of the front emitter layer and the hole portion filled with the conductive material.

When the TCO layer 206 is formed, a back emitter layer is removed as shown in FIG. 3F, and a passivation layer 208 is formed on the removed portion as shown in FIG. 3G.

3H illustrates that a contact hole 210 for forming a base electrode and an emitter electrode is formed in the passivation layer 208. The contact hole 210 may be formed using an etching method after forming an electrode pattern mask on the passivation layer 208 or may be formed directly using a laser.

When the contact hole 210 is formed as shown in FIG. 3H, a backside field (BSF) 212 is formed on the surface of the silicon wafer 200 ′ through the contact hole 210 as shown in FIG. 3I. The back surface field 212 separates charges formed in the silicon wafer 200 'to the back side more efficiently. The back field 212 is generally formed by a high temperature heat treatment process.

The base electrode 214 and the emitter electrode 215 are formed through the contact hole 210. An example formed up to the electrode is shown in Fig. 3J.

This process completes the solar cell.

The TCO layer 206 may be formed after the passivation layer 208 is formed. That is, the TCO layer 206 of FIG. 3E may be formed in any of the processes after the process of FIG. 3D, but the process may be performed in an order that is not subjected to thermal damage and chemical damage by a later process. Most preferably, the portion of the TCO layer 206 is formed after the back field (BSF) 212 of FIG. 3J is formed. This may reduce damage to the TCO layer 206 due to the high temperature heat treatment process when forming the back field (BSF) 212.

In the second embodiment, since the TCO layer 206 is formed on the entire surface of the silicon wafer 200, and the hole 201 formed in the silicon wafer 200 is filled with a conductive material, the TCO layer 206 and The charge generated in the silicon wafer 200 moves along the hole 201 filled with the conductive material to the rear electrode.

Meanwhile, in the present exemplary embodiment, the conductive material filled in the holes 102 and 201 formed in the silicon wafers 100 and 200 may be provided by combining two conductive materials. That is, the conductive material is filled with the holes 102 and 201 and then bonded to the emitter layers 104 and 202 which are in contact with the holes 102 and 201 through a process such as sintering. Therefore, a portion of the emitter layers 104 and 202 that is in contact with the surface of the emitter layers 104 and 202 may be formed of a conductive material that is easily bonded to the emitter layers 104 and 202, and the remaining portions may be combined with a conductive material that is easy to transfer charges. have.

Further, a silicon nitride film and an anti-reflection film may be further formed on the TCO layers 108 and 206.

As described above, in the conventional EWT solar cell structure, the present invention allows the rear electrode to move along the conductive material filled in the TCO layer and the hole without using an emitter layer, which is a charge transfer path. It is possible to improve the resistance loss and short-wave response characteristics, which are disadvantages. In addition, the number of holes in the silicon wafer can be reduced by that much.

The rights of the present invention are not limited to the embodiments described above, but are defined by the claims, and those skilled in the art can make various modifications and adaptations within the scope of the claims. It is self-evident.

1 is a schematic configuration diagram of an EWT solar cell of 'Advent Solar'

2 is a cross-sectional view illustrating a process of a back cell solar cell according to a first embodiment of the present invention.

3 is a cross-sectional view illustrating a process of a back cell solar cell according to a second embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

100 silicon wafer 102 hall

104 emitter layer 106 conductive material, emitter electrode

108: TCO layer 110: base electrode

Claims (10)

Forming a hole in the semiconductor substrate; An emitter region forming step of forming an emitter region by doping impurities to the entire area of the semiconductor substrate; A filling step of filling a conductive material in the hole; Forming a transparent conducting oxide (TCO) on the entire surface of the semiconductor substrate; And, And forming an electrode on the back surface of the semiconductor substrate. The method of claim 1, The conductive material filled in the hole is a method of manufacturing a back electrode solar cell, characterized in that used as an emitter electrode. The method of claim 1, In the filling step, a method of manufacturing a back-electrode solar cell, characterized in that the filling by replacing the conductive material with a TCO material. The method of claim 3, wherein When the TCO material is filled in the hole, a method of manufacturing a back electrode solar cell, characterized in that to form an emitter electrode in the electrode forming step. The method of claim 4, wherein An emitter removing step of removing the emitter formed on the rear surface of the semiconductor substrate after the filling step; Forming a passivation layer on a back surface of the semiconductor substrate; A contact hole forming step of forming a contact hole in the passivation layer; And, A method of manufacturing a back electrode solar cell, which can be performed by an electrode forming step of forming an electrode in the formed contact hole. 3. The method of claim 2, And said emitter region is formed by performing shallow doping at low concentration. A semiconductor substrate having impurity doping in a state in which a hole is formed; A conductive material filled in the hole; A transparent conductive film (TCO) formed on the entire surface of the semiconductor substrate; And, And a base electrode and an emitter electrode formed on the rear surface of the semiconductor substrate. The method of claim 7, wherein The number of holes formed in the semiconductor substrate is less than 40 / cm 2 back electrode solar cell, characterized in that. The method of claim 7, wherein The conductive material is a back electrode solar cell, characterized in that the material forming a metal or transparent conductive film (TCO). The method of claim 7, wherein The transparent conductive film (TCO) may be formed of indium tin oxide (ITO), aluminum zinc oxide (AZO), indium zinc oxide (IZO: Indium Zinc Oxide), gallium and zinc oxide (GZO: Gallium). Back electrode solar cell, characterized in that zinc oxide.

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