KR20100078221A - Image sensor and manufacturing method of image sensor - Google Patents

Image sensor and manufacturing method of image sensor Download PDF

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Publication number
KR20100078221A
KR20100078221A KR1020080136418A KR20080136418A KR20100078221A KR 20100078221 A KR20100078221 A KR 20100078221A KR 1020080136418 A KR1020080136418 A KR 1020080136418A KR 20080136418 A KR20080136418 A KR 20080136418A KR 20100078221 A KR20100078221 A KR 20100078221A
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KR
South Korea
Prior art keywords
etching process
trench
forming
image sensor
depth
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KR1020080136418A
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Korean (ko)
Inventor
김종만
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주식회사 동부하이텍
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Priority to KR1020080136418A priority Critical patent/KR20100078221A/en
Publication of KR20100078221A publication Critical patent/KR20100078221A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1463Pixel isolation structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689MOS based technologies

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

In another aspect, a method of manufacturing an image sensor includes: forming a photodiode on a semiconductor substrate; Forming a trench having a depth of 8 to 10 times the depth of the photodiode in the semiconductor substrate region between the photodiodes through a first etching process using a dry etching method; Extending both sides of the trench by the first etching process into a trapezoidal shape through a second etching process using a wet etching method; And forming an isolation layer by filling an insulating material in the trench by the second etching process.

According to the embodiment, the structure of the device isolation layer may be improved through a two-step etching process, thereby minimizing electrical color mixing of the image sensor. In addition, the color sharpness between the pixels can be maintained high, and the sensitivity of the image sensor can be improved.

Description

Image sensor and manufacturing method of image sensor

Embodiments relate to an image sensor and a method for manufacturing the image sensor.

An image sensor is a semiconductor device that converts an optical image into an electrical signal. The image sensor is largely a charge coupled device (CCD) and a complementary metal oxide silicon (CMOS) image sensor. Sensor).

The CMOS image sensor uses CMOS technology using a control circuit, a signal processing circuit, and the like as peripheral circuits to form MOS transistors corresponding to the number of unit pixels on a semiconductor substrate, thereby outputting each unit pixel by the MOS transistors. It is a device that employs a switching method that detects sequentially.

1 is a side cross-sectional view showing the structure of an image sensor.

Referring to FIG. 1, a photodiode 11 is formed on a substrate 10 divided by an isolation layer 12, and an insulating layer 20 including a metal wiring 21 or the like is formed thereon.

In addition, the color filter layer 30 is formed on the insulating layer 20, and the microlens 40 is formed on the color filter layer 30.

The color filter layer 30 and the microlens 40 are formed to correspond to each photodiode 11 vertically, and the color filter layer 30 of the region “A” of the region separated by the device isolation layer 12. ) And the photodiode 11 process red light, and the color filter layer 30 and the photodiode 11 in the "B" region process green light. In addition, the color filter layer 30 and the photodiode 11 in the "C" region process blue light.

Electrons generated in the photodiode 11 flow to a floating diffusion layer (FD) through a transfer transistor (not shown) in which an electrical signal is accumulated. In this case, electrons do not flow to the transfer transistor. Mixing into photodiodes of adjacent pixels (commonly referred to as "electrical cross-talk") can cause distortion of the signal.

In particular, since the current device isolation layer 12 is formed to a depth d1 of about 0.35 μm to 0.4 μm, it is easy to cause electric color mixing. In the case of red light having a long wavelength, electrons are generated deep in the silicon substrate. The probability that the electrons are induced to the adjacent pixel is further increased.

Such electric color mixing causes problems such as deterioration of the sensitivity of the image sensor and deterioration of color sharpness characteristics.

The embodiment provides an image sensor and a method of manufacturing the image sensor capable of minimizing electrical color mixing by improving the device isolation layer structure.

An image sensor according to an embodiment includes a semiconductor substrate; A plurality of photodiodes formed in pixel units at predetermined intervals on the semiconductor substrate; And an isolation layer formed in a region of the semiconductor substrate between the photodiodes and having a depth of 8 to 10 times the depth of the photodiode, and having both sides extended in a trapezoidal shape.

In another aspect, a method of manufacturing an image sensor includes: forming a photodiode on a semiconductor substrate; Forming a trench having a depth of 8 to 10 times the depth of the photodiode in the semiconductor substrate region between the photodiodes through a first etching process using a dry etching method; Extending both sides of the trench by the first etching process into a trapezoidal shape through a second etching process using a wet etching method; And forming an isolation layer by filling an insulating material in the trench by the second etching process.

According to the embodiment, the following effects are obtained.

First, the device isolation layer structure may be improved through a two-step etching process, thereby minimizing electric color mixing of the image sensor.

Second, since electric color mixing can be minimized, color sharpness of each pixel such as a red pixel, a green pixel, and a blue pixel can be maintained high, and the sensitivity of the image sensor can be improved.

With reference to the accompanying drawings, it will be described in detail with respect to the image sensor and the manufacturing method of the image sensor according to the embodiment.

Hereinafter, in describing the embodiments, detailed descriptions of related well-known functions or configurations are deemed to unnecessarily obscure the subject matter of the present invention, and thus only the essential components directly related to the technical spirit of the present invention will be referred to. .

In the description of an embodiment according to the present invention, each layer (film), region, pattern or structure may be "on" or "under" the substrate, each layer (film), region, pad or pattern. "On" and "under" include both "directly" or "indirectly" formed through another layer, as described in do. Also, the criteria for top, bottom, or bottom of each layer will be described with reference to the drawings.

2 is a side cross-sectional view illustrating a form in which a trench 110 is formed by a first etching process according to an embodiment.

Although not shown in FIG. 2, a semiconductor device region including a plurality of transistors is formed in the semiconductor substrate 100.

The semiconductor device region may include a transfer transistor that accumulates an electric signal generated from a photodiode, a floating diffusion layer (FD) layer, and a floating diffusion layer (FD), which store the electrical signal stored in the transfer transistor. A reset transistor for applying the gate signal, a gate potential changes as the electric signal is stored in the floating diffusion layer FD, an access transistor for applying the electric signal, and a select for outputting the electric signal applied by the access transistor. (select) transistors.

Subsequently, a first photoresist pattern (not shown) for opening a portion of the semiconductor substrate 100 except for the semiconductor device region is formed, and the photodiode 120 is formed by doping N-type conductive impurities at low concentration. .

Thereafter, the first photoresist pattern is removed, and a second photoresist pattern 200 opening between the photodiodes 120 is formed.

The trench 110 is formed by processing the first etching process using the second photoresist pattern 200 as an etching mask.

The first etching process is a dry etching method using physical collisions and chemical reactions of ions formed by plasma.

The first etching process is to adjust the depth of the trench 110, and the trench 110 is formed to a depth of 8 to 10 times the photodiode 120.

In this case, C 5 F 8 gas may be used as the etching gas, and the depth of the trench 110 may be adjusted by controlling the gas injection amount and the ion energy amount.

For example, the trench 110 may be formed to a depth d2 of about 0.8 μm to 1 μm.

3 is a side cross-sectional view illustrating a form in which a trench 130 is formed by a second etching process according to an embodiment.

Subsequently, a second etching process is performed while keeping the second photoresist pattern 200 as it is.

The second etching process is to adjust the width of the trench 110 formed by the first etching process, and by the second etching process, the trench 110 by the first etching process is trapezoidal as shown in FIG. 3. It will have the form of.

The second etching process may be treated using HF solution.

4 is a side cross-sectional view showing the structure of an image sensor according to an embodiment.

In this manner, when the trench 130 is completed, the trench 130 is buried to form an insulating layer on the semiconductor substrate 100, and the planarization of the insulating layer is performed so that the surface of the semiconductor substrate 100 is exposed. do.

Thus, the device isolation layer 130a according to the embodiment is formed.

The device isolation layer 130a may be formed of a material such as TEOS (Tetraethyl orthosilicate; Si (C 2 H 5 O 4)).

Thereafter, an insulating layer 140 including a metal structure 142 such as a contact plug, a metal wire, a pad, etc. is formed on the semiconductor substrate 100, and a color filter layer 150 is formed on the insulating layer 140. .

The color filter layer 150 includes a plurality of color filters. For example, the color filter corresponding to area "A" of FIG. 4 is a red filter, and the color filter corresponding to area "B" is a green filter, and a area "C". The color filter corresponding to may be provided as a blue filter.

Subsequently, the microlens 160 is formed on the color filter layer 150.

According to the structure of the image sensor according to the embodiment, the device isolation layer 130a is formed to be 8 times to 10 times deeper than the depth of the photodiode 120, and can be thickly extended in a trapezoidal form through a two-step etching process. Therefore, it is possible to minimize the occurrence of electrical mixing between the pixels.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications other than those described above are possible. For example, each component specifically shown in the embodiments of the present invention can be modified and implemented. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

1 is a side cross-sectional view showing the structure of an image sensor.

FIG. 2 is a side cross-sectional view illustrating a form in which a trench is formed by a first etching process according to an embodiment. FIG.

3 is a side cross-sectional view illustrating a form in which a trench is formed by a second etching process according to an embodiment.

4 is a side cross-sectional view showing the structure of an image sensor according to an embodiment;

Claims (10)

Forming a photodiode on the semiconductor substrate; Forming a trench having a depth of 8 to 10 times the depth of the photodiode in the semiconductor substrate region between the photodiodes through a first etching process using a dry etching method; Extending both sides of the trench by the first etching process into a trapezoidal shape through a second etching process using a wet etching method; And And forming an isolation layer by filling an insulating material in the trench by the second etching process. The method of claim 1, wherein the first etching process C 5 F 8 is conducted using the etching gas, a method of manufacturing the image sensor by controlling the gas injection amount, the amount of ion energy, characterized in that the depth of the trench adjustment. The trench of claim 1, wherein the trench is formed by the first etching process. Method of manufacturing an image sensor, characterized in that formed in a depth of 0.8μm to 1μm. The method of claim 1, Forming an insulating layer including a metal structure on the semiconductor substrate on which the device isolation layer is formed; Forming a color filter layer on the insulating layer; And And forming a microlens on the color filter layer. The method of claim 1, wherein forming the photodiode And forming a semiconductor device region including a plurality of transistors in a region where the photodiode is not formed. The method of claim 1, The forming of the trench by the first etching process may include forming a photoresist pattern opening between the photodiodes, and processing the first etching process using the photoresist pattern as an etching mask. , The expanding of the trench by the second etching process may include maintaining the photoresist pattern to process the second etching process and removing the photoresist pattern. Way. Semiconductor substrates; A plurality of photodiodes formed in pixel units at predetermined intervals on the semiconductor substrate; And And an element isolation layer formed in the semiconductor substrate region between the photodiodes and having a depth of 8 to 10 times the depth of the photodiode, and having both sides extended in a trapezoidal shape. The method of claim 7, wherein the device isolation layer An image sensor, characterized in that formed in a depth of 0.8μm to 1μm. The method of claim 7, wherein An insulating layer formed on the semiconductor substrate on which the device isolation layer is formed and including a metal structure; A color filter layer formed on the insulating layer; And And a micro lens formed on the color filter layer. The method of claim 7, wherein the device isolation layer An image sensor comprising TEOS (Tetraethyl orthosilicate; Si (C2H5O4)).
KR1020080136418A 2008-12-30 2008-12-30 Image sensor and manufacturing method of image sensor KR20100078221A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015072723A1 (en) * 2013-11-13 2015-05-21 (주)실리콘화일 Substrate separation-type three-dimensional chip stacking image sensor and method for manufacturing same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015072723A1 (en) * 2013-11-13 2015-05-21 (주)실리콘화일 Substrate separation-type three-dimensional chip stacking image sensor and method for manufacturing same

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