KR20100078004A - Method for removing particle - Google Patents

Method for removing particle Download PDF

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Publication number
KR20100078004A
KR20100078004A KR1020080136105A KR20080136105A KR20100078004A KR 20100078004 A KR20100078004 A KR 20100078004A KR 1020080136105 A KR1020080136105 A KR 1020080136105A KR 20080136105 A KR20080136105 A KR 20080136105A KR 20100078004 A KR20100078004 A KR 20100078004A
Authority
KR
South Korea
Prior art keywords
particles
forming
semiconductor substrate
insulating film
contact
Prior art date
Application number
KR1020080136105A
Other languages
Korean (ko)
Inventor
이상섭
Original Assignee
주식회사 동부하이텍
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 동부하이텍 filed Critical 주식회사 동부하이텍
Priority to KR1020080136105A priority Critical patent/KR20100078004A/en
Publication of KR20100078004A publication Critical patent/KR20100078004A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H01L21/31055—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76819—Smoothing of the dielectric

Abstract

In the particle removing method according to the present invention, after forming an interlayer insulating film on a semiconductor substrate having a bottom contact, forming a via hole to expose a portion of the bottom contact, and forming a barrier metal layer on the semiconductor substrate having a via hole. And filling the via hole with a metal material to form a via contact, forming an insulating film for removing particles on the semiconductor substrate on which the via contact is formed, and a planarization process using the barrier metal layer as the polishing stop point. Removing the particles generated during the formation of the via holes, and performing an entire surface etching process on the semiconductor substrate subjected to the planarization process to remove remaining particles and an insulating film for removing particles.

As described above, the present invention forms a particle insulating film that can sufficiently cover particles generated during via contact formation, and then removes particles by performing a chemical mechanical polishing process and an entire surface etching process, thereby eliminating the DC fail due to the particles. Solving can improve semiconductor yield and reliability.

Description

How to remove particles {METHOD FOR REMOVING PARTICLE}

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to form a particle removal insulating film that can sufficiently cover the particles generated during via contact formation, and then to remove particles by performing a chemical mechanical polishing process and an entire surface etching process. It is about a removal method.

As is well known, semiconductor devices can be manufactured in various processes such as deposition processes, oxidation processes, photolithography processes (application processes, exposure processes, development processes), etching processes, cleaning processes, rinse processes, doping processes, annealing processes, and the like. It is manufactured by performing the same various processes selectively or repeatedly. In this semiconductor device, a plurality of transistors and metal wirings for electrically connecting the electrodes of each transistor are employed.

Meanwhile, the metal wires are electrically connected to the respective contacts (source, drain, gate, capacitor, etc.) through contact holes or vials. Here, the via hole or the contact hole forms an insulating film (oxide film, etc.) on the target contact or the lower metal wiring, and forms a hole for exposing the upper portion of the target contact or the lower metal wiring through an etching process using an etching mask. The hole is formed by burying metal.

Hereinafter, a conventional metal wiring forming process will be described with reference to the accompanying drawings.

1 is a cross-sectional view illustrating a general metal wiring forming process.

Referring to FIG. 1, an insulating film 104 of a thick film is formed on an entire surface of a semiconductor substrate on which the lower contact 102 is formed, and a portion of the insulating film 104 is removed through an etching process using an etching mask to remove the lower contact 102. A metal material such as tungsten (W) is formed to form a via hole exposing a portion of the upper portion of the upper portion of the via, and a barrier metal layer 106 of a thin film made of Ti or the like on the front surface, and to completely fill the via hole. To form. Here, the lower contact 102 is a lower metal wiring, and is made of a metal layer such as Al and Ti / TiN.

Next, vias filled with a conductive material are removed by using a method such as chemical mechanical polishing (CMP) to remove the metal material until the top of the barrier metal layer 106 formed on the insulating film 104 is exposed. Form a contact 108.

Subsequently, a metal material such as Al, Cu or a composite material and a diffusion barrier material such as TiN are sequentially stacked over the entire upper surface of the semiconductor substrate, and patterned through an etching process using an etching mask, followed by heat treatment. 110 and diffusion barrier layer 112 are completed.

In the conventional metal wiring forming method, the hole for forming the via hole is generally formed by etching the Ti / TiN or the metal layer, which is a sub contact with the submicron, so that particles are generated after the etching process for forming the via contact. Occasionally, there is a problem in that a current fails to flow into the via contact, causing a DC fail.

The present invention forms a particle removing insulating film that can sufficiently cover particles generated during via contact formation, and then removes particles by performing a chemical mechanical polishing process and an entire surface etching process on the particle removing insulating film.

In the method for removing particles according to the present invention, after forming an interlayer insulating film on a semiconductor substrate on which a lower contact is formed, forming a via hole so that a portion of the lower contact is exposed, and a barrier metal layer on the semiconductor substrate on which the via hole is formed. Forming a via contact by filling the via hole with a metal material, forming an insulating film for removing particles on the semiconductor substrate on which the via contact is formed, and planarizing the barrier metal layer as a polishing stop point Performing a process to remove particles generated during the formation of the via hole; and performing an entire surface etching process on the semiconductor substrate that has undergone the planarization process to remove the remaining particles and the particle insulation insulating film. do.

The present invention is to form a particle insulating film that can sufficiently cover the particles generated during the formation of the via contact, and then to remove the particles by performing a chemical mechanical polishing process and an entire surface etching process, it is possible to solve the DC fail due to the particles Semiconductor yield and reliability can be improved.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In addition, in describing the present invention, when it is determined that the detailed description of the related known configuration or function may obscure the gist of the present invention, the detailed description thereof will be omitted.

An embodiment of the present invention describes a particle removal method capable of removing particles by forming a particle insulation insulating film that can sufficiently cover particles generated during via contact formation, and then performing a chemical mechanical polishing process and an entire surface etching process.

2A to 2D are cross-sectional views illustrating a particle removal process in a metal line formation process according to the present invention.

First, as shown in FIG. 2A, an interlayer insulating film (eg, an oxide film) 202 of a thick film is formed on a semiconductor substrate on which the lower contact point 200 is formed, and then, through an etching process using an etching mask (not shown). By selectively removing a portion of the interlayer insulating layer 202, a via hole exposing a portion of the upper portion of the lower contact 200 is formed.

Then, a thin film barrier metal layer 204 is formed on the front surface of the semiconductor substrate by chemical vapor deposition (CVD) by sputtering or the like, and then transferred to form a completely filled via hole on the front surface of the semiconductor substrate. To form a metallic material of the castle. Here, Ti, TiN, or the like may be used as the barrier metal layer 204, and Al, Cu, or a composite material may be used as the conductive metal material. Then, the via contact 206 is performed by performing a chemical mechanical polishing (CMP) process to remove the metal material evenly until the upper portion of the barrier metal layer 204 formed on the interlayer insulating layer 202 is exposed. ).

In the via contact formation process as described above, as illustrated in FIG. 2A, particles P may be generated during an etching process for forming a via hole or a process for forming a via contact 206. ) Process is as follows.

As shown in FIG. 2B, an insulating film 208 for removing particles of a thick film is formed on the semiconductor substrate on which the via contact 206 is formed. The thickness of the particle removing insulating film 208 is preferably 4000 to 7000 mm.

Then, as shown in FIG. 2C, a chemical mechanical polishing process is used as the polishing stop point of the barrier metal layer 204 to remove the particle removing insulating layer 208 and to remove part of the particles P. As shown in FIG. In this chemical mechanical polishing process, all particles are not removed, and small particles P are present on the semiconductor substrate on which the bi-contact 206 is formed, and a part of the insulating film 208 for removing particles remains.

For this reason, as shown in FIG. 2D, the entire surface etching process is performed to remove the remaining particle removing insulating layer 208 and the small particle P. FIG. The front etching process may use an etching gas such as florin.

Subsequently, although not shown, a cleaning process for cleaning the by-products generated during the etching process and the particle P removal process as described above, for example, a scrubber process using ultra pure water is performed.

In an embodiment of the present invention, for example, the particle P is removed by performing the process of FIGS. 2B to 2D once. However, in order to increase the removal efficiency of the particle P, the particle P may be repeatedly performed a predetermined number of times. .

According to the present invention, by forming the particle removal insulating film 208 that can sufficiently cover the particles (P) generated when the via contact 206 is formed, by performing a chemical mechanical polishing process and an entire surface etching process, the particle (P) Can be removed efficiently.

It has been described so far limited to one embodiment of the present invention, it is obvious that the technology of the present invention can be easily modified by those skilled in the art. Such modified embodiments should be included in the technical spirit described in the claims of the present invention.

1 is a cross-sectional view illustrating a conventional metal wiring forming process.

2A to 2D are cross-sectional views illustrating a particle removal process in a metal line formation process according to the present invention.

<Explanation of symbols for the main parts of the drawings>

200: lower contact 202: interlayer insulating film

204 barrier metal layer 206 via contact

208: insulating film for removing particles

Claims (3)

Forming a via hole so that a portion of the lower contact is exposed after forming an interlayer insulating layer on the semiconductor substrate on which the lower contact is formed; Forming a via contact by filling the via hole with a metal material after forming a barrier metal layer on the semiconductor substrate on which the via hole is formed; Forming an insulating film for removing particles on the semiconductor substrate on which the via contact is formed; Performing a planarization process using the barrier metal layer as a polishing stop point to remove particles generated when the via hole is formed; Performing an entire surface etching process on the semiconductor substrate that has undergone the planarization process to remove the particles and the insulating film for removing particles Particle removal method comprising a. The method of claim 1, And removing the particle removal insulating layer, the planarization process, and the entire surface etching process by a predetermined number of times. The method of claim 2, Particle removal method characterized in that to perform a further scrubber process after performing the entire surface etching process.
KR1020080136105A 2008-12-29 2008-12-29 Method for removing particle KR20100078004A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020080136105A KR20100078004A (en) 2008-12-29 2008-12-29 Method for removing particle

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020080136105A KR20100078004A (en) 2008-12-29 2008-12-29 Method for removing particle

Publications (1)

Publication Number Publication Date
KR20100078004A true KR20100078004A (en) 2010-07-08

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020080136105A KR20100078004A (en) 2008-12-29 2008-12-29 Method for removing particle

Country Status (1)

Country Link
KR (1) KR20100078004A (en)

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