KR20100036618A - Light emitting device for ac operation and method of fabricating the same - Google Patents

Light emitting device for ac operation and method of fabricating the same Download PDF

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KR20100036618A
KR20100036618A KR1020080095927A KR20080095927A KR20100036618A KR 20100036618 A KR20100036618 A KR 20100036618A KR 1020080095927 A KR1020080095927 A KR 1020080095927A KR 20080095927 A KR20080095927 A KR 20080095927A KR 20100036618 A KR20100036618 A KR 20100036618A
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South Korea
Prior art keywords
light emitting
layer
substrate
emitting cells
semiconductor layer
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KR1020080095927A
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Korean (ko)
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KR101093117B1 (en
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이준희
서원철
김창연
이장우
신진철
윤여진
김종규
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서울옵토디바이스주식회사
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Priority to KR20080095927A priority Critical patent/KR101093117B1/en
Priority to JP2009224120A priority patent/JP5123269B2/en
Priority to US12/570,456 priority patent/US8288781B2/en
Publication of KR20100036618A publication Critical patent/KR20100036618A/en
Priority to US13/073,794 priority patent/US8648369B2/en
Priority to US13/237,778 priority patent/US9059015B2/en
Application granted granted Critical
Publication of KR101093117B1 publication Critical patent/KR101093117B1/en
Priority to JP2012235992A priority patent/JP5719336B2/en
Priority to US14/138,917 priority patent/US9431377B2/en
Priority to US14/229,773 priority patent/US9337175B2/en
Priority to US15/226,412 priority patent/US20160343922A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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Abstract

PURPOSE: A light emitting device for ac operation and a method of fabricating the same are provided to prevent a short circuit inside a light emitting diode. CONSTITUTION: Light emitting cells are separated from each other on a substrate(151). Light emitting cells include a first conductive top semiconductor(125), an active layer, and a second conductive bottom semiconductor layer. The active layer and the bottom semiconductor are installed under a part of the top semiconductor layer. A wiring(139) is interposed between the substrate and the light emitting cells. Interconnections connects the light emitting cells and forms a serial array. An interlayer dielectric layer(141) is interposed between the light emitting cells and the substrate and covers the emitting cell and the wires.

Description

LIGHT EMITTING DEVICE FOR AC OPERATION AND METHOD OF FABRICATING THE SAME}

The present invention relates to a light emitting device and a method of manufacturing the same, and more particularly, to a light emitting device for AC and a method of manufacturing the same.

A light emitting diode is a photoelectric conversion semiconductor device having a structure in which an N-type semiconductor and a P-type semiconductor are bonded to each other and emit light by recombination of electrons and holes. Such light emitting diodes are widely used as display devices and backlights. In addition, the light emitting diode consumes less power and has a longer lifetime than conventional light bulbs or fluorescent lamps, thereby replacing its incandescent lamps and fluorescent lamps, thereby expanding its use area for general lighting applications.

Recently, AC light emitting diodes that emit light continuously by directly connecting the light emitting diodes to AC power have been commercialized. Light emitting diodes that can be used directly in connection with high voltage alternating current power supplies are described, for example, in Published International Publication No. WO 2004/023568 (Al), which are referred to as "light-emitting elements having light-emitting components" (LIGHT-EMITTING DEVICE HAVING LIGHT-EMITTING ELEMENTS). The title is disclosed by SAKAI et al.

According to WO 2004/023568 (Al), series LED arrays are formed two-dimensionally connected on an insulating substrate, such as a sapphire substrate. These LED arrays are connected in antiparallel on the sapphire substrate. As a result, a single chip light emitting device that can be driven by an AC power supply is provided.

Since the AC-LED forms light emitting cells on a substrate used as a growth substrate, for example, a sapphire substrate, there is a limitation in the structure of the light emitting cells, and there is a limit in improving light extraction efficiency. In order to solve this problem, a method of manufacturing an AC-LED by applying a substrate separation process has been disclosed in Korean Patent Publication No. 10-0599012 entitled "Light Emitting Diode Having a Thermally Conductive Substrate and a Method of Manufacturing The Same".

1 to 4 are cross-sectional views illustrating a method of manufacturing an AC light emitting device according to the prior art.

Referring to FIG. 1, semiconductor layers including a buffer layer 23, an N-type semiconductor layer 25, an active layer 27, and a P-type semiconductor layer 29 are formed on a sacrificial substrate 21. The first metal layer 31 is formed on the field, and the second metal layer 53 is formed on the substrate 51 separate from the sacrificial substrate 21. The first metal layer 31 may include a reflective metal layer. The second metal layer 53 is bonded to the first metal layer 31 so that the substrate 51 is bonded over the semiconductor layers.

Referring to FIG. 2, after the substrate 51 is bonded, the sacrificial substrate 21 is separated by using a laser lift-off process. In addition, after the substrate 21 is separated, the remaining buffer layer 23 is removed, and the surface of the N-type semiconductor layer 25 is exposed.

Referring to FIG. 3, the semiconductor layers 25, 27, 29 and the metal layers 31, 53 are patterned and spaced apart from each other by using a photo and etching technique, and the metal patterns 40. Light emitting cells 30 are formed on a partial region of the substrate. The light emitting cells 30 include a patterned P-type semiconductor layer 29a, an active layer 27a, and an N-type semiconductor layer 25a.

Referring to FIG. 4, metal wires 57 are formed to electrically connect the upper surfaces of the light emitting cells 30 and the metal patterns 40 adjacent thereto. The metal wires 57 connect the light emitting cells 30 to form a series array of light emitting cells. In order to connect the metal wires 57, an electrode pad 55 may be formed on the N-type semiconductor layer 25a, and an electrode pad may also be formed on the metal patterns 40. Two or more such arrays may be formed, and there is provided a light emitting diode in which these arrays are connected in parallel and driven under an AC power source.

According to the conventional technology, since the substrate 51 can be variously selected, the heat dissipation performance of the light emitting diode can be improved, and the light extraction efficiency can be improved by treating the surface of the N-type semiconductor layer 25a. In addition, since the first metal layer 31a reflects the light traveling from the light emitting cells 30 to the substrate 51 side including the reflective metal layer, the luminous efficiency may be further improved.

However, according to the related art, during the patterning of the semiconductor layers 25, 27, 29 and the metal layers 31, 53, an etch by-product of a metal material adheres to the sidewall of the light emitting cell 30, thereby forming an N-type semiconductor layer ( An electrical short may be caused between 25a) and the P-type semiconductor layer 29a. In addition, the surface of the first metal layer 31a exposed during the etching of the semiconductor layers 25, 27, and 29 may be easily damaged by plasma. This etching damage is further exacerbated when the first metal layer 31a includes a reflective metal layer such as Ag or Al. Damage to the surface of the metal layer 31a by the plasma degrades the adhesion of the wirings 57 or the electrode pads formed thereon, resulting in device defects.

Meanwhile, according to the related art, the first metal layer 31 may include a reflective metal layer, and thus reflects light traveling from the light emitting cells 30 toward the substrate. However, it is difficult to expect the reflection of light by etching damage or oxidation of the reflective metal layer in the space between the light emitting cells 30. Further, since the substrate 51 is exposed in the region between the metal patterns 40, light may be absorbed and lost by the substrate 51.

Further, since the wirings 57 are connected on the upper surface of the N-type semiconductor layer 25a, that is, on the light emitting surface, the light generated in the active layer 25a is transferred to the wirings 57 and / or on the light emitting surface. Light loss may occur due to absorption of the electrode pads 55.

An object of the present invention is to provide an AC light emitting device and a method of manufacturing the same, which can prevent an electrical short circuit in a light emitting cell due to metal etching by-products.

Another object of the present invention is to provide a light emitting device and a method of manufacturing the same, which can reduce the loss of light propagating toward the substrate in the space between the light emitting cells.

Another object of the present invention is to provide a light emitting device capable of improving the light emitting efficiency by reducing the loss of light emitted from the light emitting surface and a method of manufacturing the same.

Another object of the present invention is to provide a light emitting device capable of preventing deformation of the reflective metal layer by etching or oxidation, and a method of manufacturing the same.

The present invention provides an AC light emitting device and a method of manufacturing the same. An alternating light emitting device according to an aspect of the present invention includes a substrate; A plurality of light emitting cells spaced apart from each other on the substrate, wherein each of the plurality of light emitting cells includes an upper semiconductor layer of a first conductivity type, an active layer, and a lower semiconductor layer of a second conductivity type, wherein the active layer and the lower semiconductor layer are the upper semiconductor; A plurality of light emitting cells positioned below a portion of the layer; Wirings positioned between the substrate and the plurality of light emitting cells and connecting the light emitting cells to form a series array of light emitting cells; An intermediate insulating layer disposed between the light emitting cells and the substrate to cover the light emitting cells and the wirings; And first reflective metal layers interposed between the intermediate insulating layer and the light emitting cells.

Since the wirings are located under the upper semiconductor layer, the light emitted from the upper surface of the upper semiconductor layer is prevented from being lost by the wirings and / or electrode pads. In addition, since the upper semiconductor layer has a wider width than the active layer and the lower semiconductor layer, the wirings may be connected to the lower surface of the upper semiconductor layer. Therefore, unlike the conventional AC-LED, it is possible to prevent the etching by-products of the metal from sticking to the sides of the light emitting cells.

Meanwhile, a second reflective metal layer may be interposed between the intermediate insulating layer and the substrate. The second reflective metal layer reflects light traveling toward the substrate in the space between the light emitting cells, thereby improving luminous efficiency.

An insulating layer covers the side surfaces of the light emitting cells such that the wires are spaced apart from the side surfaces of the light emitting cells. An insulating layer may cover the light emitting cells and have openings exposing a lower surface of the first reflective metal layer and the upper semiconductor layer.

The wirings are electrically connected to the lower surface of the lower semiconductor layer and the lower surface of the upper semiconductor layer of neighboring light emitting cells, respectively, through the openings in the insulating layer, the lower surface of the upper semiconductor layer and the lower surface of the lower semiconductor layer. Can be electrically connected to the

On the other hand, the insulating layer may be located under the regions where the upper semiconductor layers are separated to prevent the wires from being exposed to the outside.

The display device may further include a protective metal layer covering the first reflective metal layer. The protective metal layer prevents oxidation of the first reflective metal layer.

On the other hand, the substrate may be sapphire. Generally, when using a substrate separation process, sapphire and other thermally conductive substrates are adopted as the bonding substrate, but the present invention is not particularly limited to the bonding substrate, but rather, the sapphire substrate is adopted as the preferred substrate. Thus, by using the same substrate as the growth substrate of the semiconductor layers as the bonding substrate, the substrate separation process and subsequent patterning processes can be performed more safely.

According to another aspect of the present invention, there is provided a method of manufacturing an alternating light emitting device for forming compound semiconductor layers on a sacrificial substrate, patterning the compound semiconductor layers on the sacrificial substrate, and electrically connecting light emitting cells on the sacrificial substrate. Forming wirings. Since the compound semiconductor layers are patterned on the sacrificial substrate, it is possible to prevent the generation of metal etching byproducts.

Specifically, the method of manufacturing the AC light emitting device includes a compound including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first and second conductive semiconductor layers on a sacrificial substrate. Forming semiconductor layers, wherein the first conductivity type semiconductor layer is disposed close to the sacrificial substrate; Patterning the compound semiconductor layers to form a plurality of mesas, wherein the first conductive semiconductor layer is exposed around the mesas; Forming first reflective metal layers on the mesas; Forming an insulating layer covering the mesas and the exposed first conductive semiconductor layer, wherein the insulating layer exposes the openings exposing the upper portions of the mesas and the first conductive semiconductor layer between the mesas. With openings; Forming interconnects electrically connecting the mesas and the first conductive semiconductor layers exposed adjacent to the mesas; Forming an intermediate insulating layer on the sacrificial substrate on which the wirings are formed; Bonding a substrate over the intermediate insulating layer; Removing the sacrificial substrate to expose the first conductivity type semiconductor layer; And separating the exposed first conductive semiconductor layer to form a plurality of light emitting cells spaced apart from each other. The first conductive semiconductor layer is separated such that the plurality of light emitting cells are connected in series by the wirings.

According to the manufacturing method, the wirings are located between the light emitting cells and the substrate, and thus it is possible to reduce the loss of light emitted from the light emitting surface.

In addition, the method of manufacturing the AC light emitting device may further include forming a second reflective metal layer on the intermediate insulating layer. The second reflective metal layer reflects light propagating toward the substrate in the space between the light emitting cells to improve luminous efficiency.

Meanwhile, protective metal layers covering the first reflective metal layers may be formed. Accordingly, the first reflective metal layers are prevented from being exposed to the outside and oxidized.

The method of manufacturing the AC light emitting device may further include forming a first electrode pad on the first conductive semiconductor layer exposed between the mesas, and forming a second electrode pad on the protective metal layer. have. In this case, the wires connect the first and second electrode pads to form an array of light emitting cells.

According to the present invention, it is possible to provide an AC light emitting device and a method of manufacturing the same, which can prevent an electrical short circuit in a light emitting cell by preventing the generation of metal etching by-products. In addition, by adopting the first and second reflective metal layers, it is possible to reflect the light directed toward the substrate over the entire surface of the substrate, thereby improving the luminous efficiency. Furthermore, by filling the wirings inside the light emitting element, it is possible to prevent the light emitted from the light emitting surface from being lost by the wirings or the electrode pads. Further, according to the present invention, since the reflective metal layer is not exposed to the etching process and is not exposed to the outside, deformation due to etching or oxidation is prevented.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to ensure that the spirit of the present invention to those skilled in the art will fully convey. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. And, in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

5 is a cross-sectional view for describing an AC light emitting device according to an embodiment of the present invention.

Referring to FIG. 5, the light emitting device includes a substrate 151, a plurality of light emitting cells LS1 and LS2, wires 137, first reflective metal layers 131, and an intermediate insulating layer 141. , Insulating layer 133, protective metal layer 135, first electrode pads 137a and 138a and second electrode pads 137b and 138b, second reflective metal layer 143, protective metal layer 145, bonding Metals 147 and 149.

The substrate 151 is separated from the growth substrate for growing the compound semiconductor layers and is a bonding substrate bonded to the compound semiconductor layers that have been grown. The bonding substrate 151 may be a sapphire substrate, but is not limited thereto, and may be another kind of insulating or conductive substrate. In particular, when the sapphire substrate is used as the growth substrate, the substrate 151 is preferably a sapphire substrate because it has the same coefficient of thermal expansion as the growth substrate.

The plurality of light emitting cells LS1 and LS2 are spaced apart from each other on the substrate 151, and the upper semiconductor layer 125a of the first conductivity type, the active layer 127a, and the lower semiconductor layer of the second conductivity type, respectively. 129a. The active layer 127a is interposed between the upper and lower semiconductor layers 125a and 129a. Meanwhile, the active layer 127a and the lower semiconductor layer 129a are located under a portion of the upper semiconductor layer 125a. That is, the upper semiconductor layer 125a has a wider width than the active layer and the lower semiconductor layer.

The active layer 127a and the upper and lower semiconductor layers 125a and 129a may be formed of III-N-based compound semiconductors such as (Al, Ga, In) N semiconductors. The upper and lower semiconductor layers 125a and 129a may be a single layer or multiple layers, respectively. For example, the upper and / or lower semiconductor layers 125a and 129a may include a contact layer and a cladding layer, and may also include a superlattice layer. In addition, the active layer 127a may have a single quantum well structure or a multiple quantum well structure. Preferably, the first conductivity type is n-type, and the second conductivity type is p-type. The upper semiconductor layers 125a may be formed of an n-type semiconductor layer having a relatively low resistance, and thus the thicknesses of the upper semiconductor layers 125a may be relatively thick. Therefore, it is easy to form the rough surface R on the upper surface of the upper semiconductor layer 125a, and the rough surface R improves the extraction efficiency of light generated in the active layer 127a.

The wirings 139 electrically connect the light emitting cells LS1 and LS2 to form a series array. As illustrated, the wirings 139 are positioned between the light emitting cells LS1 and LS2 and the substrate 151, and the upper semiconductor layer 125a and the lower semiconductor layer of the adjacent light emitting cells LS1 and LS2 are disposed. Electrically connect 129a. First electrode pads 137a and 138a and second electrode pads 137b and 138b are formed in the upper semiconductor layers 125a and the lower semiconductor layers 129a to connect the wires 139, respectively. Can be.

At least two series arrays may be formed on the substrate 151 by the interconnections 139, and the arrays may be connected in parallel to each other and driven by an AC power source. Alternatively, a series array may be formed by wirings on a substrate, and the series array may be driven by an AC power supply by being connected to a bridge rectifier formed on the substrate. The bridge rectifier may also be formed by connecting the light emitting cells by wirings.

The insulating layer 133 covers side surfaces of the light emitting cells LS1 and LS2 to prevent the wires 139 from contacting the semiconductor layers exposed on the side surfaces of the light emitting cells. The insulating layer 133 has an opening exposing the lower surfaces of the upper semiconductor layers 125a and has an opening under the lower semiconductor layers 129a. The wirings 139 are insulated from the active layers 127a and the upper semiconductor layers 125a exposed to the side surfaces of the light emitting cells by the insulating layer 133 and through openings in the insulating layer 133. The lower surfaces of the upper semiconductor layer 125a and the lower semiconductor layer 129a are electrically connected to each other. Meanwhile, the insulating layer 133 prevents the wirings 139 from being exposed in a region where the light emitting cells LS1 and LS2 are separated.

An intermediate insulating layer 141 is interposed between the light emitting cells LS1 and LS2 and the substrate 151, and the intermediate insulating layer 141 covers them under the light emitting cells and the wirings. The intermediate insulating layer 141 prevents the light emitting cells LS1 and LS2 from being shorted to each other by the substrate 151 or the bonding metals 147 and 149.

First reflective metal layers 131 are interposed between the intermediate insulating layer 141 and the light emitting cells LS1 and LS2. The reflective metal layers 131 are generated in the active layers 127a to reflect light directed toward the substrate 151 to improve the luminous efficiency. The first reflective metal layers may be formed of a metal material having a high reflectance such as silver (Ag) or aluminum (Al), or an alloy thereof. In addition, an ohmic contact layer (not shown) may be interposed between the reflective metal layer 131 and the lower semiconductor layer 129a.

In addition, to protect the reflective metal layers 131, the protective metal layers 135 may cover them under the reflective metal layers 131. The protective metal layers 135 prevent diffusion of a metal material and also prevent the reflective metal layer 131 from being exposed to the outside.

The first electrode pads 137a and 138a are formed on the lower surfaces of the upper semiconductor layers 125a of the light emitting cells LS1 and LS2. The first electrode pads may be formed in the upper semiconductor layers 125a through openings in the insulating layer 133. In addition, an ohmic contact layer (not shown) may be interposed between the first electrode pads and the upper semiconductor layers. Meanwhile, the second electrode pads 137b and 138b are formed on the lower surfaces of the lower semiconductor layers 129a of the light emitting cells LS1 and LS2. The second electrode pads 137b and 138b may be formed in the reflective metal layers 131 or the protective metal layers 135. The wires are connected to the first and second electrode pads to electrically connect the light emitting cells. The first and / or second electrode pads may be omitted.

The second reflective metal layer 143 is interposed between the intermediate insulating layer 141 and the substrate 151. The second reflective metal layer 143 may be formed over almost the entire surface of the substrate 151. In general, the wirings 139 are formed in a line shape, so that a considerable amount of light is directed toward the substrate 151 in the space between the light emitting cells. Such light may be absorbed and lost by the bonding metals 147 and 149. The second reflective metal layer 143 reflects light toward the substrate 151 in the space between the light emitting cells LS1 and LS2 to prevent light loss.

In addition, a protective metal layer 145 may be formed to protect the second reflective metal layer 143. The protective metal layers 135 and the protective metal layer 145 may be formed as a single layer or multiple layers, for example, Ni, Ti, Ta, Pt, W, Cr, Pd and the like.

In addition, bonding metals 147 and 149 are interposed between the substrate 151 and the intermediate insulating layer 141 to bond the substrate 151 on the intermediate insulating layer 141. The bonding metals 147 and 149 may improve adhesion between the intermediate insulating layer 141 and the bonding substrate 151 to prevent the bonding substrate 151 from being separated from the intermediate insulating layer 141.

6 to 11 are cross-sectional views illustrating a method of manufacturing an AC light emitting device according to an embodiment of the present invention.

Referring to FIG. 6, compound semiconductor layers are formed on the sacrificial substrate 121. The sacrificial substrate 121 may be a sapphire substrate, but is not limited thereto, and may be another hetero substrate. Meanwhile, the compound semiconductor layers include the first conductive semiconductor layer 125 and the second conductive semiconductor layer 129 and an active layer 129 interposed therebetween. The first conductivity type semiconductor layer 125 is located close to the sacrificial substrate 121. The first and second conductivity-type semiconductor layers 125 and 129 may be formed in a single layer or multiple layers, respectively. In addition, the active layer 127 may be formed in a single quantum well structure or a multiple quantum well structure.

The compound semiconductor layers may be formed of a III-N-based compound semiconductor, and may be grown on the sacrificial substrate 121 by a process such as metal organic chemical vapor deposition (MOCVD) or molecular beam deposition (MBE). Can be.

Meanwhile, before forming the compound semiconductor layers, a buffer layer (not shown) may be formed. The buffer layer is adopted to mitigate lattice mismatch between the sacrificial substrate 121 and the compound semiconductor layers, and may be a gallium nitride-based material layer such as gallium nitride or aluminum nitride.

Referring to FIG. 7, the compound semiconductor layers are patterned to form a plurality of mesas MS1 and MS2. The mesas may each include a patterned active layer 127a and a second conductivity type semiconductor layer 129a, and may include a portion of the first conductivity type semiconductor layer 125 by overetching. The compound semiconductor layers may be patterned using photolithography and etching processes, which are generally known as mesa etching processes. In this case, the second conductivity-type semiconductor layer 129 and the active layer 127 around the mesas are removed, and the first conductivity-type semiconductor layer 125 is exposed. As shown, the first conductivity type semiconductor layer 125 may be partially etched and removed. As a result, the first conductivity type semiconductor layer 125, the active layer 127a, and the second side of the mesas may be removed. The conductive semiconductor layer 129a is exposed.

Referring to FIG. 8, reflective metal layers 131 are formed on the mesas MS1 and MS2. The reflective metal layers may be formed of silver (Ag) or aluminum (Al) or silver alloy or aluminum alloy, for example. The reflective metal layer 131 may be formed using a plating or deposition technique, for example, using a lift off process. Meanwhile, when the reflective metal layer 131 does not make ohmic contact with the second conductive semiconductor layer 129, an ohmic contact layer (not shown) may be formed before forming the reflective metal layer 131.

Thereafter, an insulating layer 133 is formed to cover the mesas MS1 and MS2 and the exposed first conductive semiconductor layer 125. The insulating layer may be formed of, for example, SiO 2 , SiN, MgO, TaO, TiO 2 , or a polymer. The insulating layer 133 may cover the first conductive semiconductor layer 125 and the active layer 127a exposed on the side surfaces of the mesas and may cover the second conductive semiconductor layers 129a. The insulating layer 133 is patterned to have openings exposing the reflective metal layers 131 and openings 133a exposing the first conductive semiconductor layer 125 around the mesas.

Although the reflective metal layer 131 is formed before the insulating layer 133 is formed, the reflective metal layer 131 may be formed after the insulating layer 133 is formed.

Referring to FIG. 9, a protective metal layer 135 is formed to cover the reflective metal layer 131. The protective metal layer 135 may cover the opening of the insulating layer 133 to cover the reflective metal layer 131. The protective metal layer 135 may be formed of, for example, Ni, Ti, Ta, Pt, W, Cr, or Pd.

Meanwhile, first electrode pads 137a and 138a are formed on the first conductive semiconductor layers 125 exposed through the openings 133a, and second electrode pads are formed on the protective metal layers 135. The fields 137b and 138b are formed. Before forming the first electrode pads 137a and 138a, an ohmic metal layer may be further formed. In addition, when the protective metal layers 135 are omitted, the second electrode pads 137b and 138b may be formed on the reflective metal layer 131. The first and second electrode pads are intended to enhance the adhesion of the wires, and may be omitted.

Referring to FIG. 10, wirings 139 connecting the first electrode pads 137a and 138a and the second electrode pads 137b and 138b are formed. For example, the wirings 139 connect the first electrode pad 137a around the mesa MS1 and the second electrode pad 138b on the mesa MS2 with each other. In this manner, the wirings 139 electrically connect the first conductive semiconductor layer 125 between the mesas and the second conductive semiconductor layer 129a of one of the mesas adjacent thereto.

Referring to FIG. 11, an intermediate insulating layer 141 is formed on almost the entire surface of the sacrificial substrate 121 on which the wirings 139 are formed. The intermediate insulating layer 141 covers the mesas and the wirings. Subsequently, a second reflective metal layer 143 is formed on the intermediate insulating layer 141, and a protective metal layer 145 is formed to cover the second reflective metal layer 143.

The second reflective metal layer 143 may be formed of silver (Ag) or aluminum (Al), or a silver alloy or an aluminum alloy. The protective metal layer 145 prevents diffusion of the metal material to prevent denaturation of the second reflective metal layer 143. The protective metal layer 145 may be formed of a single layer or multiple layers, for example, Ni, Ti, Ta, Pt, W, Cr, Pd and the like.

Meanwhile, a bonding metal 147 is formed on the protective metal layer 145, and a bonding metal 149 is formed on a separate substrate 151. The bonding metal 147 may be formed of, for example, AuSn (80 / 20wt%). The substrate 151 is not particularly limited, but may be a substrate having the same thermal expansion coefficient as the sacrificial substrate 121, for example, a sapphire substrate.

Referring to FIG. 12, a substrate 151 is bonded on the intermediate insulating layer 141 by bonding the bonding metals 147 and 149 to face each other. Subsequently, the sacrificial substrate 121 is removed and the first conductive semiconductor layer 125 is exposed. The sacrificial substrate 121 may be separated by laser lift off (LLO) technology or other mechanical or chemical methods. At this time, the buffer layer is also removed to expose the first conductivity-type semiconductor layer 125. 13 is a diagram illustrating the first conductive semiconductor layer 125 facing upward after the sacrificial substrate 121 is removed.

Referring back to FIG. 5, the exposed first conductive semiconductor layer 125 is separated to space the light emitting cells LS1 and LS2 from each other. The first conductivity-type semiconductor layer 125 may be separated by a photolithography and etching process. In this case, the insulating layer 133 may be exposed in the separated regions. The wirings 139 are prevented from being exposed by the insulating layer 133. Meanwhile, the first conductivity type semiconductor layer 125 is separated such that the light emitting cells are connected in series by the wirings 139. That is, the first conductive semiconductor layers 125a of the light emitting cells adjacent to each other are separated between the first electrode pad and the second electrode pad connected by the wirings 139.

Meanwhile, a roughened surface R may be formed on the first conductivity-type semiconductor layers 125a on the light emitting cells by PEC (photoelectric chemical) etching or the like. Subsequently, the substrate is separated by an AC light emitting device unit including the plurality of light emitting cells, thereby completing a single chip AC light emitting device.

Although the embodiments of the present invention have been described above by way of example, the present invention is not limited to the above-described embodiments and may be variously modified and changed by those skilled in the art without departing from the spirit of the present invention. . Such modifications and variations are included in the scope of the present invention as defined in the following claims.

1 to 4 are cross-sectional views illustrating a method of manufacturing an AC light emitting device according to the prior art.

5 is a cross-sectional view for describing an AC light emitting device according to an embodiment of the present invention.

6 to 13 are cross-sectional views illustrating a method of manufacturing an AC light emitting device according to an embodiment of the present invention.

Claims (10)

Board; A plurality of light emitting cells spaced apart from each other on the substrate, wherein each of the plurality of light emitting cells includes an upper semiconductor layer of a first conductivity type, an active layer, and a lower semiconductor layer of a second conductivity type, wherein the active layer and the lower semiconductor layer are the upper semiconductor; A plurality of light emitting cells positioned below a portion of the layer; Wirings positioned between the substrate and the plurality of light emitting cells and connecting the light emitting cells to form a series array of light emitting cells; An intermediate insulating layer disposed between the light emitting cells and the substrate to cover the light emitting cells and the wirings; And An alternating light emitting device comprising first reflective metal layers interposed between the intermediate insulating layer and the light emitting cells. The method according to claim 1, And a second reflective metal layer interposed between the intermediate insulating layer and the substrate. The method according to claim 1, And an insulating layer covering side surfaces of the light emitting cells such that the wires are spaced apart from the side surfaces of the light emitting cells. The method according to claim 1, Each of the wirings is electrically connected to a lower surface of a lower semiconductor layer and a lower surface of an upper semiconductor layer of neighboring light emitting cells. The method according to claim 1, A light emitting device for alternating current further comprising a protective metal layer covering the first reflective metal layer. The method according to claim 1, The substrate is an alternating light emitting device, characterized in that the sapphire. Compound compound layers including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first and second conductive semiconductor layers are formed on the sacrificial substrate, wherein the first conductive semiconductor is formed. A layer is disposed close to the sacrificial substrate, Patterning the compound semiconductor layers to form a plurality of mesas, wherein the first conductivity type semiconductor layer is exposed around the mesas, Forming first reflective metal layers on the mesas, Forming an insulating layer covering the mesas and the exposed first conductive semiconductor layer, wherein the insulating layer exposes the openings exposing the upper portions of the mesas and the first conductive semiconductor layer between the mesas. With openings, Forming interconnections electrically connecting the mesas and the first conductive semiconductor layers exposed adjacent thereto, An intermediate insulating layer is formed on the sacrificial substrate on which the wirings are formed; Bonding a substrate over the intermediate insulating layer, Removing the sacrificial substrate to expose the first conductivity type semiconductor layer, Forming a plurality of light emitting cells spaced apart from each other by separating the exposed first conductive semiconductor layer, wherein the first conductive semiconductor layer is separated so that the plurality of light emitting cells are connected in series by the wirings. Light-emitting element manufacturing method for AC. The method of claim 7, A method of manufacturing a light emitting device for ac further comprising forming a second reflective metal layer on the intermediate insulating layer. The method of claim 7, And forming protective metal layers covering the first reflective metal layers. The method according to claim 9, And forming a first electrode pad on the first conductive semiconductor layer exposed between the mesas, and forming a second electrode pad on the protective metal layer, wherein the wirings are formed on the first and second electrodes. Light emitting device for alternating current connecting the pads.
KR20080095927A 2008-09-30 2008-09-30 Light emitting device for ac operation and method of fabricating the same KR101093117B1 (en)

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