KR20100008966A

KR20100008966A - Method for fabricating semiconductor device

Info

Publication number: KR20100008966A
Application number: KR1020080069617A
Authority: KR
Inventors: 김대균
Original assignee: 엘지전자 주식회사
Priority date: 2008-07-17
Filing date: 2008-07-17
Publication date: 2010-01-27

Abstract

PURPOSE: A method for manufacturing a semiconductor device is provided to maintain liner silicon nitride on the whole side wall of the element isolation layer adjacent to the transistor. CONSTITUTION: A semiconductor substrate(100) in which a pad oxide layer(120), a nitride layer, and an additional pad layer are successively formed is etched selectively to form a trench. An oxidation process is performed on the bottom and side face of the trench to form a thermal oxide layer(160). Liner silicon nitride(180) is formed on the whole surface of the semiconductor substrate including a thermal oxide layer. The liner silicon nitride is etched so that a spacer structure remains on both side walls of the trench. An oxide layer(200) for gap fill is formed on the semiconductor substrate including the trench so that the trench is buried. Chemical mechanical polishing is performed on the whole face of the semiconductor substrate.

Description

Method for manufacturing a semiconductor device {Method for fabricating semiconductor device}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device capable of preventing a pivot.

As the development of semiconductor device manufacturing technology and its application field are expanding, research and development on the increase in the degree of integration of semiconductor devices has been rapidly developed. As the degree of integration of semiconductor devices increases, studies on the miniaturization of semiconductor devices based on microprocessing technology have been conducted. In the technology of miniaturization of semiconductor devices, in order to integrate devices, a technology of reducing a device isolation film that separates devices has emerged as one of the important items.

In general, local oxidation of silicon (LOCOS) device isolation has been used as a device isolation technology. Since LOCOS thermally oxidizes the silicon wafer itself using a nitride film as a mask, the process is simple, and there is a big advantage that the element stress problem of the oxide film is small, and that the resulting oxide film quality is good.

However, when the LOCOS device isolation method is used, the area occupied by the device isolation region is not only limited in miniaturization but also causes bird's beak. To overcome this, trench isolation is a device isolation technology that replaces LOCOS.

The trench isolation method uses a dry etching technique such as reactive ion etching (RIE) or plasma etching to form narrow and deep trenches, and fills an insulator with a trench in the silicon wafer by filling an oxide film therein. The problem with Buzz Beek is eliminated. In addition, since the filled trench is flat, the area occupied by the device isolation region is small, which is advantageous for miniaturization.

Next, a conventional method of manufacturing a semiconductor device using a trench will be described with reference to the accompanying drawings.

1A to 1D are cross-sectional views illustrating a method of manufacturing a conventional semiconductor device.

First, as illustrated in FIG. 1A, a photoresist pattern (not shown) for sequentially stacking the pad oxide layer 12 and the nitride layer 14 on the semiconductor substrate 10 and exposing the isolation region of the nitride layer 14 is formed. do. Using the photoresist pattern as a mask, a trench is formed by selectively etching the pad oxide film 12, the nitride film 14, and the semiconductor substrate 10.

Subsequently, after the trench is formed, the photoresist pattern is removed and a cleaning process is performed. Subsequently, a thermal oxide film 16 is formed on the lower side and the sidewall of the trench in order to recover the etch damage on the surface of the etched semiconductor substrate 10 and to improve the adhesion between the filling material to be performed in a subsequent process.

Next, as shown in FIG. 1B, a liner silicon nitride (Liner SiN) 18 is deposited on the entire surface of the semiconductor substrate 10 including the pad oxide film 12 and the nitride film 14. The gap fill oxide film 20 is deposited on the entire surface of the semiconductor substrate 10 including the liner silicon nitride 18 to completely fill the trench.

Then, as shown in FIG. 1C, the resultant is planarized through a chemical mechanical polishing (CMP) process, and then the nitride layer 14 is removed by wet etching using phosphoric acid.

After the trench is formed through the above process, a semiconductor device is manufactured through a subsequent process of forming transistor devices.

However, in the method of manufacturing a semiconductor device of the related art, the trench isolation method has a problem in that the upper part of the liner silicon nitride is also removed when the nitride film is removed by wet etching, thereby forming a divot. Such a divot causes an inter-transistor bridge when the gate material is filled into the divot and left unremoved during the subsequent gate forming process.

Accordingly, an object of the present invention is to provide a method for manufacturing a semiconductor device that can prevent the pivot (Divot).

A method of manufacturing a semiconductor device according to the present invention includes forming a trench by selectively etching a semiconductor substrate on which a pad oxide film, a nitride film, and an additional pad film are sequentially formed; Forming a thermal oxide film on the bottom and side surfaces of the trench through an oxidation process; Forming a liner silicon nitride on the entire surface of the semiconductor substrate including the thermal oxide film; Etching the liner silicon nitride so as to remain on both sidewalls of the trench in a spacer structure; Filling the trench by forming an oxide film for gap fill on the entire surface of the semiconductor substrate including the trench; Chemical mechanical polishing the entire surface of the semiconductor substrate; It characterized in that it comprises the step of removing the nitride film.

As described above, the method of manufacturing a semiconductor device according to the present invention prevents the upper etching of the liner silicon nitride (liner SiN) deposited in the device isolation film to maintain the liner silicon nitride over the entire sidewall of the device isolation film adjacent to the transistor. This protects the transistor from the effects associated with device isolation stress. In addition, by preventing the divot (Divot) that can be formed by the etching of the top liner silicon nitride, it is possible to prevent the transistor-to-transistor bridge that can occur due to the remaining gate material in the divot during the subsequent gate process.

Hereinafter, a device isolation film manufacturing method of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

2A through 2E are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with the present invention.

First, as shown in FIG. 2A, the pad oxide layer 120 and the nitride layer 140 are sequentially stacked on the semiconductor substrate 100, and an additional pad layer 150 is deposited on the nitride layer 140. Here, the additional pad layer 150 may be formed of an oxide layer such as TEOS or a material other than silicon nitride such as polysilicon.

A photoresist pattern (not shown) is formed on the additional pad layer 150 to expose the device isolation region. Using the photoresist pattern as a mask, a trench is formed by selectively etching the pad oxide layer 120, the nitride layer 140, the additional pad layer 150, and the semiconductor substrate 100.

Subsequently, after the trench is formed, the photoresist pattern is removed and a cleaning process is performed. Subsequently, a thermal oxide layer 160 is formed on the lower side and the sidewall of the trench in order to recover the etch damage on the surface of the etched semiconductor substrate 100 and to improve adhesion to the filling material to be performed in a subsequent process.

Next, as shown in FIG. 2B, a liner silicon nitride (Liner SiN) 180 is disposed on the entire surface of the semiconductor substrate 100 including the pad oxide layer 120, the nitride layer 140, and the additional pad layer 150. Deposit.

Then, as shown in FIG. 2C, the liner silicon nitride 180 and the additional pad layer 150 are etched through dry etching, leaving the liner silicon nitride 180 remaining only on both sidewalls of the trench in a spacer structure. . In this case, the uppermost portion of the liner silicon nitride 180 may be positioned in the middle of the pad oxide layer 120, which is a lower material of the nitride layer 140, to be isolated from the nitride layer 140. When dry etching is performed, the thermal oxide layer 160 as well as the liner silicon nitride 180 formed under the trench may be removed and the semiconductor substrate 100 may be etched. Here, the thermal oxide layer 160 may be further grown on the etched trench underneath if necessary.

Thereafter, as illustrated in FIG. 2D, a gap fill oxide layer 200 is deposited on the entire surface of the resultant to completely fill the trench.

As shown in FIG. 2E, the resultant is planarized through a chemical mechanical polishing (CMP) process, and then the nitride layer 140 is removed by wet etching using phosphoric acid.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1A to 1C are cross-sectional views illustrating a conventional method for manufacturing a semiconductor device.

100 semiconductor substrate 120 pad oxide film

140: nitride film 150: additional pad film

160: thermal oxide film 180: liner silicon nitride

200: gap film oxide film

Claims

Selectively etching a semiconductor substrate on which a pad oxide film, a nitride film, and an additional pad film are sequentially formed to form a trench;

Forming a thermal oxide film on the bottom and side surfaces of the trench through an oxidation process;

Forming a liner silicon nitride on the entire surface of the semiconductor substrate including the thermal oxide film;

Etching the liner silicon nitride so as to remain on both sidewalls of the trench in a spacer structure;

Filling the trench by forming an oxide film for gap fill on the entire surface of the semiconductor substrate including the trench;

Chemical mechanical polishing the entire surface of the semiconductor substrate;

The method of manufacturing a semiconductor device comprising the step of removing the nitride film.

The method of claim 1,

And the liner silicon nitride is etched such that an uppermost portion thereof is positioned in the middle of the pad oxide layer.

The method of claim 1,

The liner silicon nitride is a method of manufacturing a semiconductor device, characterized in that the etching through the dry etching.

The method of claim 1,

Etching the liner silicon nitride so as to remain on both sidewalls of the trench in a spacer structure

And etching the liner silicon nitride and the thermal oxide layer formed under the trench together.

The method of claim 1,

The nitride film is a method of manufacturing a semiconductor device, characterized in that to remove by wet etching with phosphoric acid.

The method of claim 1,

After etching the liner silicon nitride,

And further growing a thermal oxide layer on the etched trench lower portion.