KR20090105590A - Multi-bit ferroelectric memory device - Google Patents

Abstract

PURPOSE: A multi-bit ferroelectric memory device is provided to improve integration of the device using a plurality of ferroelectric thin films with different thickness or coercive field. CONSTITUTION: A ferroelectric multiple layer(140) is formed on a bottom electrode(130). The ferroelectric multiple layer is formed by stacking a plurality of ferroelectric thin films(141,142,143) made of ferroelectric material successively. A top electrode(150) is formed on the ferroelectric multiple layer. At least one ferroelectric thin film has at least one of different thickness and coercive field.

Description

Multi-bit ferroelectric memory device

The present invention relates to a nonvolatile memory device, and more particularly to a ferroelectric memory device.

Recently, due to the remarkable development of the information and communication industry, the demand for various memory devices is increasing. In particular, memory devices required for portable terminals, MP3 players and the like are required to be nonvolatile, in which recorded data is not erased even when the power is turned off. Non-volatile memory devices can be electrically stored and erased, and data can be stored even when power is not supplied. Therefore, their applications are increasing in various fields. However, the conventional dynamic random access memory (DRAM) constructed using semiconductors has a volatile characteristic that loses all stored information when power is not supplied. Is being performed.

As a representative nonvolatile memory device, researches on flash memory devices having floating gates electrically isolated from each other have been actively conducted. However, recently, among nonvolatile memory devices, phase change random access memory (PRAM) using phase transition phenomenon, magnetic random access memory (magnetic RAM, MRAM) using magnetoresistance change phenomenon, and spontaneous polarization phenomenon of ferroelectric In addition to ferroelectric random access memory (FRAM), resistance change random access memory (RESRAM) using resistance switching or conductivity switching of metal oxide thin films is the subject of research. . In particular, ferroelectric random access memories have attracted much attention because they have a very simple device structure and a relatively simple manufacturing process compared with other nonvolatile memory devices.

On the other hand, the demand for a large-capacity device is gradually increasing, the research for increasing the integration degree of the device has been made. However, due to scaling down to increase the integration of the device, the tolerance of the process becomes more strict, thereby increasing the defect rate of the device, decreasing the reliability of the device, and increasing the production cost. As a result, the interest of multi-bit ferroelectric random access memory has increased as a method for realizing a large capacity device.

Therefore, a technique for sensing multiple stages in electrical circuits using hysteresis of ferroelectric materials has been studied, but it is only an idea stage that has only been shown, and there is no practical development of a multi-bit ferroelectric random access memory structure. It is true.

The technical problem to be solved by the present invention is to provide a new ferroelectric memory device having a simple structure and capable of implementing multi-bit.

The multi-bit ferroelectric memory device according to the present invention for solving the above technical problem is made of a ferroelectric material, at least one includes a plurality of ferroelectric thin films having a different coercive field.

A first embodiment of a multi-bit ferroelectric memory device according to the present invention for solving the above technical problem is a lower electrode; A ferroelectric composite layer formed on the lower electrode and having a plurality of ferroelectric thin films sequentially formed of ferroelectrics; And an upper electrode formed on the ferroelectric composite layer, wherein at least one ferroelectric thin film of the plurality of ferroelectric thin films differs from another ferroelectric thin film by at least one of a constant electric field and a thickness.

A second preferred embodiment of the multi-bit ferroelectric memory device according to the present invention for solving the above technical problem is a substrate; A ferroelectric composite layer formed on the substrate and having a plurality of ferroelectric thin films sequentially formed of ferroelectrics; A first electrode formed on the substrate and disposed on one side of the ferroelectric composite layer to be in contact with all of the plurality of ferroelectric thin films; And a second electrode formed on the substrate and disposed on the other side of the ferroelectric composite layer to be in contact with all of the plurality of ferroelectric thin films, wherein at least one of the ferroelectric thin films is another ferroelectric thin film. And at least one of a distance from the surface in contact with the constant electric field and the first electrode to the surface in contact with the second electrode is different from each other.

A third embodiment of the multi-bit ferroelectric memory device according to the present invention for solving the above technical problem is a lower electrode; A ferroelectric composite layer formed on the lower electrode and having a plurality of ferroelectric thin films formed of ferroelectrics arranged in the lateral direction of the ferroelectric thin film; And an upper electrode formed on the ferroelectric composite layer, wherein at least one ferroelectric thin film of the plurality of ferroelectric thin films differs from another ferroelectric thin film by at least one of a constant electric field and a thickness.

A fourth embodiment of the multi-bit ferroelectric memory device according to the present invention for solving the above technical problem is a lower electrode; One ferroelectric thin film formed of the ferroelectric or one or more series layers in which a plurality of ferroelectric thin films are sequentially stacked and a plurality of ferroelectric thin films of ferroelectric are arranged side by side on the same plane in the lateral direction. A ferroelectric composite layer in which one or more parallel layers are stacked; And an upper electrode formed on the ferroelectric composite layer, wherein at least one of the ferroelectric thin films of the plurality of ferroelectric thin films provided in the parallel layer has at least one of another ferroelectric thin film and an electric field and a thickness provided in the parallel layer. Are different.

A fifth embodiment of the multi-bit ferroelectric memory device according to the present invention for solving the above technical problem is a lower electrode; A ferroelectric composite layer formed on the lower electrode and the insulating film, the ferroelectric composite layer having a plurality of ferroelectric particles made of a ferroelectric; And an upper electrode formed on the ferroelectric composite layer, wherein at least one of the ferroelectric particles of the plurality of ferroelectric particles is different from other ferroelectric particles and at least one of a constant electric field and a diameter.

Preferably, the plurality of ferroelectric thin films have different residual polarization, and the ferroelectric may include Pb (Zr, Ti) O ₃ (PZT), SrBi ₂ Ta ₂ O ₉ (SBT), (Bi, La) ₄ It may be made of one or more selected from Ti ₃ O ₁₂ (BLT) and BiFeO ₃ (BFO).

According to the present invention, multibits can be implemented by using a plurality of ferroelectric thin films having different thicknesses of the constant electric field or thin film of the ferroelectric, thereby improving the degree of integration of the device. In addition, since the multi-bit can be implemented with a simple structure, the defect rate of the device is reduced and the reliability of the device is increased.

Hereinafter, exemplary embodiments of a multi-bit ferroelectric memory device according to the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention and to those skilled in the art to fully understand the scope of the invention. It is provided to inform you.

1 is a diagram showing the schematic configuration of a first preferred embodiment of a multi-bit ferroelectric memory device according to the present invention.

Referring to FIG. 1, the multi-bit ferroelectric memory device 100 according to the first embodiment of the present invention may include a substrate 110, an insulating layer 120, a lower electrode 130, a ferroelectric composite layer 140, and an upper electrode. And 150.

Substrate 110 is Si, Ge, C, Ga, As, P, B, Zn, Se, S, Cd, Sn, Al, In, SiGe, GaAs, AlGaAs, GaAsP, InAs, Sn, InAsP, InGaAs, AlAs , InP, GaP, ZnSe, CdS, ZnCdS, CdSe and one selected from the group consisting of a combination thereof, preferably a single crystal silicon substrate is used.

The insulating layer 120 is formed on the substrate 110 and serves as a buffer to electrically insulate the substrate 110 from the lower electrode 130 by using an insulator such as SiO ₂ .

The lower electrode 130 is formed on the insulating layer 120 and includes conductive materials platinum (Pt), iridium (Ir), ruthenium (Ru), gold (Au), osmium (Os), and rhenium (Re). , Tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), and combinations thereof. When the silicon substrate doped with the substrate 110 serves as a lower electrode, the insulating layer 120 and the lower electrode 130 may not be necessary.

The ferroelectric composite layer 140 is formed on the lower electrode 130 and has a structure in which a plurality of ferroelectric thin films 141, 142, and 143 made of ferroelectric are sequentially stacked in a direction perpendicular to the substrate. In this case, at least one ferroelectric thin film among the ferroelectric thin films 141, 142, and 143 may have different ferroelectric thin films, at least one of a coercive field (E _c ) and a thickness. That is, the ferroelectric composite layer 140 has a structure in which at least one of the thickness of the constant electric field and the thin film is sequentially stacked in two or more kinds of ferroelectric thin films perpendicular to the substrate. This is to implement multibit. In addition, the ferroelectric thin films 141, 142, and 143 preferably have different residual polarization (P _r ). The ferroelectric thin films 141, 142, and 143 may include Pb (Zr, Ti) O ₃ (PZT), SrBi ₂ Ta ₂ O ₉ (SBT), (Bi, La) ₄ Ti ₃ O ₁₂ (BLT), BiFeO ₃ (BFO) and combinations thereof.

The ferroelectric composite layer 140 may further include intermediate electrodes 146 and 147 between the plurality of ferroelectric thin films 141, 142, and 143, respectively. The intermediate electrodes 146 and 147 serve as electrodes for the respective ferroelectric thin films 141, 142 and 143. Like the lower electrode 130, the intermediate electrodes 146 and 147 are platinum (Pt), iridium (Ir), ruthenium (Ru), gold (Au), osmium (Os), and rhenium (Re) as conductive materials. , Tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), and combinations thereof.

The upper electrode 150 is formed on the ferroelectric composite layer 140 and, like the lower electrode 130 and the intermediate electrodes 146 and 147, platinum (Pt), iridium (Ir), and ruthenium (Ru), which are conductive materials, are formed. , Gold (Au), osmium (Os), rhenium (Re), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), and combinations thereof.

When the ferroelectric composite layer 140 is composed of two ferroelectric thin films having different electric fields E _c and residual polarization P _r , the multi-bit ferroelectric memory device according to the present invention is driven as a multi-bit memory device. The drawings for explanation are shown in FIGS. 2 to 4.

2 and 3 show the electric field-polarization hysteresis of each of the two ferroelectric thin films. For convenience of description, the ferroelectric thin film having a constant electric field of E _{c , 1} and residual polarization of P _{r , 1} is called a first ferroelectric thin film, and the ferroelectric thin film having a constant electric field of E _{c , 2} and residual polarization of P _{r , 2} It is called a second ferroelectric thin film.

2 and 3, the first ferroelectric thin film has a residual polarization of P _{r , 1} when an electric field of E _{c , 1} or more is applied _, and a residual polarization of -P _r when an electric field of -E _{c , 1} or less is applied. _{, 1} . In the second ferroelectric thin film _, when an electric field of E _{c , 2} or more is applied, the residual polarization becomes P _{r , 2} , and when an electric field of -E _{c , 2} or less is applied, the residual polarization becomes -P _{r , 2} .

E _{c, 1} and P _r, than E _{c, 2,} and P _r, when ₂ is greater by _1, the electrical length of the first ferroelectric thin film and a ferroelectric composite layer made of a second ferroelectric thin film (140) - polarization hysteresis and 4 Appears together.

Referring to FIG. 4, when an electric field of E _{c , 2} or more is applied to the ferroelectric composite layer 140, the residual polarization of the ferroelectric composite layer 140 becomes P _{r , 1} + P _{r , 2} . At this time, when an electric field larger than -E _{c , 2} and smaller than -E _{c , 1} is applied to the ferroelectric composite layer 140, the residual polarization of the ferroelectric composite layer 140 becomes -P _{r , 1} + P _{r , 2} . . When an electric field smaller than -E _{c , 2} is applied to the ferroelectric composite layer 140, the residual polarization of the ferroelectric composite layer 140 becomes -P _{r , 1} -P _{r , 2} . Finally, when an electric field larger than E _{c , 1} and smaller than E _{c , 2} is applied to the ferroelectric composite layer 140, the residual polarization of the ferroelectric composite layer 140 becomes P _{r , 1} -P _{r , 2} . That is, the residual polarization of the ferroelectric composite layer 140 is in four states according to the applied electric field, and the electric field larger than -E _{c , 1} and smaller than E _{c, 1} is applied to the ferroelectric composite layer 140 to the residual polarization. By measuring the characteristics exhibited, four states can be read. That is, it can be used as a 4-bit memory device.

As shown in FIG. 4, in order to record in four states, the larger the difference in the electric field between the first ferroelectric thin film and the second ferroelectric thin film is, the better. In order to clearly read the four states, the larger the difference in residual polarization between the first ferroelectric thin film and the second ferroelectric thin film is, the better. The actual ferroelectric memory device 100 is operated by the voltage applied to the ferroelectric composite layer 140, and the value measured is the amount of charge. Therefore, the electric field applied to the first ferroelectric thin film and the second ferroelectric thin film is proportional to the voltage and inversely proportional to the thickness of each thin film. Therefore, even when the constant electric field and the residual polarization of the first ferroelectric thin film and the second ferroelectric thin film are the same, four states can be created by varying the thicknesses of the first ferroelectric thin film and the second ferroelectric thin film. Also in this case, as described above, the larger the difference between the thicknesses of the first ferroelectric thin film and the second ferroelectric thin film is, the better.

Since the electric field and residual polarization of ferroelectrics are inherent in each material, they change as the material changes. For example, the first ferroelectric thin film may be formed of PZT and the second ferroelectric thin film may be formed of BFO. If the composition is changed, the constant electric field and residual polarization change even with the same material. For example, the first of a ferroelectric thin film and a second ferroelectric thin film be constituted both by PZT, the first ferroelectric thin film and a _{Pb (Zr 0 .1 Ti 0 .9} ) O 3 consisting of _{Pb (Zr 0 .52 Ti 0 .48} ) O 3 The ferroelectric composite layer 140 having a different electric field and residual polarization may be formed using the formed second ferroelectric thin film. This configuration is shown in FIG.

FIG. 5 is a diagram showing a schematic configuration of a multi-bit ferroelectric memory device in which two Pb (Zr, Ti) O ₃ (PZT) layers having different compositions are used as the ferroelectric thin film in the first embodiment.

5, the multi-bit ferroelectric memory according to the present invention, device 500 is a silicon substrate 510 on the Pt lower electrode (520), Pb (Zr _{0 .52 0 .48} Ti) O ₃ of claim 1 consisting of the ferroelectric thin-film (530), the intermediate electrode Pt _{(540), Pb (Zr 0} .1 Ti 0 .9) O 3 second ferroelectric thin film 550 and the Pt upper electrode 560 made of to have a sequentially stacked structure . Here, the structure in which the first ferroelectric thin film 530, the Pt intermediate electrode 540, and the second ferroelectric thin film 550 are sequentially stacked corresponds to the ferroelectric composite layer 140 of FIG. 1.

Experimental Example

The first ferroelectric thin film 530 was formed to a thickness of 1000 nm, and the second ferroelectric thin film 550 was formed to a thickness of 500 nm. The constant electric field of the first ferroelectric thin film 530 is 90 kV / cm, and the residual polarization is 30 μC / cm ² . The constant electric field of the second ferroelectric thin film 550 is 30 kV / cm, and the residual polarization is 23 μC / cm ² . 6 and 7 show the characteristics of the multi-bit ferroelectric memory device 500 formed as described above.

6 illustrates a change in capacitance value with respect to voltage when a voltage is applied between the intermediate electrode 540 and the upper electrode 560.

Referring to FIG. 6, the graph denoted by reference numeral 610 is a graph showing a change in capacitance value when the voltage is swept from 20V to -20V, and the graph denoted by 620 denotes a voltage from -20V to 20V. It is a graph showing the change in capacitance value when sweeping. The graph 610 that sweeps the voltage from 20V to -20V shows the maximum capacitance value at -6.7V as shown by the arrow indicated by the reference number 630, and the graph 620 that sweeps the voltage from -20V to 20V at the reference number 640. As shown by the arrow, the maximum capacitance value appears at 6.5V. That is, when a voltage is applied between the intermediate electrode 540 and the upper electrode 560, only one characteristic of the second ferroelectric thin film 550 appears, as shown in FIG. Typical ferroelectric properties of the bimodal form are shown.

FIG. 7 illustrates a change in capacitance value with respect to voltage when a voltage is applied between the lower electrode 520 and the upper electrode 560.

Referring to FIG. 7, the graph indicated by reference numeral 710 is a graph of change in capacitance value when the voltage is swept from 20V to -20V, and the graph indicated by reference numeral 720 is when the voltage is swept from -20V to 20V. A graph showing the change in capacitance value of. A graph 710 of voltage sweep from 20V to -20V shows two maximal values at -5V and 0.3V, as indicated by arrows 730 and 740. The graph 720 sweeping the voltage from -20V to 20V shows two maximal values at -0.5V and 5V, as indicated by arrows indicated by reference numeral 750 and reference numeral 760. That is, when a voltage is applied between the lower electrode 520 and the upper electrode 560, the first ferroelectric thin film 530 and the second ferroelectric thin film 550 are mixed, and as shown in FIG. 7, You can get a graph of four local maxima. This means that the residual polarization has four states, i.e., the ferroelectric memory element 500 shown in Fig. 5 can be used as a 4 bit memory element.

2 to 7 illustrate the case in which the ferroelectric composite layer 140 is formed of two types of ferroelectric thin films, more specifically, at least one of the thickness of the constant electric field and the thin film is made of two types of ferroelectric thin films. In the case of the multi-bit ferroelectric memory device having the ferroelectric composite layer 140 formed of three or more kinds of ferroelectric thin films, the same is true. However, when the ferroelectric composite layer 140 is formed of three types of ferroelectric thin films having different electric fields or thicknesses, the ferroelectric composite layer 140 may be used as an 8-bit ferroelectric memory device. ) Can be used as a 16-bit ferroelectric memory. That is, when the ferroelectric composite layer 140 is formed of n ferroelectric thin films having a constant electric field or a thickness, it may be used as a 2 ⁿ bit ferroelectric memory. Therefore, the ferroelectric memory device according to the present invention can record a large amount of information, thereby improving the degree of integration of the device. In addition, the device structure is simple, the production cost is reduced, the process tolerance is not strict, the defect rate is reduced and the reliability of the device is increased.

Fig. 8 shows a schematic structure of a second preferred embodiment of a multi-bit ferroelectric memory device according to the present invention.

Referring to FIG. 8, the multi-bit ferroelectric memory device 800 according to the second embodiment of the present invention includes a substrate 810, an insulating layer 820, a ferroelectric composite layer 830, a first electrode 840, and a first electrode. A second electrode 850 and a passivation layer 860 are provided.

As in the case of the first embodiment 100, the substrate 810 is formed of Si, Ge, C, Ga, As, P, B, Zn, Se, S, Cd, Sn, Al, In, SiGe, GaAs, AlGaAs, GaAsP, InAs, Sn, InAsP, InGaAs, AlAs, InP, GaP, ZnSe, CdS, ZnCdS, CdSe and one selected from the group consisting of a combination thereof, preferably a single crystal silicon substrate is used.

The insulating layer 820 is formed on the substrate 810 and is made of an insulator such as SiO ₂ to electrically connect the substrate 810 and the ferroelectric composite layer 830 and between the substrate 810 and the first electrode 840. It acts as a buffer to isolate.

The ferroelectric composite layer 830 has a structure in which a plurality of ferroelectric thin films 831, 832, and 833 made of ferroelectric are sequentially stacked. In this case, at least one ferroelectric thin film among the ferroelectric thin films 831, 832, and 833 is formed differently from other ferroelectric thin films. This is to implement multi-bit as described above. In addition, the ferroelectric thin films 831, 832, and 833 preferably have different current polarizations. The ferroelectric thin films 831, 832, 833 are formed of Pb (Zr, Ti) O ₃ (PZT), SrBi ₂ Ta ₂ O ₉ (SBT), (Bi, La) ₄ Ti ₃ O ₁₂ (BLT), BiFeO ₃ ( BFO) and combinations thereof. Even in this case, the larger the difference between the electric field and the current polarization is, the better, for clear writing and reading of the device as described above.

The ferroelectric composite layer 830 may further include buffer layers 836 and 837 between the plurality of ferroelectric thin films 831, 832, and 833. The buffer layers 836 and 837 are made of an insulator such as SiO ₂ to electrically insulate between the ferroelectric thin films 831, 832 and 833, and leak current at the interface of the ferroelectric thin films 831, 832 and 833. It acts as a buffer to reduce current).

The first electrode 840 is formed on the insulating layer 820, and is disposed to contact all of the ferroelectric thin films 831, 832, and 833 on one side of the ferroelectric composite layer 830. The first electrode 840 is a conductive material platinum (Pt), iridium (Ir), ruthenium (Ru), gold (Au), osmium (Os), rhenium (Re), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN) and combinations thereof.

The second electrode 850 is formed on the substrate 810, and is disposed to contact all of the ferroelectric thin films 831, 832, and 833 on the other side of the ferroelectric composite layer 830. Similar to the first electrode 840, the second electrode 850 includes platinum (Pt), iridium (Ir), ruthenium (Ru), gold (Au), osmium (Os), and rhenium (Re). , Tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), and combinations thereof.

The protective layer 860 is formed on the ferroelectric composite layer 830 and is made of an insulator such as SiO ₂ to prevent the surface of the ferroelectric composite layer 830 from being exposed.

In the case of the multi-bit ferroelectric memory device 800 according to the second embodiment, unlike the multi-bit ferroelectric memory device 100 according to the first embodiment, the ferroelectric thin films 831, 832, and 833 provided in the ferroelectric composite layer 830 are provided. Multi-bit is not implemented with the same electric field and different thickness. This is because in the multi-bit ferroelectric memory device 800 according to the second embodiment, the thickness of the ferroelectric thin films 831, 832, and 833 provided in the ferroelectric composite layer 830 is not a distance between electrodes. Instead, the distance from the surface in contact with the first electrode 840 of the ferroelectric thin films 831, 832, 833 to the surface in contact with the second electrode 850 even though the constant electric fields of the ferroelectric thin films 831, 832, 833 are the same. Multibits can be implemented by differentiating. This is shown in FIG. 9.

9 is a diagram showing a schematic configuration of a preferred modified embodiment of the second embodiment.

Referring to FIG. 9, the multi-bit ferroelectric memory device 900 according to the modification is similar to the multi-bit ferroelectric memory device 800 according to the second embodiment of the present invention. The substrate 910, the insulating layer 920, and the ferroelectric composite layer ( 930, a first electrode 940, a second electrode 950, and a protective layer 960 are provided. Here, the substrate 910, the insulating layer 920, the first electrode 940, the second electrode 950, and the protective layer 960 included in the multi-bit ferroelectric memory device 900 according to the modification are illustrated in FIG. 8. The substrate 810, the insulating layer 820, the first electrode 840, the second electrode 850, and the protective layer 860 provided in the multi-bit ferroelectric memory device 800 according to the second embodiment of the present invention. Corresponding.

However, the ferroelectric composite layer 930 included in the multi-bit ferroelectric memory device 900 according to the modified example may include the ferroelectric composite layer 830 provided in the multi-bit ferroelectric memory device 800 according to the second embodiment of FIG. 8. Slightly different. The ferroelectric composite layer 930 has a structure in which the first ferroelectric thin film 931, the buffer layer 936, and the second ferroelectric thin film 932 are sequentially stacked. At this time, even if the first field of the ferroelectric thin film 931 and the second ferroelectric thin film 932 is the same, the distance from the surface in contact with the first electrode 940 to the surface in contact with the second electrode 950, respectively Differently, multibits can be implemented. That is, the distance between the first electrode 940 and the second electrode 950 corresponds to the thickness of the ferroelectric thin films 141, 142, and 143 of the multi-bit ferroelectric memory device 100 according to the first embodiment. When the voltage is applied through the first electrode 940 and the second electrode 950, the electric field applied to the first ferroelectric thin film 931 and the second ferroelectric thin film 932 is changed. Therefore, as described above, even if the constant electric field is the same, if the structure has the same structure as that of the multi-bit ferroelectric memory device 900 according to the modification, multi-bit can be implemented.

As described above, the ferroelectric composite layer 930 including two types of ferroelectric thin films 931 and 932 having different distances from the surface in contact with the first electrode 940 to the surface in contact with the second electrode 950 is different. However, the present invention is not limited thereto, and of course, the present invention is also applicable to three or more types of ferroelectric thin films.

In the case where n types of ferroelectric thin films having different distances from the surface in contact with the constant field or the first electrode 940 to the surface in contact with the second electrode 950 are used, the multi-bit ferroelectric according to the first embodiment is used. Like the memory device 100, the 2 ^n- bit ferroelectric memory device is also described above.

Fig. 10 shows a schematic structure of a third preferred embodiment of a multi-bit ferroelectric memory device according to the present invention.

Referring to FIG. 10, the multi-bit ferroelectric memory device 1000 according to the third embodiment of the present invention may include a substrate 1010, an insulating layer 1020, a lower electrode 1030, a ferroelectric composite layer 1040, and an upper electrode. 1050.

The substrate 1010, the insulating layer 1020, the lower electrode 1030, and the upper electrode 1050 included in the multi-bit ferroelectric memory device 1000 according to the third embodiment are multi-bit ferroelectric memory according to the first embodiment. The substrate 110 corresponds to the substrate 110, the insulating layer 120, the lower electrode 130, and the upper electrode 150 of the device 100.

The ferroelectric composite layer 1040 is formed on the lower electrode 1030, and a plurality of ferroelectric thin films 1044, 1045, 1046, and 1047 made of ferroelectrics are laterally oriented with respect to each other on a plane parallel to the top surface of the substrate 1010. It has a structure arranged in. In this case, at least one of the ferroelectric thin films 1044, 1045, 1046, and 1047 may have different ferroelectric thin films, at least one of a constant electric field, and a thickness. This is to implement multi-bit as described above. In addition, the ferroelectric thin films 1044, 1045, 1046, and 1047 may have different residual polarizations. Ferroelectric thin films 1044, 1045, 1046, 1047 are Pb (Zr, Ti) O ₃ (PZT), SrBi ₂ Ta ₂ O ₉ (SBT), (Bi, La) ₄ Ti ₃ O ₁₂ (BLT), BiFeO ₃ (BFO) and combinations thereof.

The ferroelectric composite layer 1040 may further include a buffer layer 1048 between each of the ferroelectric thin films 1044, 1045, 1046, and 1047. The buffer layer 1048 is made of an insulator such as SiO _2, and electrically insulates the ferroelectric thin films 1044, 1045, 1046, and 1047 to prevent leakage current at the interface of each of the ferroelectric thin films 1044, 1045, 1046, and 1047. It acts as a buffer to prevent it from happening.

In addition, the ferroelectric thin film denoted by reference numeral 1044 may have a structure in which ferroelectric layers 1041 and 1042 made of ferroelectric are sequentially stacked. The ferroelectric layers 1041 and 1042 include Pb (Zr, Ti) O ₃ (PZT), SrBi ₂ Ta ₂ O ₉ (SBT), (Bi, La) ₄ Ti ₃ O ₁₂ (BLT), BiFeO ₃ (BFO) and It can be made of a combination of these. The ferroelectric thin film denoted by reference numeral 1044 may further include an intermediate electrode 1043 between the ferroelectric layers 1041 and 1042. The intermediate electrode 1043 serves as a buffer between the ferroelectric layers 1041 and 1042 and also serves as an electrode for each ferroelectric layer 1041 and 1042. The intermediate electrode 1043 is a conductive material platinum (Pt), iridium (Ir), ruthenium (Ru), gold (Au), osmium (Os), rhenium (Re), tantalum nitride (TaN), hafnium nitride ( HfN), zirconium nitride (ZrN) and combinations thereof.

The ferroelectric composite layer 1040 of the four ferroelectric thin films 1044, 1045, 1046, and 1047, and one of the four ferroelectric thin films 1044 made of two ferroelectric layers 1041 and 1042, has been illustrated and described. The ferroelectric composite layer 1040 including the ferroelectric thin film and the ferroelectric layer in an appropriate number is not limited thereto, and the like.

Fig. 11 shows a schematic structure of a fourth preferred embodiment of a multi-bit ferroelectric memory device according to the present invention.

Referring to FIG. 11, the multi-bit ferroelectric memory device 1100 according to the fourth embodiment of the present invention may include a substrate 1110, an insulating layer 1120, a lower electrode 1130, a ferroelectric composite layer 1180, and an upper electrode. 1190.

The substrate 1110, the insulating layer 1120, the lower electrode 1130, and the upper electrode 1190 provided in the multi-bit ferroelectric memory device 1100 according to the fourth embodiment are multi-bit ferroelectric memory according to the first embodiment. The substrate 110 corresponds to the substrate 110, the insulating layer 120, the lower electrode 130, and the upper electrode 150 of the device 100.

The ferroelectric composite layer 1180 is formed on the lower electrode 1130 and has a structure in which the first series layer 1140, the parallel layer 1150, and the second series layer 1160 are sequentially stacked. The first serial layer 1140 is formed of one ferroelectric thin film 1140 made of ferroelectric. The parallel layer 1150 has a structure in which ferroelectric thin films 1151 and 1152 formed of two ferroelectrics are arranged in the lateral direction. The second serial layer 1160 has a structure in which ferroelectric thin films 1161 and 1162 formed of two ferroelectrics are sequentially stacked.

In this case, at least one of the ferroelectric thin films 1140, 1151, 1152, 1161, and 1162 may have different ferroelectric thin films, at least one of a constant electric field, and a thickness. This is to implement multi-bit as described above. In addition, it is preferable that the ferroelectric thin films 1140, 1151, 1152, 1161, and 1162 have different residual polarizations. Ferroelectric thin films 1140, 1151, 1152, 1161, and 1162 include Pb (Zr, Ti) O ₃ (PZT), SrBi ₂ Ta ₂ O ₉ (SBT), (Bi, La) ₄ Ti ₃ O ₁₂ (BLT) , BiFeO ₃ (BFO) and combinations thereof.

The ferroelectric composite layer 1180 may include a first insertion electrode 1170 formed between the first serial layer 1140 and the parallel layer 1150, and a second formed between the parallel layer 1150 and the second series layer 1160. It may further include an insertion electrode 1175. The first insertion electrode 1170 serves as an upper electrode for the first series layer 1140, and serves as a lower electrode for the parallel layer 1150. The second insertion electrode 1175 may serve as an upper electrode for the parallel layer 1150, and serve as a lower electrode for the second series layer 1160. The first insertion electrode 1170 and the second insertion electrode 1175 are platinum (Pt), iridium (Ir), ruthenium (Ru), gold (Au), osmium (Os), and rhenium (Re) as conductive materials. , Tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), and combinations thereof.

The second serial layer 1160 including two ferroelectric thin films 1161 and 1162 may further include a series intermediate electrode 1163 formed between the ferroelectric thin films 1161 and 1162. The series intermediate electrode 1163 serves as an electrode of each ferroelectric thin film 1161 and 1162. The series intermediate electrode 1163 is a conductive material of platinum (Pt), iridium (Ir), ruthenium (Ru), gold (Au), osmium (Os), rhenium (Re), tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN) and combinations thereof.

The parallel layer 1150 may further include a buffer layer 1153 formed between two ferroelectric thin films 1151 and 1152. The buffer layer 1153 is made of an insulator such as SiO ₂ to serve as a buffer between two ferroelectric thin films 1151 and 1152. Similarly to the ferroelectric thin film indicated by reference numeral 1044 of the multi-bit ferroelectric memory device 1000 according to the third embodiment, at least one of the ferroelectric thin films 1151 and 1152 provided in the parallel layer 1150 is made of ferroelectric The layers may be formed in a structure in which the layers are sequentially stacked. In the case where the ferroelectric layers are sequentially stacked, a parallel intermediate electrode (not shown) may be formed between each of the ferroelectric layers. Parallel intermediate electrodes are conductive materials platinum (Pt), iridium (Ir), ruthenium (Ru), gold (Au), osmium (Os), rhenium (Re), tantalum nitride (TaN) and hafnium nitride (HfN) , Zirconium nitride (ZrN) and combinations thereof.

The fourth embodiment also applies to the case of the ferroelectric composite layer in which the appropriate number of ferroelectric thin films are included, as well as the first to third embodiments, not only limited to the form shown in FIG. The first serial layer 1140 and the second serial layer 1160 shown in FIG. 11 may be formed in the form of the ferroelectric composite layer 140 of the first embodiment, and the parallel layer 1150 may be formed in the third embodiment. The ferroelectric composite layer 1040 may be formed. It is also possible to form a plurality of serial layers and a plurality of parallel layers stacked in any order.

Fig. 12 shows a schematic structure of a fifth preferred embodiment of a multi-bit ferroelectric memory device according to the present invention.

Referring to FIG. 12, the multi-bit ferroelectric memory device 1200 according to the fifth embodiment of the present invention may include a substrate 1210, an insulating layer 1220, a lower electrode 1230, a ferroelectric composite layer 1240, and an upper electrode. 1250.

The substrate 1210, the insulating layer 1220, the lower electrode 1230, and the upper electrode 1250 provided in the multi-bit ferroelectric memory device 1200 according to the fifth embodiment are multi-bit ferroelectric memory according to the first embodiment. The substrate 110 corresponds to the substrate 110, the insulating layer 120, the lower electrode 130, and the upper electrode 150 of the device 100.

The ferroelectric composite layer 1240 includes an insulating film 1241 and a plurality of ferroelectric particles 1242. The insulating film 1241 is formed on the lower electrode 1230 and is formed of SiO ₂ , SiN _x , SiON _x , Al ₂ O ₃ , HfO ₂ , ZrO ₂ , Y ₂ O ₃ , HfAlO, HfSiO ZrSiO, and a combination thereof. Can be. Ferroelectric particles 1242 are formed in the insulating film 1241, and Pb (Zr, Ti) O ₃ (PZT), SrBi ₂ Ta ₂ O ₉ (SBT), (Bi, La) ₄ Ti ₃ O ₁₂ (BLT) , BiFeO ₃ (BFO) and combinations thereof. In this case, at least one of the ferroelectric particles of the ferroelectric particles 1242 is different from the other ferroelectric particles and at least one of the constant electric field and the diameter. This is to implement multi-bit as described above. In addition, the ferroelectric particles 1242 preferably have different residual polarizations. The ferroelectric particles 1242 can be easily formed by spin coating with a solvent. When the ferroelectric particles 1242 having different electric fields or diameters are formed in the insulating film, the multi-bit ferroelectric memory device 1200 having various residual polarizations as described above can be manufactured.

Although the preferred embodiments of the present invention have been shown and described above, the present invention is not limited to the specific preferred embodiments described above, and the present invention belongs to the present invention without departing from the gist of the present invention as claimed in the claims. Various modifications can be made by those skilled in the art, and such changes are within the scope of the claims.

FIG. 1 is a diagram showing a schematic configuration of a first preferred embodiment of a multi-bit ferroelectric memory device according to the present invention.

2 to 4 are conceptual views for explaining that the multi-bit ferroelectric memory device according to the present invention is driven as a multi-bit memory device.

FIG. 5 is a diagram showing a schematic configuration of a multi-bit ferroelectric memory device in which two Pb (Zr, Ti) O ₃ (PZT) layers having different compositions are used as the ferroelectric thin film in the first embodiment.

FIG. 6 illustrates a change in capacitance value when a voltage is applied to one PZT layer in the multi-bit ferroelectric memory device having the structure of FIG. 5.

FIG. 7 is a diagram illustrating a change in capacitance values when voltages are applied to two PZT layers in a multi-bit ferroelectric memory device having the structure of FIG. 5.

Fig. 8 shows a schematic structure of a second preferred embodiment of a multi-bit ferroelectric memory device according to the present invention.

9 is a diagram showing a schematic configuration of a preferred modified embodiment of the second embodiment.

Fig. 10 shows a schematic structure of a third preferred embodiment of a multi-bit ferroelectric memory device according to the present invention.

FIG. 11 shows a schematic configuration of a fourth preferred embodiment of a multi-bit ferroelectric memory device according to the present invention.

Fig. 12 shows a schematic structure of a fifth preferred embodiment of a multi-bit ferroelectric memory device according to the present invention.

Claims (25)

A multibit ferroelectric memory device, comprising: a plurality of ferroelectric thin films of ferroelectric material, at least one of which has a different coercive field. The method of claim 1, And a plurality of ferroelectric thin films having different residual polarizations. Lower electrode; A ferroelectric composite layer formed on the lower electrode and having a plurality of ferroelectric thin films sequentially formed of ferroelectrics; And And an upper electrode formed on the ferroelectric composite layer. At least one ferroelectric thin film of the plurality of ferroelectric thin film is a multi-bit ferroelectric memory device, characterized in that the at least one of the other ferroelectric thin film and the electric field and thickness are different. The method of claim 3, And the plurality of ferroelectric thin films have different residual polarizations. The method of claim 3, The ferroelectric composite layer further comprises an intermediate electrode formed between each of the plurality of ferroelectric thin films. Board; A ferroelectric composite layer formed on the substrate and having a plurality of ferroelectric thin films sequentially formed of ferroelectrics; A first electrode formed on the substrate and disposed on one side of the ferroelectric composite layer to be in contact with all of the plurality of ferroelectric thin films; And And a second electrode formed on the substrate and disposed on the other side of the ferroelectric composite layer to be in contact with all of the plurality of ferroelectric thin films. At least one of the ferroelectric thin films of the plurality of ferroelectric thin films is characterized in that at least one of the distance between the other ferroelectric thin film and the surface of the constant electric field and the first electrode in contact with the second electrode is different from each other Bit ferroelectric memory. The method of claim 6, And the plurality of ferroelectric thin films have different residual polarizations. The method of claim 6, The ferroelectric composite layer further comprises a buffer layer made of an insulator between the plurality of ferroelectric thin films. The method of claim 6, A multi-bit ferroelectric memory device formed on the ferroelectric composite layer, further comprising a protective layer made of an insulator. Lower electrode; A ferroelectric composite layer formed on the lower electrode and having a plurality of ferroelectric thin films formed of ferroelectrics arranged laterally with respect to the ferroelectric thin films on a surface parallel to the upper surface of the lower electrode; And And an upper electrode formed on the ferroelectric composite layer. At least one ferroelectric thin film of the plurality of ferroelectric thin film is a multi-bit ferroelectric memory device, characterized in that the at least one of the other ferroelectric thin film and the electric field and thickness are different. The method of claim 10, And the plurality of ferroelectric thin films have different residual polarizations. The method of claim 10, And the ferroelectric composite layer is formed between the plurality of ferroelectric thin films, and further includes a buffer layer made of an insulator. The method of claim 10, At least one of the ferroelectric thin film is a multi-bit ferroelectric memory device, characterized in that a plurality of ferroelectric layers made of a ferroelectric is sequentially stacked. The method of claim 13, The ferroelectric thin film formed by sequentially stacking two or more ferroelectric layers, And a middle electrode formed between each of the ferroelectric layers. Lower electrode; One ferroelectric thin film formed on the lower electrode, or one or more series layers in which a plurality of ferroelectric thin films are sequentially stacked, and a plurality of ferroelectric thin films made of a ferroelectric dielectric are disposed laterally with respect to each other. A ferroelectric composite layer in which one or more parallel layers arranged on a plane parallel to the top surface are stacked; And And an upper electrode formed on the ferroelectric composite layer. At least one ferroelectric thin film of the ferroelectric thin film is a multi-bit ferroelectric memory device, characterized in that the at least one of the other ferroelectric thin film and the electric field and thickness are different. The method of claim 15, The multi-bit ferroelectric memory device, characterized in that the residual polarization of the ferroelectric thin film provided in the serial layer and the parallel layer is different. The method of claim 15, And the ferroelectric composite layer further comprises an insertion electrode formed between each of the series layer and the parallel layer. The method of claim 15, The serial layer has a structure in which a plurality of ferroelectric thin films are sequentially stacked, And the series layer further comprises a series intermediate electrode formed between each of the plurality of ferroelectric thin films. The method of claim 15, The parallel layer is formed between each of the plurality of ferroelectric thin film provided in the parallel layer, the multi-bit ferroelectric memory device, characterized in that it further comprises a buffer layer made of an insulator. The method of claim 15, At least one of the plurality of ferroelectric thin films provided in the parallel layer is a multi-bit ferroelectric memory device, characterized in that a plurality of ferroelectric layers made of a ferroelectric is sequentially stacked. The method of claim 20, The ferroelectric thin film formed by sequentially stacking the plurality of ferroelectric layers, And a parallel intermediate electrode formed between each of said plurality of ferroelectric layers. Lower electrode; A ferroelectric composite layer having an insulating film formed on the lower electrode and a plurality of ferroelectric particles formed in the insulating film and formed of a ferroelectric material; And And an upper electrode formed on the ferroelectric composite layer. At least one of the ferroelectric particles of the plurality of ferroelectric particles, the multi-bit ferroelectric memory device, characterized in that different ferroelectric particles and at least one of the electric field and the diameter. The method of claim 22, And the plurality of ferroelectric particles have different residual polarizations. The method of claim 22, The insulating film is a multi-bit ferroelectric memory device, characterized in that made of one or more selected from SiO ₂ , SiN _x , SiON _x , Al ₂ O ₃ , HfO ₂ , ZrO ₂ , Y ₂ O ₃ , HfAlO, HfSiO and ZrSiO. The method according to any one of claims 1 to 24, The ferroelectric is at least one selected from Pb (Zr, Ti) O ₃ (PZT), SrBi ₂ Ta ₂ O ₉ (SBT), (Bi, La) ₄ Ti ₃ O ₁₂ (BLT) and BiFeO ₃ (BFO) A multi-bit ferroelectric memory device, characterized in that made.

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