KR20090093050A - Plasma display panel and method for manufacturing the same - Google Patents

Abstract

A plasma display panel and method for manufacturing the same are provided to reduce the electric current resistance by directly contacting the bus electrode of the plasma display panel to the transparent electrode. The transparent electrode(180a) is formed on the front substrate(170) in a specific direction. The transparent electrode is made of the ITO(Indium Tin Oxide). The black matrix is formed between the transparent electrode and each discharge cell. The bus electrode(180b) is formed on the top of the black matrix which is formed on the transparent electrode. The bus electrode has the width which is broad than the width of the black matrix. The bus electrode is contacts with the transparent electrode.

Description

Plasma display panel and method for manufacturing the same

The present invention relates to a plasma display panel, and more particularly, to an electrode structure of a plasma display panel.

With the advent of the multimedia era, display devices that can express more detailed, larger, and more natural colors are required. However, the current CRT (Cathode Ray Tube) has a limit to compose a large screen of 40 inches or more, and the LCD (Liquid Crystal Display), PDP (Plasma Display Panel), and projection TV (Television) are used for high definition video. It is rapidly developing for expansion.

A plasma display panel is an electronic device that displays an image by using plasma discharge. The plasma display panel applies a predetermined voltage to an electrode disposed in the discharge space of the PDP so that plasma discharge occurs between them, and vacuum ultraviolet rays generated during the plasma discharge. The phosphor layer formed in a predetermined pattern by (VUV) is excited to form an image.

Here, an address electrode is provided in the lower panel of the plasma display panel, and a pair of sustain electrode pairs are formed in each discharge cell in the upper panel.

1 is a view schematically showing the structure of a conventional sustain electrode. Here, the transparent electrode 180a and the bus electrode 180b are formed on the front substrate 170, and a black matrix 180c is formed between the transparent electrode 180a and the bus electrode 180b. Here, the transparent electrode 180a is made of indium-tin-oxide (ITO) or the like, and the bus electrode is formed to reduce the resistance of the sustain electrode pair and to solve the energy loss problem by increasing the resistance.

However, the electrode structure of the conventional sustain electrode pair described above has the following problems.

As shown, a black matrix 180c is formed between the transparent electrode 180a and the bus electrode 180b, which is used to improve contrast of the plasma display panel. However, the black matrix described above has the adverse effect of lowering the conduction resistance between the transparent electrode and the bus electrode of the plasma display panel. As the current resistance increases, the discharge delay time, i.e., jitter, increases when the plasma display panel is driven.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to lower the conduction resistance between the transparent electrode and the bus electrode of the plasma display panel.

Another object of the present invention is to reduce the electric current resistance between the transparent electrode and the bus electrode of the plasma display panel, thereby reducing the discharge delay time.

In order to solve the above problems, the present invention provides a display device comprising: a first panel including an address electrode, a first dielectric, and a phosphor on a first substrate; A plurality of transparent electrodes, a plurality of transparent electrodes, a plurality of black matrices formed on the transparent electrodes, a plurality of bus electrodes formed on the black matrices and energized with the transparent electrodes; And a second panel including a second dielectric and a protective film.

According to another embodiment of the present invention, forming an address electrode, a first dielectric and a partition on a first substrate; Applying a phosphor in a cell partitioned by the partition wall; Forming a plurality of transparent electrodes on the second substrate; Forming a black matrix and a bus electrode on the transparent electrode, wherein the bus electrode is energized with the transparent electrode; Forming a dielectric and a protective film on the transparent substrate, the second substrate on which the black matrix and the bus electrode are formed; And attaching the first substrate and the second substrate to each other.

When the black matrix and the bus electrode of the plasma display panel are formed by the above-described method, the bus electrode is formed in direct contact with the transparent electrode, thereby reducing the conduction resistance.

Therefore, the discharge delay time is shortened when the plasma display panel is driven.

1 is a view schematically showing the structure of a conventional sustain electrode

2A is a view schematically showing the structure of a sustain electrode of an embodiment of a plasma display panel according to the present invention;

2B is a view showing a discharge cell structure of an embodiment of a plasma display panel according to the present invention;

3 is a view showing a driving device and a connecting portion of a plasma display panel according to the present invention;

4 is a view showing a substrate wiring structure of a typical tape carrier package,

5 is a view schematically showing another embodiment of a plasma display panel according to the present invention;

6a to 5o are views showing an embodiment of a method of manufacturing a plasma display panel according to the present invention,

7A is a view illustrating a process of bonding the front substrate and the rear substrate of the plasma display panel;

FIG. 7B is a cross-sectional view taken along the line AA ′ of FIG. 7A.

<Description of the symbols for the main parts of the drawings>

110: back substrate 120: address electrode

130: lower plate dielectric 140: partition wall

150a, 150b, 150c: phosphor 160: discharge gas

170: front substrate 180a, 180b: transparent electrode

180a ', 180b': Bus electrode 180c: Black matrix

190: top dielectric 195: protective film

220: panel 230: driving substrate

240: TCP 241: driving driver chip

242: flexible substrate 243: wiring

250: FPC 260: heat sink

Other objects, features and advantages of the present invention will become apparent from the following detailed description of embodiments with reference to the accompanying drawings.

Hereinafter, preferred embodiments of the present invention, in which the above object can be specifically realized, are described with reference to the accompanying drawings.

In the accompanying drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity.

In the plasma display panel according to the present invention, the upper panel and the lower panel are bonded to each other with a partition wall therebetween. First, an embodiment of a plasma display panel according to the present invention will be described with reference to FIGS. 2A and 2B.

2A is a diagram illustrating an embodiment of a sustain electrode structure of a plasma display panel according to the present invention. As illustrated, a transparent electrode 180a made of indium tin oxide (ITO) is formed on one surface of the front substrate 170. In addition, a black matrix 180c is formed between each discharge cell and the outside of the transparent electrode 180a. The bus electrode 180b is formed on the black matrix 180c formed on the transparent electrode 180a. Here, the bus electrode 180b is wider than the black matrix 180c and is formed in contact with the transparent electrode 180a in a direction toward the discharge region. Therefore, the transparent electrode 180a and the bus electrode 180b are directly energized, so that the conduction resistance is reduced.

2B is a view schematically showing a discharge cell structure of the plasma display panel according to the present invention. Here, the structures of the transparent electrode 180a, the bus electrode 180b, and the black matrix 180c are as shown in FIG. 2A. The dielectric 190 and the passivation layer 195 are sequentially formed on the entire surface of the front substrate 170 while covering the sustain electrode pairs.

The front substrate 170 is formed through a process such as milling and cleaning the glass for the display substrate. Here, the transparent electrodes 180a and 180b may be formed of indium-tin-oxide (ITO), SnO ₂ , or the like by a photoetching method by sputtering or a lift-off method by CVD. Formed. The black matrix 180c includes a low melting glass and a black pigment. The bus electrodes 180a 'and 180b' include a mother glass and Ag (silver).

The dielectric 190 is formed on the front substrate 170 on which the sustain electrode pairs are formed. Here, the dielectric 190 comprises a transparent low melting glass, a specific composition will be described later. In addition, a protective film made of magnesium oxide or the like is formed on the upper dielectric layer 190 to protect the dielectric from the impact of (+) ions during discharge, and to increase secondary electron emission.

Meanwhile, an address electrode 120 is formed on one surface of the rear substrate 110 along a direction crossing the sustain electrode pair, and the white dielectric layer 130 is formed on the front surface of the rear substrate 110 while covering the address electrode 120. ) Is formed. Here, the address electrode 120 includes a low melting glass and a filler. In addition, the white dielectric layer 130 is applied by a printing method or a film laminating method, and then completed through a firing process. The partition wall 140 is formed on the white dielectric layer 130 to be disposed between the address electrodes 120. In addition, the partition wall 140 may be stripe-type, well-type, or delta-type.

The partition wall 140 includes a mother glass and a porous filler. Examples of the mother glass include a flexible mother glass and a lead-free mother glass. The lead-based mother glass includes ZnO, PbO, B ₂ O ₃ , and the like, and the lead-free mother glass includes ZnO, B ₂ O ₃ , BaO, SrO, CaO, and the like. And, as a filler, SiO _2, Al ₂ O ₃ Oxides, such as these, are included.

Although not shown, a black top may be formed on the partition wall 140. The phosphor layers 150a, 150b, and 150c of red (R), green (G), and blue (B) are formed between the partition walls 140. The points where the address electrode 120 on the back substrate 110 and the pair of sustain electrodes on the front substrate 110 cross each other constitute a part of the discharge cell.

In addition, the front substrate 170 and the rear substrate 110 are bonded to each other with the partition wall 140 interposed therebetween, and are bonded through a sealing material provided on the outer side of the substrate.

The upper panel and the lower panel are connected to the driving device.

3 is a view showing a driving device and a connecting portion of the plasma display panel according to the present invention. Hereinafter, referring to FIG. 2, a connection portion between the panel and the driving device having the above-described structure will be described.

As illustrated, the entire plasma display apparatus includes a panel 220, a driving substrate 230 for supplying a driving voltage to the panel 220, electrodes for each cell of the panel 220, and the driving substrate. A tape carrier package 240, which is a type of flexible substrate connecting the 230, is formed. As described above, the panel 220 includes a front substrate, a rear substrate, and a partition wall.

In addition, an electrical and physical connection between the panel 220 and the TCP 240 and an electrical and physical connection between the TCP 240 and the driving substrate 230 may include an anisotropic conductive film (hereinafter referred to as an ACF). use. ACF is a conductive resin film made of nickel (Ni) balls coated with gold (Au).

4 is a view showing a substrate wiring structure of a typical tape carrier package.

As shown, the TCP 240 is in charge of the connection between the panel 220 and the driving substrate 230, the driving driver chip is mounted. The TCP 340 is connected to the wiring 343 on the flexible substrate 342 and the wiring 343 and receives power from the driving substrate 330 to provide a specific electrode of the panel 320. A driver driver chip 341 is formed. Here, since the driving driver chip 341 has a structure in which a small number of voltages and driving control signals are applied to alternately output a large number of signals of high power, the number of wirings connected to the driving substrate 330 is small. The number of wires connected to the panel 320 side is large. Accordingly, since the wirings of the driving driver chip 341 may be connected by utilizing a space on the driving substrate 330 side, the wiring 343 may not be separated by a boundary of the center of the driving driver chip 341. It may be.

5 is a view schematically showing another embodiment of a plasma display device according to the present invention.

In the present embodiment, the panel 320 is connected to the driving device through a flexible printed circuit (FPC) 350. Here, the FPC 350 is a film having a pattern formed therein using polymide. In this embodiment, the FPC 350 and the panel 320 are connected to each other through the ACF. In addition, in this embodiment, the driving substrate 330 is a natural PCB circuit.

Here, the driving device includes a data driver, a scan driver, a sustain driver, and the like. Here, the data driver is connected to the address electrode to apply a data pulse. The scan driver is connected to the scan electrode to supply a rising ramp waveform, a ramping ramp waveform, a scan pulse, and a sustain pulse. The sustain driver also applies a sustain pulse and a DC voltage to the common sustain electrode.

The plasma display panel is driven by being divided into a reset period, an address period, and a sustain period. In the reset period, a rising ramp waveform Ramp-up is simultaneously applied to the scan electrodes. In the address period, the negative scan pulse scan is sequentially applied to the scan electrodes, and at the same time, the positive data pulse is applied to the address electrodes in synchronization with the scan pulse. In the sustain period, a sustain pulse sus is alternately applied to the scan electrodes and the sustain electrodes.

6A to 6N illustrate an embodiment of a method of manufacturing a plasma display panel according to the present invention. Referring to FIGS. 6A to 6N, a method of manufacturing a plasma display panel according to the present invention is as follows.

First, as shown in FIG. 6A, the transparent electrode 180a is formed on the front substrate 170. Here, the front substrate 170 is manufactured by milling and cleaning the glass or soda lime glass for the display substrate. The transparent electrode 180a is formed of ITO, SnO ₂ , or the like by a photoetching method by sputtering, a lift-off method by CVD, or the like.

Next, a black matrix material 180c ′ is applied onto the front substrate 170 as shown in FIG. 6B. The black matrix material 180c 'comprises a low melting glass and a black pigment. And the above-mentioned material can be manufactured with the photosensitive paste, and can be apply | coated by the screen printing method. After the black matrix material 180c 'is dried, the mask 184 is covered and exposed. In this case, the portion of the mask 184 to which light is irradiated is the portion where the black matrix is to be patterned.

Subsequently, the bus electrode material 180b 'is applied as shown in FIG. 6C. The bus electrode material 180b 'comprises Ag (silver) and inorganic materials such as glass frit and black powder. The above-mentioned material is made of a photosensitive paste, applied and dried, and then covered with a mask 187 and exposed. At this time, the portion of the mask 187 is irradiated with light is the portion where the bus electrode is to be patterned. Therefore, it is natural that the area irradiated with light on the bus electrode material is larger than the area irradiated with light on the black matrix material. The specific range is as mentioned later.

Next, as shown in FIG. 6D, the black matrix material 180c 'and the bus electrode material 180b' are developed. At this time, the black matrix material 180c 'and the bus electrode material 180b' remain only in the portion to which the light is irradiated. Specifically, the bus electrode material 180b 'is developed to protrude more than the black matrix material 180c' in the direction toward the discharge space.

Subsequently, the black matrix material 180c 'and the bus electrode material 180b' are fired as shown in FIG. 6E. Here, both the black matrix material 180c 'and the bus electrode material 180b' include inorganic components such as low melting glass, and the low melting glass contained in the bus electrode material 180b 'flows down and is illustrated. As described above, the transparent electrode 180a is in contact with the transparent electrode 180a. That is, the low-melting glass of the black matrix material 180c 'and the bus electrode material 180b' come together. At this time, it is natural that all organic components such as binder, photoinitiator, photosensitive monomer, and solvent are removed.

As a result, the width of the bus electrode 180b is formed to be wider than that of the black matrix 180c. If the discharge area is covered, there is a problem of lowering the aperture ratio. Therefore, the width of the black matrix 180c itself can be patterned to be narrower than before. In this example, the patterning was about 10% narrower than the conventional black matrix. For example, if the conventional black matrix is 80 micrometers (µm), the patterning is about 72 micrometers in this embodiment.

As described above, since the bus electrode is in direct contact with the transparent electrode, the conduction resistance is reduced. Accordingly, the discharge delay time of the plasma display panel is reduced, and it can be seen from the experiment that there is a reduction effect of about 10% or more.

Here, the black matrix and the bus electrode were developed together, but may be carried out in a separate process. That is, after developing by exposing and developing a black matrix, a bus electrode can also be pattern-printed directly. At this time, it is natural that the width of the bus electrode material to be pattern printed should be wider than the width of the developed black matrix.

 Subsequently, as illustrated in FIG. 6F, a dielectric 190 is formed on the front substrate 170 on which the transparent electrode 180a, the black matrix 180c, and the bus electrode 180b are formed. Here, the dielectric 190 is baked after laminating a material including low melting glass or the like by screen printing, coating or laminating the green sheet. At this time, it is preferable that baking temperature is about 500-600 degreeC.

Subsequently, a protective film 195 is deposited on the dielectric 190 as shown in FIG. 6G. The protective film 195 may be made of magnesium oxide or the like, and may include silicon or the like as a dopant. The protective film 195 may be formed by chemical vapor deposition (CVD), electron beam (E-beam), ion-plating, sol-gel, sputtering, or the like.

6H, the address electrode 120 is formed on the rear substrate 110. Here, the back substrate 110 forms a glass for display substrate or soda-lime glass through a process such as milling or cleaning. Next, the address electrode 120 is formed on the back substrate 110. The address electrode 120 may be formed of silver (Ag) or the like by a screen printing method, a photosensitive paste method or a photoetching method after sputtering.

In addition, the address electrode 120 may be formed using a general-purpose conductive metal and a noble metal, and the specific process is the same as that of the bus electrode described above.

6I, a dielectric 130 is formed on the back substrate 110 on which the address electrode 120 is formed. The dielectric 130 is formed of a material including a low melting point glass and a filler such as TiO ₂ by screen printing or laminating green sheets. Here, the lower dielectric 130 preferably has a white color to increase the luminance of the plasma display panel. In order to simplify the process, the lower dielectric 130 and the address electrode 120 may be fired in one process.

Subsequently, partition walls are formed to distinguish each discharge cell from those shown in Figs. 6J to 6M.

First, a partition material is prepared, and a solvent, a dispersant, a parent glass, and a porous filler are mixed and milled. Here, as a mother glass, a flexible mother glass and a lead-free mother glass are mentioned. The lead-based mother glass includes ZnO, PbO, B ₂ O ₃ , and the like, and the lead-free mother glass includes ZnO, B ₂ O ₃ , BaO, SrO, CaO, and the like. And, as a filler, using an oxide such as SiO _2, Al ₂ O _3.

Next, as shown in FIG. 6K, the partition material 140a is applied onto the lower plate dielectric 130. Application of the partition material may be performed by a spray coating method, a bar coating method, a screen printing method, a green sheet method, or the like. Preferably, the barrier material may be manufactured and laminated. have.

The partitioning material 140a may be patterned by sanding, etching, or photosensitive. Hereinafter, the etching method will be described in detail.

First, as shown in FIG. 6L, a dry film resist (DFR) 155 is formed on the barrier material 140a at predetermined intervals. Here, the DFR 155 is preferably formed at the position where the partition wall is to be formed.

Then, as shown in FIG. 6M, the partition material is patterned to form the partition 140. That is, when the etchant is injected from the upper portion of the DFR, the partition material of the portion not provided with the DFR 155 is gradually etched and patterned in the form of the partition wall 140. The removal of the DFR 155, the removal of the etchant through the cleaning process, and the calcination process result in completing the structure of the partition wall 140 as shown in FIG. 5I. Here, as described above, the partition wall 140 may be formed of a striate type, a well type, a delta type, or the like.

Subsequently, as illustrated in FIG. 5N, phosphors 150a, 150b, and 150c are applied to a surface of the lower dielectric layer 130 in contact with the discharge space and a side surface of the partition wall. The phosphors are sequentially coated with phosphors of R, G, and B according to each discharge cell, and are applied by screen printing or photosensitive paste.

Then, as illustrated in FIG. 5O, the upper panel is bonded to the lower panel with a partition wall therebetween and sealed, and after discharge of impurities therein, the discharge gas 160 is injected.

Hereinafter, the sealing process of the upper panel and the lower panel will be described in detail.

The sealing process is performed by screen printing, dispensing, or the like.

The screen printing method is a method of printing a sealing material having a desired shape by holding a patterned screen at a predetermined interval, placing the patterned screen on a substrate, and pressing and transferring the paste necessary for forming the sealing material. The screen printing method has advantages of simple production equipment and high use efficiency of materials.

And the dispensing method is a method of forming a sealing material by directly discharging a thick film paste on a board | substrate using air pressure using the CAD wiring data used for screen mask manufacture. The dispensing method has the advantage of reducing the manufacturing cost of the mask and having a large degree of freedom in the shape of the thick film.

7A is a view illustrating a process of bonding the front substrate and the rear substrate of the plasma display panel, and FIG. 7B is a cross-sectional view taken along line AA ′ of FIG. 7A.

As shown, as shown, the sealing material 600 is applied to the front substrate 170 or the back substrate 110. Specifically, the substrate is printed or dispensed at the same time with a predetermined interval at the outermost side of the substrate and applied.

Next, the sealing material 600 is fired. In the firing process, the organic material included in the sealing material 600 is removed, and the front substrate 170 and the rear substrate 110 are bonded to each other. In this firing process, the width of the sealing material 600 may be widened and the height may be low. In the present embodiment, the sealing material 600 is printed or coated, but may be formed in the form of a sealing tape and adhered to the front substrate or the rear substrate.

And the characteristic of a protective film etc. is improved at predetermined temperature through an aging process.

Then, a front filter can be formed on the front substrate. The front filter is provided with an electromagnetic shielding film for shielding electromagnetic interference emitted from the panel to the outside. The electromagnetic shielding film may be patterned in a specific form in order to shield electromagnetic waves while ensuring the visible light transmittance required by the display device. In addition, a near infrared shielding film, a color correction film, an antireflection film, and the like may be formed on the front filter.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

The plasma display panel and the method of manufacturing the same according to the present invention can reduce power consumption by reducing discharge delay time.

Claims (10)

A first panel including an address electrode, a first dielectric, and a phosphor on the first substrate; And A plurality of transparent electrodes, a plurality of transparent electrodes, a plurality of black matrices formed on the transparent electrodes, a plurality of bus electrodes formed on the black matrix and energized with the transparent electrodes, the partitions being interposed therebetween; And a second panel provided with a second dielectric and a protective film. The method of claim 1, wherein the bus electrode, And a plasma display panel in contact with the transparent electrode. The method of claim 2, wherein the bus electrode, A plasma display panel formed in contact with the black matrix and in contact with the transparent electrode in a direction toward a discharge space. The method of claim 1, wherein the bus electrode, And a wider width than the black matrix. Forming an address electrode, a first dielectric, and a partition on the first substrate; Applying a phosphor in a cell partitioned by the partition wall; Forming a plurality of transparent electrodes on the second substrate; Forming a black matrix and a bus electrode on the transparent electrode, wherein the bus electrode is energized with the transparent electrode; Forming a dielectric and a protective film on the transparent substrate, the second substrate on which the black matrix and the bus electrode are formed; And And bonding the first substrate and the second substrate together. The method of claim 5, wherein the forming of the black matrix and the bus electrode, Applying, drying and first masking and exposing a black matrix material on the transparent electrode; Applying a bus electrode material on the black matrix material, drying and covering and exposing a second mask that is wider than the first mask; And Developing and firing the black matrix material and the bus electrode material, and energizing the bus electrode with the transparent electrode. The method of claim 6, wherein the bus electrode, Part of the plasma display panel manufacturing method characterized in that the flow in the baking step is formed in contact with the transparent electrode and the transparent electrode. The method of claim 5, wherein the bus electrode, And a transparent electrode in contact with the transparent electrode in a direction toward the discharge space. The method of claim 6, wherein the bus electrode, And in the developing step, patterned to be wider than the black matrix. The method of claim 5, wherein the forming of the black matrix and the bus electrode, Applying, drying, covering, exposing and forming a black matrix material on the transparent electrode; Printing on the black matrix material a patterned bus electrode material that is wider than an exposed portion of the black matrix material; And Calcining the black matrix material and the bus electrode material, and energizing the bus electrode with the transparent electrode.