KR20090072191A - Plasma display panel and method for manufacturing the same - Google Patents

Abstract

A plasma display panel and manufacturing method thereof are provided to reduce the driving voltage of the panel and increase the power consumption by using a barrier wall material of low permittivity. The address electrode(120), and the dielectric layer(130) are included on the backside substrate(110). The sustain electrode pair, and the dielectric(190) and the protective film(195) are included on the front substrate(170). The partition(140) is formed in order to be arranged on the dielectric layer between the address electrode and is made of the parent glass and porous filler. A cavity is formed inside of the particle of the porous filler. The groove is formed in the particle's surface of the porous filler. The size of the porous filler is 50 micrometers through 0.1.

Description

Plasma display panel and method for manufacturing the same

TECHNICAL FIELD The present invention relates to a plasma display panel, and more particularly, to a plasma display panel using a partition material for the plasma display panel and such a partition material.

With the advent of the multimedia era, display devices that can express more detailed, larger, and more natural colors are required. However, the current CRT (Cathode Ray Tube) has a limit to compose a large screen of 40 inches or more, and the LCD (Liquid Crystal Display), PDP (Plasma Display Panel), and projection TV (Television) are used for high definition video. It is rapidly developing for expansion.

A plasma display panel is an electronic device that displays an image by using plasma discharge. The plasma display panel applies a predetermined voltage to an electrode disposed in the discharge space of the PDP so that plasma discharge occurs between them, and vacuum ultraviolet rays generated during the plasma discharge. The phosphor layer formed in a predetermined pattern by (VUV) is excited to form an image.

Here, the partition wall of the plasma display panel includes a low melting glass, a filler, and the like. Recently, in order to implement a high-efficiency plasma display panel, a high concentration of Xe or the like is used as a discharge gas, and a low dielectric constant bulkhead material is required to prevent high driving voltage and current loss.

By the way, the dielectric constant of the partition material containing a flexible base glass is 10-20, and the dielectric constant of the partition material containing a lead-free base glass is 8-20. Here, when the barrier material having a lower dielectric constant is used, the discharge characteristics of the panel may be improved. When the barrier material having a dielectric constant of 8 or less is used, the efficiency of the plasma display panel may be increased and the driving voltage may be reduced. However, as a base glass, flexible glass has been increasingly regulated due to environmental pollution, and as lead-free glass, it is very difficult to reduce the dielectric constant of ZnO, B ₂ O ₃ , BaO, SrO and CaO to 8 or less. it's difficult.

An object of the present invention is to lower the dielectric constant of a partition material to 8 or less by including a low dielectric constant porous filler in the partition material.

Another object of the present invention is to reduce the driving voltage and improve the discharge efficiency of a plasma display panel using a low dielectric constant barrier material.

In order to solve the above problems, the present invention provides a display device comprising: a first panel including an address electrode, a first dielectric, and a phosphor on a first substrate; A second panel provided with a sustain electrode pair, a second dielectric, and a protective film on the second substrate; And a partition wall disposed between the first panel and the second panel, the partition wall including a mother glass and a porous filler.

According to another embodiment of the present invention, there is provided a semiconductor device comprising: a first panel including an address electrode, a white dielectric having a mother glass, the porous filler according to claims 1 to 7, and a phosphor on a first substrate; And a second panel bonded to the first panel with a partition wall interposed therebetween, the second panel including a sustain electrode pair, a transparent dielectric, and a protective film on a second substrate.

According to still another embodiment of the present invention, there is provided a semiconductor device comprising: a first panel including an address electrode, a white dielectric, and a phosphor on a first substrate; And a second panel bonded to the first panel with a partition wall interposed therebetween, the second panel including a transparent dielectric and a protective film having a pair of sustain electrodes on the second substrate, a mother glass, and the porous filler according to claims 1 to 7. It provides a plasma display panel comprising a.

According to yet another embodiment of the present invention, forming an address electrode and a first dielectric on a first substrate; Forming a partition wall formed of mother glass and a porous filler on the first substrate; Applying a phosphor in a cell partitioned by the partition wall; Forming a sustain electrode pair, a dielectric, and a protective film on the second substrate; And attaching the first substrate and the second substrate to each other.

The effects of an embodiment of the above-described plasma display panel and a method of manufacturing the same according to the present invention are as follows.

First, a low dielectric constant porous filler is included in the barrier material, so that the dielectric constant of the barrier material is as low as 8 or less.

Second, the use of the low dielectric constant barrier material reduces the driving voltage of the plasma display panel and improves the discharge efficiency, thereby increasing power consumption.

Other objects, features and advantages of the present invention will become apparent from the following detailed description of embodiments with reference to the accompanying drawings.

Hereinafter, preferred embodiments of the present invention, in which the above object can be specifically realized, are described with reference to the accompanying drawings.

In the accompanying drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity.

In the plasma display panel according to the present invention, the upper panel and the lower panel are bonded to each other with a partition wall therebetween. First, an embodiment of a plasma display panel according to the present invention will be described with reference to FIGS. 1A and 1B.

As shown in FIG. 1A, the plasma display panel of the present invention includes a pair of transparent electrodes 180a and 180b made of indium tin oxide (ITO) in one direction and a conventional metal material on one side of the front substrate 170. A sustain electrode pair consisting of the bus electrodes 180a 'and 180b' is formed. The dielectric 190 and the passivation layer 195 are sequentially formed on the entire surface of the front substrate 170 while covering the sustain electrode pairs.

The front substrate 170 is formed through a process such as milling and cleaning the glass for the display substrate. Here, the transparent electrodes 180a and 180b may be formed of indium-tin-oxide (ITO), SnO ₂ , or the like by a photoetching method by sputtering or a lift-off method by CVD. Formed. The bus electrodes 180a 'and 180b' include silver (Ag) and the like. In addition, a black matrix may be formed on the sustain electrode pair, and includes a low melting glass and a black pigment.

The dielectric body 190 is formed on the front substrate 170 on which the transparent electrode and the bus electrode are formed. Here, the dielectric 190 comprises a transparent low melting glass, a specific composition will be described later. In addition, a protective film made of magnesium oxide or the like is formed on the upper dielectric layer 190 to protect the dielectric from the impact of (+) ions during discharge, and to increase secondary electron emission.

Meanwhile, an address electrode 120 is formed on one surface of the rear substrate 110 along a direction crossing the sustain electrode pair, and the white dielectric layer 130 is formed on the front surface of the rear substrate 110 while covering the address electrode 120. ) Is formed. The white dielectric layer 130 is applied by a printing method or a film laminating method and then completed through a firing process. The partition wall 140 is formed on the white dielectric layer 130 to be disposed between the address electrodes 120. In addition, the partition wall 140 may be stripe-type, well-type, or delta-type.

The composition of the partition is described in detail as follows.

The partition wall comprises a mother glass and a porous filler. Examples of the mother glass include a flexible mother glass and a lead-free mother glass. The lead-based mother glass includes ZnO, PbO, B ₂ O ₃ , and the like, and the lead-free mother glass includes ZnO, B ₂ O ₃ , BaO, SrO, CaO, and the like.

And, as a filler, SiO ₂ , Al ₂ O ₃ , ZnO, alnmina silicate (Al ₂ Si ₂ O ₇ ), Mg ₂ SiO ₄ , Vycor glass (96% by weight of SiO ₂ and 4% by weight of B ₂ O ₃ ) And materials selected from the group consisting of CaO. Here, the filler is characterized in that the porous filler. Porous in this embodiment, as shown in Figure 1b, means that the interior is an empty space or a plurality of grooves are provided on the surface to form a shape similar to the surface of the golf ball.

As an example of the porous filler, a case of SiO ₂ will be described. SiO ₂ is suitable as a low dielectric constant filler because the dielectric constant is about 4 and very stable. However, conventional SiO ₂ cannot be added much in the partition material because the density is as low as 2.2 to 2.6. In other words, when SiO ₂ is added in the partition material at a weight ratio of 40% or more, the density of the partition walls is reduced after the firing step. That is, the softening point of the matrix glass had a melting point of about 550 or ℃, SiO ₂ is about 1700 ~ 1800 ℃. Therefore, when SiO ₂ is contained in the partition material in large quantities as a filler, a filler may adhere to the mother glass surface so that each mother glass may not be sufficiently pressed.

In this embodiment, the inside of the SiO ₂ is an empty space or a plurality of grooves are provided on the surface to form a shape similar to the surface of a golf ball, so that each mother glass can be sufficiently compressed. Therefore, it can be included in a sufficient amount in the partition material, it is possible to achieve a reduction in the dielectric constant and the improvement of the density of the partition material.

Figure 1c is a porous SiO ₂ by the addition of an ordinary SiO ₂ according to this embodiment the matrix glass, and measuring the dielectric constant graph. As shown, it can be seen that when the same amount is added, the dielectric constant of the mother glass, including porous SiO ₂ , is low. And, the porous filler is about 5 micrometers in size, and the shape is close to a sphere. Here, when the size of the porous filler (in the case of sphere, the diameter) is less than 0.1 micrometer, the surface area of the porous filler is too large, the plastic density may be low. In addition, when the size of the porous filler (a sphere means diameter) exceeds 50 micrometers, roughness of the partition surface using the porous filler may be deteriorated. That is, it may be formed unevenly on the surface of the partition wall. In this embodiment, SiO ₂ can be used both crystal and amorphous.

In addition, a black top may be formed on the partition wall 140. The phosphor layers 150a, 150b, and 150c of red (R), green (G), and blue (B) are formed between the partition walls 140. The points where the address electrode 120 on the back substrate 110 and the pair of sustain electrodes on the front substrate 110 cross each other constitute a part of the discharge cell.

In addition, the front substrate 170 and the rear substrate 110 are bonded to each other with the partition wall 140 interposed therebetween, and are bonded through a sealing material provided on the outer side of the substrate.

The upper panel and the lower panel are connected to the driving device.

2 is a view showing a driving device and a connection portion of a plasma display panel according to the present invention. Hereinafter, referring to FIG. 2, a connection portion between the panel and the driving device having the above-described structure will be described.

As illustrated, the entire plasma display apparatus includes a panel 220, a driving substrate 230 for supplying a driving voltage to the panel 220, electrodes for each cell of the panel 220, and the driving substrate. A tape carrier package 240, which is a type of flexible substrate connecting the 230, is formed. As described above, the panel 220 includes a front substrate, a rear substrate, and a partition wall.

In addition, an electrical and physical connection between the panel 220 and the TCP 240 and an electrical and physical connection between the TCP 240 and the driving substrate 230 may include an anisotropic conductive film (hereinafter referred to as an ACF). use. ACF is a conductive resin film made of nickel (Ni) balls coated with gold (Au).

3 is a view showing a substrate wiring structure of a typical tape carrier package.

As shown, the TCP 240 is in charge of the connection between the panel 220 and the driving substrate 230, the driving driver chip is mounted. The TCP 340 is connected to the wiring 343 on the flexible substrate 342 and the wiring 343 and receives power from the driving substrate 330 to provide a specific electrode of the panel 320. A driver driver chip 341 is formed. Here, since the driving driver chip 341 has a structure in which a small number of voltages and driving control signals are applied to alternately output a large number of signals of high power, the number of wirings connected to the driving substrate 330 is small. The number of wires connected to the panel 320 side is large. Accordingly, since the wirings of the driving driver chip 341 may be connected by utilizing a space on the driving substrate 330 side, the wiring 343 may not be separated by a boundary of the center of the driving driver chip 341. It may be.

4 is a view schematically showing another embodiment of a plasma display device according to the present invention.

In the present embodiment, the panel 320 is connected to the driving device through a flexible printed circuit (FPC) 350. Here, the FPC 350 is a film having a pattern formed therein using polymide. In this embodiment, the FPC 350 and the panel 320 are connected to each other through the ACF. In addition, in this embodiment, the driving substrate 330 is a natural PCB circuit.

Here, the driving device includes a data driver, a scan driver, a sustain driver, and the like. Here, the data driver is connected to the address electrode to apply a data pulse. The scan driver is connected to the scan electrode to supply a rising ramp waveform, a ramping ramp waveform, a scan pulse, and a sustain pulse. The sustain driver also applies a sustain pulse and a DC voltage to the common sustain electrode.

The plasma display panel is driven by being divided into a reset period, an address period, and a sustain period. In the reset period, a rising ramp waveform Ramp-up is simultaneously applied to the scan electrodes. In the address period, the negative scan pulse scan is sequentially applied to the scan electrodes, and at the same time, the positive data pulse is applied to the address electrodes in synchronization with the scan pulse. In the sustain period, a sustain pulse sus is alternately applied to the scan electrodes and the sustain electrodes.

In addition, in the above-described embodiments, the porous filler is mixed in the partition material to lower the dielectric constant of the partition and increase the density, and the porous filler may also be mixed with the top dielectric or the bottom dielectric. However, it is obvious that the upper dielectric should be a transparent dielectric and the lower dielectric should be a white dielectric.

5A to 5K illustrate an embodiment of a method of manufacturing a plasma display panel according to the present invention. A method of manufacturing a plasma display panel according to the present invention will be described with reference to FIGS. 5A to 5K as follows.

First, as illustrated in FIG. 5A, transparent electrodes 180a and 180b and bus electrodes 180a 'and 180b' are formed on the front substrate 170. Here, the front substrate 170 is manufactured by milling and cleaning the glass or soda lime glass for the display substrate. The transparent electrode 180a is formed of ITO, SnO ₂ , or the like by a photoetching method by sputtering, a lift-off method by CVD, or the like. The bus electrode 180a 'is formed of a material such as silver (Ag) by a screen printing method, a photosensitive paste method, or the like. In addition, a black matrix may be formed on the sustain electrode pair, and low melting glass and black pigment may be formed by screen printing or photosensitive paste.

Subsequently, as illustrated in FIG. 5B, a dielectric 190 is formed on the front substrate 170 on which the transparent electrode 180a and the bus electrode 180b are formed. Here, the dielectric material 190 is laminated by a material including low melting glass or the like by screen printing, coating or laminating the green sheet.

Subsequently, a protective film 195 is deposited on the dielectric 190 as shown in FIG. 5C. The protective film 195 may be made of magnesium oxide or the like, and may include silicon or the like as a dopant. The protective film 195 may be formed by chemical vapor deposition (CVD), electron beam (E-beam), ion-plating, sol-gel, sputtering, or the like.

5D, the address electrode 120 is formed on the rear substrate 110. Here, the back substrate 110 forms a glass for display substrate or soda-lime glass through a process such as milling or cleaning. Next, the address electrode 120 is formed on the back substrate 110. The address electrode 120 is formed of silver (Ag) or the like by a screen printing method, a photosensitive paste method or a photoetching method after sputtering.

As shown in FIG. 5E, the dielectric 130 is formed on the rear substrate 110 on which the address electrode 120 is formed. The dielectric 130 is formed of a material including a low melting point glass and a filler such as TiO ₂ by screen printing or laminating green sheets. Here, the lower dielectric 130 preferably has a white color to increase the luminance of the plasma display panel.

Subsequently, partition walls are formed to distinguish each discharge cell from those shown in Figs. 5F to 5I.

First, a partition material is prepared, and a solvent, a dispersant, a parent glass, and a porous filler are mixed and milled to prepare. Specifically, the mixed glass and the porous filler milled to a sufficient size with the solvent and the dispersant may be mixed by stirring for a predetermined time (for example, 1 hour) and uniformly mixed by ultrasonic dispersion using an ultrasonic disperser. .

Here, as a mother glass, a flexible mother glass and a lead-free mother glass are mentioned. The lead-based mother glass includes ZnO, PbO, B ₂ O ₃ , and the like, and the lead-free mother glass includes ZnO, B ₂ O ₃ , BaO, SrO, CaO, and the like.

And, the filler includes a material selected from the group consisting of SiO ₂ , Al ₂ O ₃ , ZnO, alnmina silicate, Mg ₂ SiO ₄ , Vycor glass and CaO. Here, the filler is characterized in that the porous filler. Porous in this embodiment, as shown in Figure 1B, means that the interior is an empty space or a plurality of grooves are provided on the surface to form a shape similar to the surface of the golf ball. And the advantage of using a porous filler is as mentioned above.

Next, as shown in FIG. 5F, the partition material 140a is applied onto the lower plate dielectric 130. Application of the partition material may be performed by a spray coating method, a bar coating method, a screen printing method, a green sheet method, or the like. Preferably, the barrier material may be manufactured and laminated. have.

The partitioning material 140a may be patterned by sanding, etching, or photosensitive. Hereinafter, the etching method will be described in detail.

First, as shown in FIG. 5G, a dry film resist (DFR) 155 is formed on the barrier material 140a at predetermined intervals. Here, the DFR 155 is preferably formed at the position where the partition wall is to be formed.

Then, as shown in FIG. 5H, the partition material is patterned to form the partition wall 140. That is, when the etchant is injected from the upper portion of the DFR, the partition material of the portion not provided with the DFR 155 is gradually etched and patterned in the form of the partition wall 140. The removal of the DFR 155, the removal of the etchant through the cleaning process, and the calcination process result in completing the structure of the partition wall 140 as shown in FIG. 5I. Here, as described above, the partition wall 140 may be formed of a striate type, a well type, a delta type, or the like.

And, when using the etching method, the etching rate of the partition material may be different at the top and bottom of the material. That is, since it is etched gradually from the top of the partition material, the top is more time exposed to the etchant than the bottom. Thus, if the etch rates of the upper and lower portions of the partition material are the same, the upper portion of the partition wall may be formed to have a structure that is too narrow in width compared to the lower portion. Therefore, the etching rate of the lower part of the partition material is larger than the etching rate of the upper part. Specifically, the etching rate of the lower part of the material of the partition wall may be 1.2 to 3 times the etching rate of the upper part of the material of the partition wall. have.

For this feature, the weight ratio of the porous filler included in the upper and lower portions of the partition material may be varied. Here, more porous fillers are included in the upper part of the partition material, specifically, the weight ratio of the porous filler included in the upper part of the partition material is 1.05 times to 1.50 times the weight ratio of the porous filler included in the lower part of the partition material. Can be. And, the etching process has an advantage of improving the uniformity (uniformity) of the partition surface compared to the sanding or photosensitive process.

Subsequently, as illustrated in FIG. 5J, phosphors 150a, 150b, and 150c are applied to a surface of the lower dielectric layer 130 in contact with the discharge space and a side surface of the partition wall. The phosphors are sequentially coated with phosphors of R, G, and B according to each discharge cell, and are applied by screen printing or photosensitive paste.

As shown in FIG. 5K, the upper panel is bonded to the lower panel with a partition wall therebetween and sealed, and after discharging internal impurities, the discharge gas 160 is injected.

Hereinafter, the sealing process of the upper panel and the lower panel will be described in detail.

The sealing process is performed by screen printing, dispensing, or the like.

The screen printing method is a method of printing a sealing material having a desired shape by holding a patterned screen at a predetermined interval, placing the patterned screen on a substrate, and pressing and transferring the paste necessary for forming the sealing material. The screen printing method has advantages of simple production equipment and high use efficiency of materials.

And the dispensing method is a method of forming a sealing material by directly discharging a thick film paste on a board | substrate using air pressure using the CAD wiring data used for screen mask manufacture. The dispensing method has the advantage of reducing the manufacturing cost of the mask and having a large degree of freedom in the shape of the thick film.

6A is a view illustrating a process of bonding the front substrate and the rear substrate of the plasma display panel, and FIG. 6B is a cross-sectional view taken along line AA ′ of FIG. 6A.

As shown, as shown, the sealing material 600 is applied to the front substrate 170 or the back substrate 110. Specifically, the substrate is printed or dispensed at the same time with a predetermined interval at the outermost side of the substrate and applied.

Next, the sealing material 600 is fired. In the firing process, the organic material included in the sealing material 600 is removed, and the front substrate 170 and the rear substrate 110 are bonded to each other. In this firing process, the width of the sealing material 600 may be widened and the height may be low. In the present embodiment, the sealing material 600 is printed or coated, but may be formed in the form of a sealing tape and adhered to the front substrate or the rear substrate.

And the characteristic of a protective film etc. is improved at predetermined temperature through an aging process.

Then, a front filter can be formed on the front substrate. The front filter is provided with an electromagnetic shielding film for shielding electromagnetic interference emitted from the panel to the outside. The electromagnetic shielding film may be patterned in a specific form in order to shield electromagnetic waves while ensuring the visible light transmittance required by the display device. In addition, a near infrared shielding film, a color correction film, an antireflection film, and the like may be formed on the front filter.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

The partition material and the plasma display panel according to the present invention include a partition having a low dielectric constant, thereby achieving high power efficiency.

1A is a view showing a discharge cell structure of an embodiment of a plasma display panel according to the present invention;

1B is a view showing one embodiment of a porous filler in a partition of a plasma display panel according to the present invention,

1C is a graph illustrating dielectric constants by adding porous SiO ₂ and conventional SiO ₂ to a mother glass according to the present embodiment,

2 is a view showing a driving device and a connection portion of a plasma display panel according to the present invention;

3 is a view showing a substrate wiring structure of a typical tape carrier package,

4 is a view schematically showing another embodiment of a plasma display panel according to the present invention;

5A to 5K are views illustrating an embodiment of a method of manufacturing a plasma display panel according to the present invention.

6A is a view illustrating a process of bonding the front substrate and the rear substrate of the plasma display panel;

FIG. 6A is a cross-sectional view taken along line AA ′ of FIG. 6A.

<Explanation of symbols for the main parts of the drawings>

110: back substrate 120: address electrode

130: lower plate dielectric 140: partition wall

150a, 150b, 150c: phosphor 160: discharge gas

170: front substrate 180a, 180b: transparent electrode

180a ', 180b': Bus electrode 190: Top dielectric

195: protective film 220: panel

230: driving substrate 240: TCP

241: driver driver chip 242: flexible substrate

243 wiring 350 FPC

Claims (14)

A first panel including an address electrode, a first dielectric, and a phosphor on the first substrate; A second panel provided with a sustain electrode pair, a second dielectric, and a protective film on the second substrate; And And a partition wall disposed between the first panel and the second panel, the partition wall including a mother glass and a porous filler. The method of claim 1, wherein the porous filler, Plasma display panel, characterized in that the cavity is formed inside the particles. The method of claim 1, wherein the porous filler, Plasma display panel, characterized in that the groove is formed on the particle surface. The method of claim 1, wherein the porous filler, Plasma display panel, characterized in that the size of 0.1 to 50 micrometers. The porous filler according to any one of claims 1 to 4, wherein And a material selected from the group consisting of SiO ₂ , Al ₂ O ₃ , ZnO, alumina silicate, Mg ₂ SiO ₄ , Vycor glass and CaO. According to claim 1, The mother glass is, Plasma display panel, characterized in that the lead-free glass. The method of claim 6, wherein the lead-free glass, ZnO; B ₂ O ₃ ; And A plasma display panel comprising a material selected from the group consisting of BaO, SrO and CaO. A first panel provided with an address electrode, a mother glass, a white dielectric having a porous filler according to claims 1 to 7, and a phosphor on a first substrate; And And a second panel bonded to the first panel with a partition therebetween, the second panel including a sustain electrode pair, a transparent dielectric, and a protective film on a second substrate. A first panel including an address electrode, a white dielectric, and a phosphor on the first substrate; And A second panel bonded to the first panel with a partition wall interposed therebetween, the second panel including a transparent dielectric and a protective film having a pair of sustain electrodes and a mother glass and a porous filler according to claims 1 to 7 on a second substrate; Plasma display panel comprising a. Forming an address electrode and a first dielectric on the first substrate; Forming a partition wall formed of mother glass and a porous filler on the first substrate; Applying a phosphor in a cell partitioned by the partition wall; Forming a sustain electrode pair, a dielectric, and a protective film on the second substrate; And And bonding the first substrate and the second substrate together. The method of claim 10, wherein forming the partition wall, A method of manufacturing a plasma display panel, which is performed by any one of a sanding method, an etching method and a photosensitive method. The method of claim 10, The forming of the partition wall is performed by an etching method, The etching rate of the lower part of the material of the said partition is 1.2 times-3 times the etching rate of the upper part of the material of the said partition. The method of claim 10, The weight ratio of the porous filler included in the upper portion of the partition wall, the manufacturing method of the plasma display panel, characterized in that 1.05 times to 1.50 times the weight ratio of the porous filler included in the lower portion of the partition wall. The method of claim 10, wherein forming the partition wall, Preparing a partition material by mixing a solvent, a dispersant, a parent glass and a porous filler; Applying the barrier material onto the first dielectric; And And selectively etching the barrier material.

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