KR20090049271A - Plasma display apparatus and driving method thereof - Google Patents

Abstract

The present invention relates to a plasma display device and a method thereof.

A plasma display device according to an embodiment of the present invention is a plasma display panel including a scan electrode, a sustain electrode disposed in parallel with the scan electrode, and an address electrode intersected with the scan electrode and the sustain electrode, the scan electrode during the reset period Supplying a second reset pulse having a polarity opposite to that of the first reset pulse continuously after supplying the first reset pulse, supplying a first bias voltage to the scan electrode during the address period, and applying a first bias to the scan electrode during the sustain period A scan driver for supplying a first sustain pulse swinging the voltage and the first sustain voltage, and swinging the first bias voltage and the second sustain voltage higher than the first sustain voltage to the sustain electrode during the reset period, the address period, and the sustain period; Sustain drive and address for 2 sustain pulses For a period and a data driver for supplying data pulses to the address electrodes.

Description

Plasma Display Apparatus and Method Thereof {Plasma Display Apparatus And Driving Method Thereof}

The present invention relates to a plasma display device and a method thereof.

In general, a plasma display panel is a partition wall formed between a front panel and a rear panel to form a unit discharge cell, and each cell includes neon (Ne), helium (He), or a mixture of neon and helium (Ne + He). An inert gas containing a main discharge gas such as and a small amount of xenon is filled. A plurality of unit discharge cells described above are gathered to form one pixel. For example, a red (R) cell, a green (G) cell, and a blue (B) cell may form one pixel. When a high frequency voltage is supplied to such a unit discharge cell to discharge, an inert gas generates vacuum ultra violet rays and emits phosphors formed between the partition walls to realize an image. Such a plasma display panel has a spotlight as a next generation display device because of its thin and light configuration.

A plurality of electrodes, for example, a scan electrode (Y), a sustain electrode (Z), an address electrode (X), and a driver for driving the electrodes are attached to the plasma display panel to form a plasma display apparatus.

SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma display device and a method thereof in which a cost of a driving circuit is reduced by removing a scan pulse in an address period by using self-erase discharge.

The technical problem of the present invention is not limited to the above-mentioned thing, and another technical problem to be achieved by the present invention will be clearly understood by those skilled in the art by the effect of the configuration of the present invention.

Plasma display device according to an embodiment of the present invention for achieving the above object is a plasma display panel including a scan electrode, a sustain electrode disposed in parallel with the scan electrode and an address electrode disposed to cross the scan electrode and the sustain electrode, After supplying the first reset pulse to the scan electrode during the reset period, and subsequently supplying a second reset pulse having a polarity opposite to the first reset pulse, supplying the first bias voltage to the scan electrode during the address period, and during the sustain period A scan driver for supplying a first sustain pulse swinging the first bias voltage and the first sustain voltage to the scan electrode, and a second higher than the first bias voltage and the first sustain voltage to the sustain electrode during the reset period, the address period, and the sustain period To supply a second sustain pulse that swings the sustain voltage. And a sustain driver and a data driver for supplying data pulses to the address electrodes during the address period.

Also, the highest voltage of the second reset pulse may include a voltage equal to or higher than the first sustain voltage and lower than the second sustain voltage.

Also, the difference between the highest voltage of the first reset pulse and the first bias voltage may include greater than the difference between the first sustain voltage and the first bias voltage and less than the difference between the second sustain voltage and the first bias voltage.

Also, the difference between the highest voltage of the first reset pulse and the first bias voltage may include greater than the difference between the highest voltage of the second reset pulse and the first bias voltage.

In addition, the second sustain voltage may include 1.44 times or more and 1.86 times or less of the first sustain voltage.

Also, the first sustain voltage may include 140 V or more and 160 V or less and a second sustain voltage of 235 V or more and 255 V or less.

The maximum voltage range of the first reset pulse may include -240 V or more and -220 V or less and the range of the maximum voltage of the second reset pulse may be 140 V or more and 160 V or less.

Also, the highest voltage of the data pulse may include 0.15 times or more and 0.25 times or less of the first sustain voltage.

In addition, the range of the highest voltage of the data pulse may include 25 V or more and 35 V or less.

In addition, the width of the first sustain pulse or the second sustain pulse may include 7 dB or more and 9 dB or less.

In addition, the address period may include 0.5 ms or more and 4 ms or less.

In addition, the scan electrode may include a first scan electrode line and a second scan electrode line sequentially disposed later than the first scan electrode line, and a supply time point of the first reset pulse supplied to the second scan electrode line may be a first scan. It may include a delay than the time of supply of the first reset pulse supplied to the electrode line.

In addition, the first scan electrode group and the second scan electrode group include at least one scan electrode, and a supply time point of the first reset pulse supplied to the second scan electrode group is a first reset supplied to the first scan electrode group. It may include a delay than the supply time of the pulse.

In addition, the supply timing of the second sustain pulse supplied to the second scan electrode group may include a delay than the supply timing of the second sustain pulse supplied to the first scan electrode group.

In addition, the driving method of the plasma display device according to an embodiment of the present invention for achieving the above object is a second second having the opposite polarity to the first reset pulse continuously after supplying the first reset pulse to the scan electrode during the reset period Supplying a reset pulse, supplying a first bias voltage to the scan electrode during the address period, supplying a data pulse to the address electrode, and swinging the first bias voltage and the first sustain voltage to the scan electrode during the sustain period. Supplying a first sustain pulse and supplying a second sustain pulse swinging a first bias voltage and a second sustain voltage higher than the first sustain voltage to the sustain electrode during the reset period, the address period, and the sustain period.

As described above in detail, the plasma display device and the driving method thereof according to an embodiment of the present invention are designed to have a high voltage of the second sustain pulse supplied to the sustain electrode, thereby generating a very slight occurrence between the scan electrode and the sustain electrode. By using one self-erasing discharge, the address can be addressed using only a data pulse without a scan pulse, thereby reducing the cost of the plasma display apparatus.

Hereinafter, a plasma display device according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 illustrates a plasma display device according to an embodiment of the present invention.

1, a plasma display device according to an embodiment of the present invention includes a plasma display panel 100 including an electrode and a driving unit. In addition, the driver includes a scan driver 200, a sustain driver 300, and a data driver 400.

First, the plasma display panel 100 is bonded to the front panel (not shown) and the rear panel (not shown) at regular intervals, and scan electrodes Y1 to Yn, sustain electrodes Z1 to Zn, and address electrodes X1. To Xm).

The scan driver 200 supplies a first reset pulse to the scan electrodes Y1 to Yn during the reset period, and then continuously supplies a second reset pulse having a polarity opposite to that of the first reset pulse. The first bias voltage is supplied to Y1 to Yn, and the first sustain pulse is provided to swing the first bias voltage and the first sustain voltage to the scan electrodes Y1 to Yn during the sustain period.

The sustain driver 300 supplies a second sustain pulse swinging a first bias voltage and a second sustain voltage higher than the first sustain voltage to the sustain electrode during the reset period, the address period, and the sustain period.

In the data driver 400, inverse gamma correction and error diffusion are performed by an inverse gamma correction circuit, an error diffusion circuit, and the like, and then data mapped to each subfield is supplied by a subfield mapping circuit.

In addition, the data driver 400 supplies data pulses to the address electrodes X1 to Xm during the address period in response to a data timing control signal from a timing controller (not shown).

The structure of the plasma display panel included in the plasma display apparatus is as follows.

2 illustrates a structure of a plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 2, a plasma display panel according to an embodiment of the present invention includes a front panel 110 including a front substrate 111 on which a scan electrode 112 and a sustain electrode 113 are formed, and the scan electrode described above. The rear panel 120 including the back substrate 121 on which the address electrode 123 intersects the 112 and the sustain electrode 113 is formed is bonded to each other at a predetermined interval.

Here, the scan electrode 112 and the sustain electrode 113 formed on the front substrate 111 are formed in parallel with each other to generate a discharge in the discharge cell and maintain the discharge of the discharge cell.

The scan electrode 112 and the sustain electrode 113 formed on the front substrate 111 emit light generated in the discharge cell to the outside, and it is necessary to consider light transmittance and electrical conductivity in order to secure driving efficiency. Accordingly, each of the scan electrode 112 and the sustain electrode 113 may include bus electrodes 112b and 113b made of metal such as silver and transparent electrodes 112a and indium tin oxide (ITO). 113a).

An upper dielectric layer 114 may be formed on the front substrate 111 on which the scan electrode 112 and the sustain electrode 113 are formed to cover the scan electrode 112 and the sustain electrode 113.

The upper dielectric layer 114 limits the discharge current of the scan electrode 112 and the sustain electrode 113 and insulates the scan electrode 112 and the sustain electrode 113.

A protective layer 115 may be formed on the upper dielectric layer 114 to facilitate discharge conditions. The protective layer 115 may be made of magnesium oxide (MgO) having a high secondary electron emission coefficient.

On the other hand, the address electrode 123 formed on the rear substrate 121 is an electrode for supplying a data pulse to the discharge cell.

The lower dielectric layer 125 may be formed on the rear substrate 121 on which the address electrode 123 is formed to cover the address electrode 123.

In the upper portion of the lower dielectric layer 125, a discharge space, that is, a partition wall 122 for partitioning the discharge cells is formed. Red (R), green (G), and blue (B) phosphor layers may be formed in the discharge cells partitioned by the barrier rib 122 to emit visible light for image display during address discharge. have.

In the plasma display panel according to the exemplary embodiment described above, when a driving pulse is supplied to the scan electrode 112, the sustain electrode 113, and the address electrode 123, the plasma display panel may be disposed in the discharge cell partitioned by the partition wall 122. Discharge occurs in the image to realize the image.

In FIG. 2, only the plasma display panel according to the exemplary embodiment is illustrated and described, but it is not limited thereto.

The operation of the plasma display apparatus according to the exemplary embodiment of the present invention including the plasma display panel will be described with reference to FIGS. 3 to 4.

3 is a view illustrating a 1TV field for implementing a gradation level in a method of driving a plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 3, in the plasma display apparatus according to an exemplary embodiment, the 1TV field for implementing gray levels is divided into several subfields having different emission counts.

Although not shown, each subfield has a reset period for initializing all discharge cells, an address period for selecting discharge cells to be discharged, and a sustain period for implementing gradation according to the number of discharges. (Sustain Period) may be configured, in which an address period is included in the sustain period.

One field, which is one field, may be divided into 32 subfields 1SF, 2SF,..., 31SF, and 32SF. One subfield includes a reset pulse, a first bias voltage, and a sustain pulse. The reset pulse, the first bias voltage and the sustain pulse are supplied to each scan electrode line Y1 to line Yn in a continuous shift mode of the subfield. In this case, the inclination line of each subfield boundary represents a first bias voltage which is linearly and continuously supplied to the scan electrodes lines Y1 to line Yn. When the first bias voltage is supplied to the scan electrode lines Y1 to Yn, the data pulse is supplied to the address electrode to generate an erase address discharge by the self erase discharge. Since it is not generated, the sustain voltage is generated by adding the sustain voltage and the wall voltage remaining in the discharge cell.

In this manner, the gray scale weight of the corresponding subfield can be set by adjusting the number of sustain pulses supplied in the address period and the sustain period.

Accordingly, by adjusting the number of sustain pulses supplied to each subfield according to the gray scale weight in each subfield, various gray levels are realized.

In FIG. 3, only one 1TV field is composed of 32 subfields and described. However, the number of subfields constituting one 1TV field may be variously changed.

4 is a view illustrating an operation of a method of driving a plasma display device according to an embodiment of the present invention.

Referring to FIG. 4, the operation of the plasma display apparatus according to an exemplary embodiment of the present invention shown in any one sub-field of a plurality of subfields included in the 1TV field as shown in FIG. 3 is described. Each of the scan driver 200, the sustain driver 300, and the data driver 400 described above with reference to FIG. 1 includes the scan electrode Y and the sustain electrode Z in at least one of a reset period, an address period, and a sustain period. And a driving pulse to the address electrode X.

During the reset period, the scan driver 200 supplies the first reset pulse rp1 to the scan electrodes Y1 and Y13 to generate a first reset discharge for all the discharge cells formed in the plasma display panel to initialize the states of all the discharge cells. You can. Thereafter, a second reset pulse rp2 having a polarity opposite to that of the first reset pulse rp1 is continuously supplied. By supplying the second reset pulse rp2 to the scan electrodes Y1 and Y13, a second reset discharge is generated to generate priming particles such as space charge or metastable particles. Can be.

At this time, the sustain driver 300 supplies the second sustain pulse sp2 to the sustain electrode Z1, and the data driver 400 supplies the ground level voltage GND to the address electrode X.

Thereafter, the scan driver 200 supplies the first bias voltage Bis1 to the scan electrode during the address period. While the first bias voltage Bis1 is supplied to the scan electrodes Y1 and Y13, the sustain driver 300 continuously supplies the second sustain pulse sp2 to the sustain electrode Z1, and the data driver 400 supplies the second sustain pulse sp2. The data pulse dp is supplied to the address electrode X. This data pulse dp is supplied to the address electrode after the second sustain pulse sp2 is supplied and then before the second sustain pulse sp2 is supplied. That is, the data pulses dp and for Y1 correspond to the scan electrode Y1, and the data pulses dp and for Y13 correspond to the scan electrode Y13.

Accordingly, the erasing address discharge can be generated using priming particles and data pulses dp generated in the reset period.

Subsequently, during the sustain period, the scan driver 200 supplies the first sustain pulse sp1 swinging the first bias voltage Bis1 and the first sustain voltage Vs1 to the scan electrodes Y1 and Y13. The sustain driver 300 supplies a second sustain pulse sp2 swinging the first bias voltage Bis1 and the second sustain voltage Vs2 to the sustain electrode Z1.

Accordingly, even when the first sustain pulse sp1 or the second sustain pulse sp2 is added to the discharge cell selected by the erase address discharge, that is, the addressed discharge cell, the wall voltage is erased in the discharge cell, so that the sustain discharge occurs. Otherwise, the unselected discharge cells are supplied with the first sustain pulse sp1 and the second sustain pulse sp2 as the wall voltage in the discharge cell and the first sustain pulse sp1 or the second sustain pulse sp2 are added. Each time a sustain discharge occurs between the scan electrodes Y1 and Y13 and the sustain electrode Z1.

In addition, the first reset pulse rp1, the second reset pulse rp2, the data pulse dp, the first sustain pulse sp1, and the second sustain pulse sp2 described above will be described below.

First, the highest voltage of the second reset pulse sp2 may be a voltage equal to or higher than the first sustain voltage Vs1 and lower than the second sustain voltage Vs2. As a result, more priming particles, such as space charge and metastable particles, can be generated and stable erase address discharge can be generated.

The difference V1 between the highest voltage of the first reset pulse rp1 and the first bias voltage Bis1 is greater than the difference V4 between the first sustain voltage Vs1 and the first bias voltage Bis1 and is greater than the second sustain voltage. It may be smaller than the difference V5 between Vs2 and the first bias voltage Bis1. In this case, the first bias voltage Bis1 may be a reference voltage GND.

Further, the difference V1 between the highest voltage of the first reset pulse rp1 and the first bias voltage Bis1 is greater than the difference V2 between the highest voltage of the second reset pulse rp2 and the first bias voltage Bis1. Can be large.

As a result, not only the priming particles can be generated more, but also the priming particles, which are non-uniformly formed with respect to the discharge cells formed in the plasma display panel, can be uniformly formed in all the discharge cells, thereby reducing the false discharge of the erase address discharge. Can be. For this reason, the range of the highest voltage of the first reset pulse rp1 may be -240 V or more and -220 V or less and the range of the highest voltage of the second reset pulse rp2 may be 140 V or more and 160 V or less.

In addition, the second sustain voltage Vs2 may be higher than the first sustain voltage Vs1. This is because the second sustain voltage Vs2 supplied to the sustain electrode Z1 is higher than the first sustain voltage Vs1 supplied to the scan electrodes Y1 and Y13, thereby providing the sustain electrode Z1 and the scan electrode ( Weak self-erasing discharge may occur between Y1 and Y13). When the self-erasing discharge proceeds, when the data pulse dp is supplied to the address electrode X, the discharge between the data electrode X and the sustain electrode Z1 is triggered to trigger the scan electrodes Y1 and Y13 and the sustain. An erase address discharge occurs between the electrodes Z1. Accordingly, the discharge cell can be selected.

For this reason, the second sustain voltage Vs2 may be 1.44 times or more and 1.86 times or less than the first sustain voltage Vs1, and the first sustain voltage Vs1 may be 140 V or more and 160 V or less and the second sustain voltage Vs2. May be greater than or equal to 235 V and less than or equal to 255 V.

Further, the highest voltage V3 of the data pulse dp may be 0.15 times or more and 0.25 times or less of the first sustain voltage Vs1, and the range of the highest voltage of the data pulse may be 25 V or more and 35 V or less.

In addition, the width of the first sustain pulse or the width T of the second sustain pulse may be 7 mW or more and 9 mW or less. This is to generate sustain discharge more stably.

In addition, since the address period is included in the sustain period, the data pulse dp must be supplied to the address electrode X while the second sustain pulse sp2 is supplied to the sustain electrode Z1. Therefore, the address period is 0.5 ms or more and 4 ms or less smaller than the width T of the second sustain pulse. Here, the address period and the width of the data pulse may be substantially the same.

In addition, the reset pulse supplied to the scan electrode may be delayed and supplied. Detailed description thereof will be given with reference to FIGS. 5 and 6.

5 is a view for explaining the operation of the plasma display device driving method according to an embodiment of the present invention.

Referring to FIG. 5, the scan electrodes Y1, Y13,..., And Y757 are second scan electrode lines Y13 disposed sequentially after the first scan electrode Y1 line and the first scan electrode Y1 line. It may include.

The supply timing of the first reset pulse rp1 supplied to the second scan electrode Y13 line is delayed to supply than the supply timing of the first reset pulse rp1 supplied to the first scan electrode Y1 line Y1. Can be.

In the present invention, since the address is supplied by supplying only the data pulse dp without supplying the scan pulse during the address period, the scan electrodes Y1, Y13, ... are sequentially arranged to supply the first reset pulse rp1. By supplying with delay along the Y757 line, the timing of the data pulse dp can be made more accurate and the erase address discharge can be stably generated. Accordingly, the driving method of the present invention may be an AWD (Address While Display) method that can be easily controlled for each scan electrode line. Accordingly, in the driving method of the present invention, when the data pulse dp is supplied without the scan pulse, the erase address discharge is caused by the self erase discharge, and when the data pulse dp is not supplied, the first sustain pulse sp1 and the first sustain pulse sp1 are generated. The sustain discharge is caused by the two sustain pulses sp2.

In addition, since the control is easy for each scan electrode line, only a reset period is required in at least one subfield among the plurality of subfields.

6 is a view for explaining the operation of the plasma display device driving method according to another embodiment of the present invention.

Referring to FIG. 6, the first scan electrode group Y1, Y13,... Y757 (G1) and the second scan electrode group Y2, Y14, .. Y758 (G2) include at least one scan electrode. Then, the supply timing of the first reset pulse rp1 supplied to the second scan electrode groups Y2, Y14, ... Y758 (G2) is determined by the first scan electrode groups Y1, Y13, ... Y757 (G1). It is possible to delay the supply time of the first reset pulse rp1 supplied to)).

Since the description thereof is substantially the same as delaying the supply time of the first reset pulse rp1 for each scan electrode line described with reference to FIG. 5, the description thereof will be omitted.

Further, when the second sustain pulse sp2 supplied to the second scan electrode group Y2, Y14,... Y758 (G2) is supplied, the first scan electrode group Y1, Y13,... Y757 (G1) There may be a delay than the time of supply of the second sustain pulse sp2 supplied to)).

By delaying the supply timing of the second sustain pulse sp2 supplied to each of the plurality of groups, it is possible to prevent driving noise that may occur when the supply timings of the second sustain pulse sp2 supplied to the plurality of groups are the same. have.

At this time, the supply time point of the second sustain pulse sp2 supplied to the second scan electrode groups Y2, Y14, ... Y758 (G2) and the first scan electrode groups Y1, Y13, ... Y757 (G1) It is preferable that the delay time occurring between the time points of supplying the second sustain pulses sp2 supplied to)) is 0.66 ms or less.

In FIG. 6, the scan electrodes are divided into only two groups, but the scan electrodes may be divided into 12 groups, and one group may be divided into 64 scan electrode lines. Accordingly, the sustain electrode can also be divided into 12 groups.

Accordingly, each of the plurality of scan electrode groups may be supplied with a delayed supply time of the second sustain pulse sp2.

In addition, since the first sustain pulse sp1 and the second sustain pulse sp2 are supplied in all the periods of the 1TV field except for the period in which the erase address discharge occurs, a sustain duty of about 98% can be obtained. Here, the sustain duty indicates the time at which the sustain pulse can be supplied in all periods of the 1TV field, and the more the time the sustain pulse can be supplied, the more the image quality of the plasma display panel can be improved.

As such, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof. Therefore, the embodiments described above are to be understood as illustrative and not restrictive in all aspects.

The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

1 illustrates a plasma display device according to an embodiment of the present invention.

2 illustrates a structure of a plasma display panel according to an exemplary embodiment of the present invention.

3 is a view illustrating a 1TV field for implementing a gradation level in a method of driving a plasma display panel according to an exemplary embodiment of the present invention.

4 is a view illustrating an operation of a method of driving a plasma display device according to an embodiment of the present invention.

5 is a view for explaining the operation of the plasma display device driving method according to an embodiment of the present invention.

6 is a view for explaining the operation of the plasma display device driving method according to another embodiment of the present invention.

Claims (20)

A plasma display panel including a scan electrode, a sustain electrode disposed to be parallel to the scan electrode, and an address electrode disposed to intersect the scan electrode and the sustain electrode; Supplying a first reset pulse to the scan electrode during a reset period, and subsequently supplying a second reset pulse having a polarity opposite to that of the first reset pulse; Supplying a first bias voltage to the scan electrode during an address period, A scan driver configured to supply a first sustain pulse to the scan electrode to swing the first bias voltage and the first sustain voltage during a sustain period; A sustain driver configured to supply a second sustain pulse swinging the first bias voltage and a second sustain voltage higher than the first sustain voltage to the sustain electrode during the reset period, the address period, and the sustain period; And A data driver which supplies a data pulse to the address electrode during the address period; Plasma display device comprising a. According to claim 1, And the highest voltage of the second reset pulse is equal to or higher than the first sustain voltage and lower than the second sustain voltage. According to claim 1, The difference between the highest voltage of the first reset pulse and the first bias voltage is greater than the difference between the first sustain voltage and the first bias voltage and less than the difference between the second sustain voltage and the first bias voltage. Plasma display device. The method of claim 3, wherein And the difference between the highest voltage of the first reset pulse and the first bias voltage is greater than the difference between the highest voltage of the second reset pulse and the first bias voltage. According to claim 1, And the second sustain voltage is 1.44 times or more and 1.86 times or less of the first sustain voltage. The method of claim 5, And the first sustain voltage is 140 V or more and 160 V or less and the second sustain voltage is 235 V or more and 255 V or less. According to claim 1, The maximum voltage range of the first reset pulse is -240 V or more and -220 V or less, and the maximum voltage range of the second reset pulse is 140 V or more and 160 V or less. According to claim 1, And the highest voltage of the data pulse is 0.15 times or more and 0.25 times or less of the first sustain voltage. The method of claim 8, And a maximum voltage range of the data pulse is 25 V or more and 35 V or less. According to claim 1, And a width of the first sustain pulse or the second sustain pulse is 7 m or more and 9 m or less. According to claim 1, And the address period is 0.5 ms or more and 4 ms or less. According to claim 1, The scan electrode includes a first scan electrode line and a second scan electrode line sequentially disposed later than the first scan electrode line, And a time of supply of the first reset pulse supplied to the second scan electrode line is delayed than a time of supply of the first reset pulse supplied to the first scan electrode line. According to claim 1, The first scan electrode group and the second scan electrode group include at least one scan electrode, And a time point of supplying the first reset pulse supplied to the second scan electrode group is delayed than a time point of supplying the first reset pulse supplied to the first scan electrode group. The method of claim 13, And a time point of supplying the second sustain pulse supplied to the second scan electrode group is delayed than a time point of supplying the second sustain pulse supplied to the first scan electrode group. A method of driving a plasma display apparatus comprising a scan electrode, a sustain electrode disposed to be parallel to the scan electrode, and an address electrode disposed to intersect the scan electrode and the sustain electrode. Supplying a first reset pulse to the scan electrode during a reset period and subsequently supplying a second reset pulse having a polarity opposite to that of the first reset pulse; Supplying a first bias voltage to the scan electrode and a data pulse to the address electrode during an address period; Supplying a first sustain pulse to the scan electrode to swing the first bias voltage and a first sustain voltage during a sustain period; And Supplying a second sustain pulse swinging the first bias voltage and a second sustain voltage higher than the first sustain voltage to the sustain electrode during the reset period, the address period, and the sustain period. Method of driving a plasma display device comprising a. The method of claim 15, And the highest voltage of the second reset pulse is equal to or higher than the first sustain voltage and lower than the second sustain voltage. The method of claim 15, The difference between the highest voltage of the first reset pulse and the first bias voltage is greater than the difference between the first sustain voltage and the first bias voltage and less than the difference between the second sustain voltage and the first bias voltage. A method of driving a plasma display device. The method of claim 17, And the difference between the highest voltage of the first reset pulse and the first bias voltage is greater than the difference between the highest voltage of the second reset pulse and the first bias voltage. The method of claim 15, The scan electrode includes a first scan electrode line and a second scan electrode line sequentially disposed later than the first scan electrode line, And delaying a supply timing of the first reset pulse supplied to the second scan electrode line from a supply timing of the first reset pulse supplied to the first scan electrode line. Method of driving. The method of claim 15, The first scan electrode group and the second scan electrode group include at least one scan electrode, Driving the plasma display device to delay the supply timing of the first reset pulse supplied to the second scan electrode group from the supply timing of the first reset pulse supplied to the first scan electrode group. Way.

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