KR20090048102A

KR20090048102A - Method for soft programming and method for verifying/reading of non volatile memory device

Info

Publication number: KR20090048102A
Application number: KR1020070114318A
Authority: KR
Inventors: 심근수; 전유남
Original assignee: 주식회사 하이닉스반도체
Priority date: 2007-11-09
Filing date: 2007-11-09
Publication date: 2009-05-13

Abstract

The soft program method of the nonvolatile memory device of the present invention includes providing a nonvolatile memory device in which an erase operation is performed on all cells, performing a soft program operation on a specific cell among cells included in a cell string; And setting a negative verification voltage to be applied to the cell on which the soft program operation is performed, and setting a pass voltage to be applied to a cell except for the cell on which the soft program operation is performed among the cells included in the cell string. And setting a negative voltage to be applied to the substrate, performing a soft program verification operation according to the set voltage, and performing the soft program until all the cells included in the cell string are verified. Performing an operation and performing the soft program verifying operation. It is characterized by the step of copying.

Soft programs, interference

Description

Method for soft programming and method for verifying / reading of non volatile memory device

The present invention relates to a soft program method and a verification / read method of a nonvolatile memory device capable of improving the distribution of each cell.

Recently, there is an increasing demand for a nonvolatile memory device that can be electrically programmed and erased and that does not require a refresh function to rewrite data at regular intervals.

Each cell of the nonvolatile memory device to which the Multi Level Cell (MLC) programming method is applied has a different threshold voltage distribution compared to cells to which the Single Level Cell (SLC) programming method is applied. Make sure you have enough read margin.

On the other hand, a factor affecting the distribution of the threshold voltage is a threshold voltage shift due to interference (Vt Shift). This is due to the characteristics of the nonvolatile memory device using the floating gate. If the decrease is made, the distribution of the threshold voltage is improved according to the state of each cell, so that the maximum program voltage may be reduced, which may reduce the overall program time. Come.

As the threshold voltage shift caused by such interference increases as the variation of the threshold voltage of the neighboring cell increases, it is necessary to reduce the threshold voltage variation of the neighboring cell. However, there is a limit in reducing the threshold voltage variation of neighboring cells because the voltage distribution of various states and the margin of read margin should be secured during the multi-level cell program operation.

SUMMARY OF THE INVENTION In accordance with the above-described problems, an object of the present invention is to provide a soft program method of a nonvolatile memory device that can improve cell distribution by using a cell-specific verification method and a method of minimizing interference effects.

In addition, an object of the present invention is to provide a method for verifying / reading a nonvolatile memory device that can improve cell distribution using a method of minimizing interference effects.

The soft program method of the nonvolatile memory device of the present invention for solving the above problems is provided with a step of providing a nonvolatile memory device that has been erased for all cells, and soft to a specific cell of the cells included in the cell string Performing a program operation, setting a negative verification voltage to be applied to the cell on which the soft program operation is performed, and performing a cell operation on a cell other than the cell in which the soft program operation is performed among the cells included in the cell string. Setting a pass voltage to be applied; setting a negative voltage to the substrate; performing a soft program verification operation according to the set voltage; and verifying all cells included in the cell string. Performing the soft program operation until completion and checking the soft program And repeating performing the increment operation.

In addition, the program verifying method of the nonvolatile memory device of the present invention may include setting a verification reference voltage to be applied to a selected cell among cells included in a cell string, and passing a pass for unselected cells among cells included in the cell string. Setting a voltage to be applied; setting a negative voltage to the substrate; and determining whether the threshold voltage of the selected cell is equal to or greater than a verification reference voltage by applying the respective voltages. It is done.

The nonvolatile memory device may further include setting a read reference voltage to be applied to a selected cell among cells included in a cell string, and a pass voltage for unselected cells among cells included in the cell string. And setting a voltage to apply a negative voltage to the substrate, and determining whether the threshold voltage of the selected cell is equal to or greater than a read reference voltage by applying the respective voltages. do.

According to the configuration of the present invention described above it is possible to further improve the distribution of the threshold voltage of each cell after the soft program. That is, the erased cells can narrow their distribution while maintaining a constant margin with 0V.

In addition, by applying a negative voltage to the substrate, it is possible to reduce the degree of change of the threshold voltage due to interference. This may be applied to a soft program operation, a verify operation, a read operation, and the like, which may improve the distribution of threshold voltages between erased cells and programmed cells.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, only these embodiments are intended to complete the disclosure of the present invention, and to those skilled in the art to fully understand the scope of the invention. It is provided to inform you. Like numbers refer to like elements in the figures.

FIG. 1 is a diagram showing a voltage applied during verification after a soft program of a conventional nonvolatile memory device.

After the erase operation of the nonvolatile memory device is performed, a soft program operation is performed to improve the distribution of the threshold voltage. This is done to narrow the distribution while maintaining the erased state.

In the normal post-program verify operation, a voltage of 0 V is applied to all word lines and a voltage of 0 V is also applied to the substrate bulk to verify the entire string. On the other hand, a high level voltage is applied to the word lines SSL and DSL connected to each select transistor to turn on each transistor.

According to this verification method, when one cell of all cells included in one cell string is programmed above a specific voltage, the corresponding cell is turned off to cut off the current path formed through the cell string. Accordingly, the soft program is regarded as complete and the verification operation is completed for the corresponding cell string.

However, in this method, when at least one of the cells included in the entire cell string is programmed above a specific voltage, that is, even if the remaining cells are not programmed above a specific voltage, the verification is completed. There is a problem that the distribution can be widened.

Accordingly, the present invention intends to perform a soft program verification operation on each cell included in the entire cell string.

On the other hand, in addition to the interference caused by the capacitance between the floating gates, as the size of the device is reduced, the interference directly affects the electrons of the neighboring cells.

2 is a diagram illustrating a direct interference phenomenon by an adjacent cell of a nonvolatile memory device.

As shown, electrons stored in adjacent cells around the main cell may directly affect the main cell. On the other hand, as the size of the device is reduced with the development of technology, its influence is more and more.

In order to solve this problem, a configuration of applying a negative voltage to a substrate of a nonvolatile memory device is adopted.

3 is a graph illustrating a change of a Vg-Id curve according to a voltage applied to a substrate of a nonvolatile memory device.

When a voltage of 0 V is applied to the substrate in accordance with the normal operation, as the peripheral cells are programmed, they affect the swing on the Vg-Id curve of the main cell. In addition to the interference due to the capacitance between the floating gates, There is a problem that the total interference is increased. In order to solve this problem, when the cell-off current is reduced by applying a voltage of about -3V to the substrate, there is almost no swing change before and after interference, and only interference caused by capacitance between floating gates is generated. Threshold voltage change is reduced.

This problem also occurs in the verify / read operation of the nonvolatile memory device.

4 is a diagram illustrating a voltage applied during a verify / read operation of a conventional nonvolatile memory device.

As shown, a verification voltage PV or a read voltage is applied to a word line WL1 connected to a cell to be verified (or read), and a pass voltage Vread is applied to a word line connected to another cell. Is applied. On the other hand, a high level voltage is applied to the word lines SSL and DSL connected to each select transistor to turn on each transistor. In addition, a voltage of 0 V is applied to the substrate.

According to this configuration, it is determined whether the current path is formed according to whether the selected cell is programmed above the verify voltage, and it is determined whether the program is completed.

However, as mentioned above, even in such an operation, there is a problem in that various interference phenomena occur due to the reduction of the cell, and thus the threshold voltage fluctuation occurs.

5 is a diagram illustrating a voltage applied during a soft program verifying operation according to an embodiment of the present invention, and FIG. 6 is a flowchart illustrating a soft program method according to an embodiment of the present invention.

Unlike the method of FIG. 1, the present invention performs a soft program verification operation for each cell included in each cell string.

First, an erase operation is performed on all cells (step 610).

In the case of the erase operation, a block string including a plurality of cell strings is performed. Applying a negative high voltage to the substrate causes FN tunneling, which causes electrons stored in the cell to be released, causing the threshold voltage of each cell to drop below 0V.

Next, a soft program operation is performed on a specific cell among cells included in the cell string (step 620).

In the present invention, a soft program operation is performed in units of pages including a specific cell among cells included in a cell string. In this case, the soft program operation is not an operation of programming the erased cell above 0V, but an operation of narrowing the distribution while increasing the threshold voltage close to 0V.

Next, a voltage is set to perform a soft program verify operation (step 630).

A negative verify voltage is applied to a cell on which the soft program operation is performed, a pass voltage is applied to a cell except for the cell on which the soft program operation is performed, and a negative voltage is applied to the substrate. .

As shown in FIG. 5, a reference voltage Vsv, which is a reference of verification, is applied to one cell of all cell strings, and a pass voltage Vread is applied to the remaining cells, thereby exceeding a specific reference voltage for each cell. Performs a verify operation if it is soft programmed. At this time, a voltage of about -2.5 to -0.5V is applied as the reference voltage Vsv.

In addition, as the pass voltage, a high voltage of 6 to 8V is applied.

On the other hand, a high level voltage is applied to the word lines SSL and DSL connected to each select transistor to turn on each transistor.

As mentioned above, a negative voltage is applied to the substrate in order to minimize interference. Preferably a voltage of about -5 to -1V is applied.

Next, a soft program verification operation is performed according to the set voltage (step 640).

That is, whether the current path is formed in the corresponding cell string is determined based on whether the threshold voltage of the selected cell is greater than the verification voltage, and it is determined whether verification is completed based on this. If the verification is not completed, the soft program operation is repeatedly performed. If the verification is completed, the soft program / verification operation is performed on the remaining cells (step 650).

That is, the step of performing the soft program operation and the step of performing the soft program verification operation are repeatedly performed until the verification is completed for all the cells included in the cell string.

Next, a program verification / reading operation according to the present invention will be described.

7 is a diagram illustrating a voltage applied during a verify / read operation according to an embodiment of the present invention, and FIG. 8 is a flowchart illustrating a program verifying method and a reading method according to an embodiment of the present invention.

First, a read reference voltage is set to be applied to a selected cell among cells included in the cell string (step 810).

That is, the reference voltage Vpv serving as the reference for verification / reading is applied to one cell of all cell strings.

Next, a pass voltage is applied to unselected cells among the cells included in the cell string (step 820).

As the pass voltage, a high voltage of 6 to 8V is applied.

Next, a negative voltage is applied to the substrate.

This is to minimize interference as mentioned above, and preferably a voltage of about -5 to -1V is applied.

Next, it is determined whether the threshold voltage of the selected cell is greater than or equal to the verify / read reference voltage by applying the respective voltages (step 840).

At this time, a high level voltage is applied to the word lines SSL and DSL connected to each selection transistor to turn on each transistor.

It is determined whether a current path is formed in a cell string based on whether a specific cell is programmed above a reference voltage. Based on this, data stored in a specific cell is read.

9 is a diagram illustrating the distribution of threshold voltages by the soft program operation and the verify operation according to the present invention.

In the case of the distribution of the erased cells according to the present invention it can be seen that the distribution of the threshold voltage is narrower than the conventional distribution. This is an effect derived from the configuration of the present invention that performs the verification operation of the soft program for all cells included in the cell string.

In addition, unlike the conventional invention, the negative voltage is applied to the substrate, thereby reducing the change in the threshold voltage due to interference.

On the other hand, when the distribution of the cells in the programmed state is applied, the negative voltage is applied to the substrate, the change in the threshold voltage due to interference is reduced, the overall cell distribution is narrowed and the margin for each state is widened.

5 is a diagram illustrating a voltage applied during a soft program verifying operation according to an exemplary embodiment of the present invention.

6 is a flowchart illustrating a soft program method according to an embodiment of the present invention.

7 is a diagram illustrating a voltage applied during a verify / read operation according to an embodiment of the present invention.

8 is a flowchart illustrating a program verifying method and a reading method according to an exemplary embodiment of the present invention.

Claims

Providing a nonvolatile memory device in which an erase operation is performed on all cells;

Performing a soft program operation on a specific cell among cells included in the cell string;

Setting a negative verify voltage to be applied to a cell on which the soft program operation is performed;

Setting a pass voltage to be applied to cells except for cells in which a soft program operation is performed among the cells included in the cell string;

Setting a negative voltage to the substrate;

Performing a soft program verification operation according to the set voltage;

Performing the soft program operation and performing the soft program verify operation until all the cells included in the cell string are verified, repeating the step of performing the soft program operation. .

The method of claim 1, wherein the setting of the negative verification voltage is applied to the cell on which the soft program operation is performed, wherein a voltage of −0.5 to −2.5 V is applied to a word line connected to the cell on which the soft program operation is performed. A soft program method for a nonvolatile memory device comprising the step of applying.

The soft program method of claim 1, wherein the setting of the negative voltage to the substrate comprises applying a voltage of −1 to −5 V to the substrate.

Setting a verification reference voltage to be applied to a selected cell among cells included in the cell string;

Setting a pass voltage to be applied to unselected cells among cells included in the cell string;

Setting a negative voltage to the substrate;

And determining whether the threshold voltage of the selected cell is greater than or equal to a verification reference voltage by applying the respective voltages.

The method of claim 4, wherein the setting of the negative voltage to the substrate comprises applying a voltage of −1 to −5 V to the substrate.

Setting a read reference voltage to be applied to a selected cell among cells included in the cell string;

Setting a negative voltage to the substrate;

And determining whether the threshold voltage of the selected cell is equal to or greater than a read reference voltage by applying the respective voltages.

The method of claim 6, wherein the setting of the negative voltage to the substrate comprises applying a voltage of −1 to −5 V to the substrate.