KR20090044472A - Method of fabricating array substrate for liquid crystal display device - Google Patents

Abstract

The present invention relates to a method of manufacturing an array substrate for a liquid crystal display device which can reduce the number of masks. The disclosed method includes providing a substrate having a gate electrode, forming a gate insulating film on the substrate, forming an active pattern and a source / drain electrode sequentially stacked on the gate insulating film, and source / drain Forming a protective film on a substrate having an electrode, and preparing a mask having a transmissive region, a transflective region, and a light shielding region on the substrate having the protective film, wherein the transmissive region corresponds to a channel region between the source electrode and the drain electrode. And a semi-transmissive region formed at a portion corresponding to the drain electrode, forming a first photoresist pattern on the passivation layer using a mask, and using the first photoresist pattern. Patterning the semiconductor substrate to expose the drain electrode, removing the first photoresist pattern, and Forming a transparent conductive film on the substrate from which the photosensitive film has been removed, forming a second photosensitive film pattern having a different photosensitive property from the first photosensitive film pattern using a mask, and using the second photosensitive film pattern to form the transparent conductive film. Patterning the pixel electrode to cover the drain electrode;

Description

Manufacturing method of array substrate for liquid crystal display device {METHOD OF FABRICATING ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE}

The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing an array substrate for a liquid crystal display device which can reduce the number of masks.

Recently, with increasing interest in information display and increasing demand for using a portable information carrier, a lightweight flat panel display (FPD), which replaces a conventional display device, a cathode ray tube (CRT), is used. The research and commercialization of Korea is focused on. In particular, the liquid crystal display (LCD) of the flat panel display device is an image representing the image using the optical anisotropy of the liquid crystal, is excellent in resolution, color display and image quality, and is actively applied to notebooks or desktop monitors have.

The liquid crystal display is largely composed of a color filter substrate as a first substrate, an array substrate as a second substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate. In this case, a thin film transistor (TFT) is generally used as a switching element of the liquid crystal display.

As the channel layer of the thin film transistor, an amorphous silicon thin film is used.

The manufacturing process of the liquid crystal display device is basically performed by a plurality of mask processes (ie, photolithography process) to fabricate an array substrate including a thin film transistor.

FIG. 1 is an exploded perspective view schematically illustrating a general liquid crystal display, and the structure of a general liquid crystal display will be described in detail with reference to FIG. 1.

As shown in FIG. 1, the liquid crystal display device is largely composed of a color filter substrate 5, an array substrate 10, and a liquid crystal layer formed between the color filter substrate 5 and the thin film transistor array substrate 10. liquid crystal layer) 30.

The color filter substrate 5 includes a color filter C composed of a plurality of sub-color filters 7 for implementing colors of red (R), green (G), and blue (B); A black matrix separating the sub-color filter 7 and blocking light transmitted through the liquid crystal layer 30

matrix) 6 and a transparent common electrode 8 for applying a voltage to the liquid crystal layer 30.

In addition, the thin film transistor array substrate 10 is vertically and horizontally arranged, and includes a plurality of gate lines 16 and data lines 17 defining a plurality of pixel regions P, and the gate lines 16 and data lines 17. And a thin film transistor T1, which is a switching element formed at an intersection region of the transistors), and a pixel electrode 18 formed on the pixel region P.

The color filter substrate 5 and the thin film transistor array substrate 10 configured as described above are bonded to face each other by sealants (not shown) formed on the outer side of the image display area to form a liquid crystal display panel. The bonding of 5 and 10 is performed through a bonding key (not shown) formed in the color filter substrate 5 or the array substrate 10.

2A through 2F are cross-sectional views illustrating processes of cutting the thin film transistor T1 in FIG. 1. Hereinafter, a manufacturing process of a thin film transistor array substrate of a general liquid crystal display device will be described with reference to FIGS. 2A to 2F.

As shown in FIG. 2A, a gate electrode 21 made of a conductive metal material is formed on the thin film transistor array substrate 10 by using a photolithography process (first mask process).

Subsequently, as shown in FIG. 2B, a gate insulating film 23 is formed on the substrate 10 on which the gate electrode 21 is formed. Next, an amorphous silicon film 25, an n + amorphous silicon film 27, and a metal film 29 are sequentially deposited on the gate insulating film 23. Thereafter, a photosensitive film is coated on the metal film 29. In this case, the photoresist may be divided into a positive type in which the exposed part is developed and a negative type in which the exposed part remains. In general, a positive type is used in an array process.

Then, the photoresist is selectively exposed and developed to form photoresist patterns 41 having different thicknesses. At this time, the photoresist pattern 41 has a relatively thin portion where a channel is to be formed.

Subsequently, as shown in FIG. 2C, the metal pattern, the n + amorphous silicon film, and the amorphous silicon film are photo-etched (second mask process) using the photoresist pattern as a mask to form an active pattern 25 'formed of an amorphous silicon film. Form. The photoresist pattern is then ashed to expose the channel region.

Meanwhile, reference numerals 27 'and 29', which are not described in FIG. 2C, represent residual n + amorphous silicon films and metal films, respectively, and reference numeral 41P, which is not described, shows ashed photoresist patterns.

Subsequently, as shown in FIG. 2D, the remaining metal film and the n + amorphous silicon film are photo-etched using the ashed photoresist pattern as a mask to form a source electrode 29'S and a drain electrode 29'D. (Third Mask Process) At this time, an ohmic contact layer 27 '' made of an n + amorphous silicon film is further formed between the source electrode / drain electrode 29'S (29'D) and the active pattern 25 '. Next, the ashed photoresist pattern is removed.

Next, as shown in FIG. 2E, a protective film 31 is formed on the substrate having the ohmic contact layer 27 ″. Thereafter, the protective layer 31 is selectively etched to form a contact hole 31H exposing a portion of the drain electrode 29'D. (4th mask process)

Subsequently, as shown in FIG. 2F, a transparent conductive metal material film is formed on the substrate having the contact hole 31H. In this case, as the transparent conductive metal material film, a transparent conductive metal having excellent light transmittance, such as indium-tin-oxide (ITO), is used. Next, the transparent conductive metal material film is selectively etched to form a pixel electrode 33 electrically connected to the drain electrode 29 ′ D through the contact hole 31H. (5th mask process)

As described above, in the fabrication of the array substrate including the thin film transistor, four photolithography processes and four masks are basically used to pattern the gate electrode, the active pattern and the source / drain electrode, the contact hole, and the pixel electrode. Needed. However, since these four mask processes are advantageous in terms of productivity and cost as the number of masks is reduced, a method of reducing the number of masks is required.

In order to solve the above problems, the present invention provides a method of manufacturing a liquid crystal display device which can reduce the number of masks by forming a protective layer contact hole and a pixel electrode by using photosensitive film patterns having different photosensitive properties obtained by the same mask. Is to provide.

In order to achieve the above object, a method of manufacturing an array substrate for a liquid crystal display device according to the present invention comprises the steps of providing a substrate having a gate electrode, forming a gate insulating film on the substrate, an active pattern stacked on the gate insulating film in order Forming a source / drain electrode, forming a protective film on the substrate having the source / drain electrode, and preparing a mask having a transmissive area, a transflective area, and a light shielding area on the substrate having the protective film, wherein the transmissive area is Forming a region in the region corresponding to the channel region between the source electrode and the drain electrode, wherein the transflective region is formed in the region corresponding to the drain electrode, and forming a first photoresist pattern on the passivation layer using a mask. And patterning the passivation layer using a first photoresist pattern to expose the drain electrode. Removing the first photoresist pattern, forming a transparent conductive film on the substrate from which the first photoresist layer is removed, and using a mask to form a second photoresist pattern having a different photoresist property. And forming the pixel electrode covering the drain electrode by patterning the transparent conductive layer using a second photoresist layer pattern.

According to the present invention, the number of masks used for manufacturing the thin film transistor is reduced to three, thereby reducing the manufacturing process and cost. That is, according to the present invention, the protective film contact hole and the pixel electrode are formed by using photosensitive film patterns having different photosensitive properties obtained by the same mask, thereby reducing the number of masks and thus reducing the manufacturing process and cost.

Hereinafter, exemplary embodiments of a method for manufacturing an array substrate for a liquid crystal display device according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a plan view schematically illustrating a part of an array substrate for a liquid crystal display according to the present invention.

As shown in FIG. 3, in the array substrate 100 for a liquid crystal display device according to the present invention, a thin film transistor T2, which is a switching element, is positioned in a matrix, and a gate line passing through the plurality of thin film transistors T2 crosses. 110 and data line 120 are formed.

The thin film transistor T2 is connected to the gate line 110 to receive a scan signal, and has a gate electrode 110G, a source electrode 107'S connected to the data line 120 to receive a data signal and the source. And a drain electrode 107'D spaced a predetermined distance from the electrode 107'S.

In addition, the thin film transistor T2 further includes an active pattern 103P formed on the gate electrode 110G and in contact with the source electrode 107'S and the drain electrode 107'D. Although not shown, an ohmic contact layer (not shown) may be interposed between the active pattern 103P vertically formed of pure amorphous silicon and the source / drain electrodes 107'S and 107'D.

The pixel region (not shown) corresponds to a region defined by the intersection of the gate line 110 and the data line 120, and on the pixel region, indium-tin-oxide (ITO). As shown, the pixel electrode 110P made of a transparent conductive metal having excellent light transmittance is formed. A portion of the pixel electrode 110P may extend to the upper portion of the gate line 110.

In addition, the gate line 110 transmits a pulse voltage driving the gate electrode 110G of the thin film transistor T2, and the data line 120 supplies the source electrode 107 ′ S of the thin film transistor T1. It is a means for transmitting the driving signal voltage.

Meanwhile, a gate pad 110P is configured at one end of the gate line 110, and a data pad 120P is configured at one end of the data line 120.

An island-shaped transparent conductive film pattern is formed on the gate line 110, and the transparent conductive film pattern is in side contact with the transparent pixel electrode 111P extending above the gate line 110.

In this configuration, a part of the gate line 110 functions as the first storage electrode 110C. Therefore, the transparent electrode film pattern in side contact with the pixel electrode 111P functions as a second storage electrode, and a gate insulating layer (not shown) disposed between the storage first electrode and the storage second electrode serves as a dielectric. The storage capacitor Cst may be configured.

Each of the lines and patterns of the array substrate for a liquid crystal display device is formed by a photolithography process using a photosensitive film which is a photosensitive material. In this case, the photolithography process may vary in manufacturing process and cost depending on the number of masks. Therefore, the present invention proposes a method of reducing the number of masks to three to reduce the manufacturing process and cost, and will be described together with the formation of a thin film transistor and a process of forming a gate pad, a data pad, and a storage capacitor.

4A to 4I are cross-sectional views of processes taken along lines II ′, II-II ′, and III-III ′ of FIG. 3. Hereinafter, a method of manufacturing an array substrate for a liquid crystal display device according to the present invention having the above-described configuration will be described with reference to FIGS. 3 and 4A to 4I.

As shown in FIG. 4A, each of the gate line 110 and the gate line 110 is connected to the gate electrode 110P by using a photolithography process (first mask process) on the thin film transistor array substrate 100. And the gate pad 110P and the first storage electrode 110C. In this case, the substrate 100 includes a gate pad region (corresponding to region I′-I), a data pad region (corresponding to region II′-II), a storage capacitor region, and a thin film transistor region (III) from the left side of the drawing. '-III area) are defined respectively.

The gate line 110, the gate line 110, the gate electrode 110P and the gate pad 110P and the first storage electrode 110C connected to each other are formed of the same conductive metal material film.

Subsequently, as shown in FIG. 4B, a gate insulating layer 102 is formed on the substrate 100 having the first storage electrode 110C. Next, an amorphous silicon film 103, an n + amorphous silicon film 105, and a metal film 107 are sequentially formed on the gate insulating film 102.

Thereafter, a first photosensitive film is coated on the metal film 107. Typically, the photoresist film may be divided into a positive type in which the exposed part is developed and a negative type in which the exposed part remains. Here, the first photosensitive film is formed in a positive type in which the exposed part is developed. Thereafter, the first photoresist film is selectively exposed and developed to form a first photoresist pattern 151 having a different thickness. In this case, the first photoresist pattern 151 covers a region where a data line is to be formed and a region where a thin film transistor is formed, but has a relatively thin portion where a channel is to be formed.

Subsequently, as shown in FIG. 4C, the metal film, the n + amorphous silicon film, and the amorphous silicon film are photo-etched using the first photoresist pattern as a mask (a second mask process is performed on the data line 120, the data pad 120P, and An active pattern 103P is formed of an amorphous silicon thin film, and the data line 120 and the data pad 120P are formed of an amorphous silicon film, an n + amorphous silicon film, and a metal film. Esh to expose the channel region.

In FIG. 4C, reference numerals 105 ′ and 107 ′ represent the remaining n + amorphous silicon film and the metal film, respectively, and reference numeral 151 ′ represents the first photoresist film pattern that is ashed.

Subsequently, as illustrated in FIG. 4D, the remaining metal film and the n + amorphous silicon thin film are photo-etched using the first photosensitive film pattern as a mask to form a source electrode 107 ′ S and a drain electrode 107 ′ D. do. At this time, an ohmic contact layer 105'P made of an n + amorphous silicon thin film is formed between the source electrode / drain electrode 107'S and 107'D and the active pattern 103P. Subsequently, the ashed first photoresist pattern is removed.

As shown in FIG. 4E, the passivation layer 109P and the second photoresist layer 153 are sequentially formed on the substrate from which the ashed first photoresist layer pattern is removed.

A mask 171 having a transmissive area, a transflective area, and a light shielding area is prepared on the substrate having the second photosensitive film 153. In this case, in the thin film transistor region, the transmissive region is formed at a portion corresponding to the channel region between the source electrode 107'S and the drain electrode 107'D, and the transflective region is The light blocking region is formed on a portion corresponding to the drain electrode 107'D, and the light blocking region is formed on the remaining portions except for the transmissive region and the transflective region. In addition, the mask 171 is formed in the upper gate pad region and the data pad region, and the light shielding region is formed at a portion where the gate pad and the data pad are to be opened. The mask 171 has a transflective area formed at a portion of the storage electrode area corresponding to the storage electrode.

As shown in FIG. 4F, the second photoresist film is exposed and developed using the mask to form a second photoresist pattern 153P having a different thickness. In this case, the second photoresist layer pattern 153P is formed in the thin film transistor region to expose at least the channel region between the source electrode and the drain electrode and to relatively cover the drain electrode. In addition, the second photoresist pattern 153P is formed to expose the gate pad and the data pad, respectively, in the gate pad and the data pad region. The second photoresist pattern 153P is formed in the storage electrode area to relatively cover the storage electrode 110C.

As shown in FIG. 4G, the passivation layer is patterned using the second photoresist layer pattern 153P as a mask. As a result of the patterning, the passivation layer is formed to expose the gate pad, the data pad, and the drain electrode and cover the storage electrode and the channel region. Then, the second photosensitive film pattern is removed. Subsequently, the transparent metal conductive film 111 and the third photosensitive film 155 are sequentially formed on the substrate from which the second photosensitive film pattern is removed. In this case, the third photoresist layer 155 may be formed in a positive type having different photosensitivity from that of the second photoresist layer. That is, the third photosensitive film 155 has a photosensitive property in which the exposed portion is removed.

Then, as shown in FIG. 4H, the third photoresist layer is exposed and developed using the mask 171 to form a third photoresist pattern 155P.

Thereafter, as shown in FIG. 4I, the transparent metal conductive film is patterned using the third photoresist pattern as a mask to form a pixel electrode 111P covering the drain electrode 107'D. In this case, the transparent conductive film patterns 111P1 and 111P2 covering the gate pad 110P and the data pad 120P are formed along with the pixel electrode 111P.

The array substrate manufacturing according to the present invention as described above is made of three masks.

1 is an exploded perspective view schematically showing a general liquid crystal display device.

FIG. 2A to FIG. 2F are cross-sectional views for each process sequentially illustrating a process of manufacturing a thin film transistor array substrate in the liquid crystal display shown in FIG. 1.

3 is a plan view schematically showing a part of an array substrate for a liquid crystal display device according to the present invention;

4A to 4I are cross-sectional views of processes taken along lines II ′, II-II ′, and III-III ′ of FIG. 3.

Claims (12)

Providing a substrate having a gate electrode; Forming a gate insulating film on the substrate; Forming an active pattern and a source / drain electrode sequentially stacked on the gate insulating layer; Forming a protective film on the substrate having the source / drain electrodes; A mask having a transmissive region, a transflective region, and a light shielding region is prepared on the substrate having the passivation layer, wherein the transmissive region is formed at a portion corresponding to the channel region between the source electrode and the drain electrode, and the transflective region Is formed in a portion corresponding to the drain electrode; Forming a first photoresist pattern on the passivation layer using the mask; Patterning the passivation layer using the first photoresist pattern to expose the drain electrode; Removing the first photoresist pattern; Forming a transparent conductive film on the substrate from which the first photoresist film is removed; Forming a second photoresist pattern having a different photoresist property from the first photoresist pattern using the mask; And forming a pixel electrode covering the drain electrode by patterning the transparent conductive film using the second photoresist pattern. The method of claim 1, wherein the forming of the active pattern and the source / drain electrodes comprises: Sequentially forming an amorphous silicon film and a metal film on the gate insulating film; Forming a photoresist pattern having a relatively thin channel region on the metal layer; Patterning the metal film and the amorphous silicon film using the photoresist pattern as a mask to form an active pattern formed of an amorphous silicon film; Exposing the channel region by ashing the photoresist pattern; Patterning the remaining metal film using the ashed photoresist pattern as a mask; And removing the ashed photosensitive film pattern. The method of manufacturing an array substrate for a liquid crystal display device according to claim 1, wherein the first photosensitive film pattern uses a negative photosensitive film. The method of claim 3, wherein the first photoresist pattern forming step, Forming a first photoresist film on the protective film; And exposing and developing the first photoresist layer using the mask, wherein the first photoresist pattern is formed to expose at least a channel region between the source electrode and the drain electrode and to cover the drain electrode. A method of manufacturing an array substrate for a liquid crystal display device, characterized in that. The method of manufacturing an array substrate for a liquid crystal display device according to claim 1, wherein the second photosensitive film pattern uses a positive photosensitive film. The method of claim 5, wherein the second photoresist pattern forming step, Forming a second photoresist film on the protective film; And exposing and developing the second photoresist film using the mask, wherein the second photoresist pattern is formed to cover at least a channel region between the source electrode and the drain electrode and to expose the drain electrode. A method of manufacturing an array substrate for a liquid crystal display device. Providing a substrate having a gate line, a gate electrode, a gate pad, and a storage electrode; Forming a gate insulating film on the substrate; Forming an active pattern, a source / drain electrode, a data line, and a data pad on the gate insulating layer, respectively; Forming a protective film on the substrate having the data pad; A mask having a transmissive region, a transflective region, and a light shielding region is prepared on the substrate having the passivation layer, wherein the transmissive region is formed at a portion corresponding to the channel region between the source electrode and the drain electrode, and the transflective region Is formed at a portion corresponding to the drain electrode and the storage electrode; Forming a first photoresist pattern on the passivation layer using the mask; Patterning the passivation layer using the first photoresist pattern to expose the drain electrode and the storage electrode, respectively; Removing the first photoresist pattern; Forming a transparent conductive film on the substrate from which the first photoresist pattern is removed; Forming a second photoresist pattern of a different type from the first photoresist pattern by using the mask on a substrate having the transparent conductive film; And forming a pixel electrode covering the drain electrode and the storage electrode by patterning the transparent conductive layer using the second photoresist pattern as a mask. The method of claim 7, wherein the forming of the active pattern, the source / drain electrodes, the data lines, and the data pads comprises: Sequentially forming an amorphous silicon film and a metal film on the gate insulating film; Forming a photoresist pattern having a relatively thin channel region on the metal layer; Patterning the metal film and the amorphous silicon film using the photoresist pattern as a mask to form an active pattern formed of an amorphous silicon film; Exposing the channel region by ashing the photoresist pattern; Patterning the remaining metal film using the ashed photoresist pattern as a mask; And removing the ashed photosensitive film pattern. 8. The method of claim 7, wherein the first photosensitive film pattern uses a negative photosensitive film. The method of claim 9, wherein the forming of the first photoresist layer pattern comprises: Forming a first photoresist film on the protective film; And exposing and developing the first photoresist layer using the mask, wherein the first photoresist pattern is formed to expose at least a channel region between the source electrode and the drain electrode and to cover the drain electrode. A method of manufacturing an array substrate for a liquid crystal display device, characterized in that. 8. The method of manufacturing an array substrate for a liquid crystal display device according to claim 7, wherein the second photosensitive film pattern uses a positive photosensitive film. The method of claim 11, wherein the second photoresist pattern forming step, Forming a second photoresist film on the protective film; And exposing and developing the second photoresist film using the mask, wherein the second photoresist pattern is formed to cover at least a channel region between the source electrode and the drain electrode and to expose the drain electrode. A method of manufacturing an array substrate for a liquid crystal display device.

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