KR20090043909A - Method for manufacturing multi layer printed circuit board - Google Patents

Abstract

The present invention includes the steps of (a) preparing an inner substrate, (b) forming sprocket holes at both sides of the inner substrate, and (c) forming a first circuit pattern on at least one surface of the inner substrate. (D) laminating an outer layer substrate on the inner substrate such that the sprocket hole is exposed to the outside, (e) forming an alignment hole on the outer layer substrate, and (f) forming the alignment hole. It provides a multi-layer printed circuit board manufacturing method comprising the step of forming a second circuit pattern on at least one surface of the outer layer substrate as a reference.

Description

Method for manufacturing multi layer printed circuit board

The present invention relates to a method for manufacturing a multilayer printed circuit board, and more particularly, to minimize the processing tolerances between the inner layer board and the outer layer board constituting the multilayer printed circuit board, thereby preventing inconsistency between circuit patterns of the inner layer board and the outer layer board. The present invention relates to a multilayer printed circuit board manufacturing method.

Printed circuit boards are becoming an essential component in almost all electronic industry related fields, including information appliances such as computers and portable terminals, as well as home appliances such as TVs, cameras and VCRs. In particular, due to the recent convergence of electromagnetic periods and miniaturization and integration of components, the importance of substrates connected to small electronic components is increasing.

Printed circuit board (PCB) is divided into flexible substrate and rigid substrate according to the rigidity of the board, and divided into single-sided PCB, double-sided PCB and multilayer PCB according to the number of wiring layers. . Currently, multi-layer PCBs and multi-layer flexible PCBs lead the market, but new build-up PCBs and embedded PCBs are also being introduced.

Recently, in addition to miniaturization of surface-mount electronic components such as IC chips, resistors, and capacitors, printed circuit boards on which they are mounted are also required to be densified, which tends to be multilayered. In general, multilayer printed circuit boards having four or six layers of conductor layers are used, and multilayer printed circuit boards having more conductor layers are used in the industry.

Since multilayer printed circuit boards are made by stacking a plurality of inner and outer layers, it is very important to align wiring and holes. If the alignment between the inner layer and the outer layer of the multilayer printed circuit board is misaligned, there is a problem that connection between layers is not made or adjacent wirings are shorted to each other.

The main object of the present invention is to provide a method for manufacturing a multilayer printed circuit board which can match the circuit patterns of the inner layer board and the outer layer board by minimizing the processing tolerances of the inner layer board and the outer layer board constituting the multilayer printed circuit board.

A method for manufacturing a multilayer printed circuit board according to the present invention includes the steps of (a) providing an inner layer substrate, (b) forming sprocket holes on both sides of the inner layer substrate, and (c) at least one of the inner layer substrates. Forming a first circuit pattern on a surface, (d) laminating an outer layer substrate on the inner substrate such that the sprocket hole is exposed to the outside, and (e) forming an alignment hole on the outer layer substrate; and (f) forming a second circuit pattern on at least one surface of the outer substrate based on the alignment hole.

In the present invention, step (c) may include forming the first circuit pattern using the sprocket hole as a reference point.

In the present invention, step (c) may include forming the first circuit pattern in a central portion of the inner substrate.

In the present invention, the step (d) includes the steps of providing the outer layer substrate having a width smaller than that of the inner substrate, and stacking the outer layer substrate at the center of the inner substrate so that the sprocket holes are exposed to the outside. It may be provided with a step.

In the present invention, the step (e) may include the step of forming the alignment hole on the basis of the sprocket hole.

In the present invention, the step (e) may be formed such that the alignment hole penetrates both the outer layer substrate and the inner substrate.

In the present invention, the alignment hole may be formed by mold processing.

In the present invention, after the step (e), it may further comprise the step of removing both sides of the inner substrate substrate in which the sprocket hole is formed.

In the present invention, removing both sides may include removing both sides such that the inner substrate and the outer substrate have the same width.

In the present invention, step (f) may further include forming the second circuit pattern on the outer substrate with the alignment hole as a reference point.

The present invention can minimize the processing error between the inner layer substrate and the outer layer substrate by forming the second circuit pattern of the outer layer substrate using the reference point used in forming the first circuit pattern of the inner layer substrate, and the circuit of the inner layer substrate and the outer layer substrate You can reduce the pattern mismatch.

Hereinafter, with reference to the embodiments of the present invention shown in the accompanying drawings will be described in detail the present invention. But. The present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. The embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity, and the elements denoted by the same reference numerals in the drawings are the same elements.

1 to 5 are cross-sectional views illustrating a method of manufacturing a multilayer printed circuit board according to an exemplary embodiment of the present invention.

First, the inner substrate 110 is prepared as shown in FIG. 1. The inner layer substrate 110 may be formed by stacking the first thin film layer 102 on one or both surfaces of the base substrate 101.

The base substrate 110 may be a composite including a fiber, such as glass fiber, and a resin. In one embodiment, a glass epoxy laminate is mainly used, and in some cases, Bismaleimide Triazine (BT) resin, polyimide, PPE, PPO resin, or the like may be used, and the material of the base substrate 110 may be used. Many other variations can be used.

The first thin film layer 102 may be formed as a first circuit pattern 104 that is laminated and fixed to one or both surfaces of the base substrate 101 and is electrically conductive. In this case, it is preferable that the 1st thin film layer 102 is a copper foil layer in which the raw material containing copper is formed into a thin film.

The first thin film layer 102 may be formed on one surface of the base substrate 110 by a lithography process.

Sprocket holes 113 may be formed on the inner layer substrate 110. The sprocket hole 113 may be a through hole formed through the inner substrate 110. The sprocket hole 113 may have a rectangular cross section as shown in FIG. 1, and may have a circular cross section or various other cross sections. The sprocket hole 113 may be formed at both side portions 110a and 110b on the inner substrate 110 surface. The first circuit pattern 104 may be formed in the central portion 112 of the inner layer substrate 110 where the sprocket hole 113 is not formed, and when the circuit pattern 104 is formed, the sprocket hole 113 is formed of the first circuit pattern. 104 may serve as a reference point for formation. In addition, when processing the sprocket hole 113, the reference hole can be processed between the sprocket holes.

The sprocket hole 113 may be processed by laser drilling. At this time, the laser used may be a carbon dioxide gas laser or ultraviolet laser.

At the time of laser processing, it is preferable to arrange an entry sheet or a backup sheet for laser processing on the upper surface or the lower surface of the inner layer substrate 110 for smooth progress of the work. Ultraviolet laser processing conditions are changed depending on the thickness of the workpiece or the thickness of the metal conductor, and is controlled by controlling the energy of one shot, the position of the shot, the number of shots, the total energy sum, and the like.

On the other hand, when the sprocket hole 113 is formed in the copper foil laminated plate using a carbon dioxide gas laser, the first thin film layer 102 is removed by etching in the sprocket hole 113 forming portion and the first thin film layer 102 is laser irradiated. The sprocket hole 113 can be formed by a method of processing a furnace, a method of irradiating a laser to blacken or etch a copper surface, or a method of irradiating a laser after arranging an entry sheet for laser processing. In order to prevent damage to a processing table, a backup sheet for laser processing is arrange | positioned at the laser emission side.

In laser processing, a carbon dioxide gas laser and an ultraviolet laser may be used in combination. For example, after performing carbon dioxide gas laser processing, an ultraviolet laser can be used in order to form the opening part of a small diameter side.

Next, as shown in FIG. 2, the first circuit pattern 104 is formed on at least one surface of the inner layer substrate 110. The first circuit pattern 104 may be formed by an etching process. That is, the first circuit pattern 104 may be formed by an etching process with the photosensitive film attached to the first thin film layer 102. In the etching process, the sprocket hole 113 may be used as a reference point of the etching process. In the etching process, since the etching process for forming the first circuit pattern 104 may be performed using the sprocket hole 113 as a reference point without a separate guide mark, the manufacturing process may be shortened. Since both side portions 110a and 110b of the inner layer substrate 110 are removed later, the first circuit pattern 104 is preferably formed at the central portion 112 of the inner layer substrate 110.

Subsequently, the outer substrate 120 is laminated on the inner substrate 110 as shown in FIGS. 3A to 3C. An outer layer substrate 120 having a width smaller than that of the inner layer substrate 110 is provided. FIG. 3A is a perspective view illustrating an outer layer substrate 120 stacked on the inner layer substrate 110, and FIG. 3B is a plan view showing the outer layer substrate 120 stacked on the inner layer substrate 110, and FIG. 3C is shown in FIG. 3A. Longitudinal cross-sectional view taken along line II shown.

3A to 3C, the outer substrate 120 may be formed by stacking the second thin film layer 122 on one surface of the insulating layer 121.

The insulation layer 121 may be a laminate of epoxy resin, cyanate resin, bisamareiamide triazine resin, polyamide resin, polyphenylene ether resin, laminated glass, glass fiber-containing or glass-porous laminate, film-type insulation Materials can be used. In addition, the insulating layer 121 may be an insulating adhesive resin such as prepreg.

The second thin film layer 122 may be a copper foil layer in which a material including copper, such as the first thin film layer 102, is formed as a thin film.

The outer substrate 120 as described above may be stacked on one or both surfaces of the inner substrate 110 such that the second thin film layer 122 faces the outside. The outer layer substrate 120 is stacked on the inner layer substrate 110 so that the sprocket holes 113 formed on both side portions 110a and 110b of the inner layer substrate 110 can be exposed to the outside. More specifically, the width of the outer layer substrate 120 is formed to be smaller than the width of the inner layer substrate 110. The outer substrate 120 is stacked on the central portion 112 of the inner substrate 110 to adjust the width of the outer substrate 120 so that the sprocket hole 113 is exposed to the outside to provide the outer substrate 120. 3B is a plan view illustrating a multilayer printed circuit board on which the outer layer substrate 120 is stacked on the inner layer substrate 110, and shows the widths of the inner layer substrate 110 and the outer layer substrate 120. Referring to FIG. 3B, the width t1 of the outer layer substrate 120 is smaller than the width t3 of the inner layer substrate 110, and the center portion 112 of the inner layer substrate 110 on which the first circuit pattern 104 is formed. Is smaller than the width t2 of. Accordingly, the outer layer substrate 120 may be stacked on the central portion 112 of the inner layer substrate 110, and thus the outer layer substrate 120 may not be stacked on both side portions 110a and 110b of the inner layer substrate 110. The sprocket hole 113 is exposed to the outside. Since the sprocket hole 113 is exposed to the outside, the multilayer printed circuit board may be manufactured in a reel-to-reel manner, and the alignment hole 123 may be formed based on the sprocket hole 113.

 When the outer layer substrate 120 is laminated on the inner layer substrate 110, an insulation adhesive resin such as a prepreg may be stacked on the inner layer substrate 110, and the outer layer substrate 120 may be stacked. In addition, when the insulating layer 121 of the outer layer substrate 120 is an insulating adhesive resin such as a prepreg, the outer layer substrate 120 may be stacked on the inner layer substrate 110 without a separate adhesive resin.

Next, alignment holes 123 are formed on the outer substrate 120 as shown in FIGS. 4A to 4C. 4A is a perspective view illustrating a multilayer printed circuit board on which alignment holes 123 are formed, and FIG. 4B is a plan view illustrating a multilayer printed circuit board on which alignment holes 123 are formed, and FIG. 4C is a line II-II shown in FIG. 4A. A longitudinal cross-sectional view taken along the line is shown.

4A through 4C, the alignment hole 123 may be formed at an outer portion of the outer layer substrate 120. The second circuit pattern 124 may be formed in the center portion of the outer layer substrate 120 where the alignment hole 123 is not formed. The alignment hole 123 may be formed to penetrate not only the outer substrate 120 but also the inner substrate 110. That is, the outer layer substrate 120 may be formed on both surfaces of the inner layer substrate 110, and the multilayer printed circuit board on which the multilayer substrate is stacked may be formed on the outer layer substrate 120. May be formed to pass through the outer layer substrate 120 and the inner layer substrate 110 of all layers.

The alignment hole 123 may be formed based on the sprocket hole 113. More specifically, the alignment hole 123 may not be formed at an arbitrary position on the outer layer substrate 120, but may be formed at a position on the outer layer substrate 120 corresponding to some of the plurality of sprocket holes 113. The sprocket hole 113 may be formed at a position on the outer layer substrate 120 that is moved in parallel to the outer layer substrate 120 at the position where the sprocket hole 113 is formed. As such, a mold may be used to form the alignment holes 123 based on the sprocket holes 113. When the mold for forming the alignment hole 123 is manufactured, the alignment hole 123 is formed on the outer layer substrate 120 by being spaced apart based on the sprocket hole 113 and the structure that can be fitted to some sprocket holes 113. A mold having a structure that can be made is manufactured. In the case of using the mold, the alignment hole 123 may be formed in the outer layer substrate 120 by being inserted into the sprocket hole 113 and spaced apart from the sprocket hole 113 by a predetermined distance. The present invention is not limited thereto, and the alignment hole 123 may be formed by laser processing or drilling.

Subsequently, as shown in FIGS. 5A and 5B, a second circuit pattern 124 may be formed on one surface of the outer layer substrate 120. The second circuit pattern 124 is formed by an etching process, and the etching process is performed using the alignment hole 123 as a reference point. Since the first circuit pattern 104 of the inner layer substrate 110 is formed with the sprocket hole 113 as a reference point, the alignment hole 123 is formed with respect to the sprocket hole 113 and is referred to as the alignment hole 123. The second circuit pattern 124 is formed using substantially the same reference point as the first circuit pattern 104. Accordingly, processing tolerances between the inner layer substrate 110 and the outer layer substrate 120 can be minimized, and the first circuit pattern 104 of the inner layer substrate 110 and the second circuit pattern 124 of the outer layer substrate 120 can be minimized. Can prevent inconsistencies.

Both side portions 110a and 110b of the inner layer substrate 110 are removed before the second circuit pattern 124 is formed. Removing both sides 110a and 110b may be performed by mold processing. Removing both sides 110a and 110b may be performed such that the width of the inner layer substrate 110 and the width of the outer layer substrate 120 are the same as illustrated in FIG. 5A.

A protective layer (not shown) may be applied to the surface of the outer layer substrate 120 on which the second circuit pattern 124 is formed. The protective layer prevents a solder bridge phenomenon between the circuit and the circuit in a soldering process performed during component mounting in a later process.

The protective layer may be made of a material having physical properties such as insulation and photosensitivity. In one embodiment, a PSR (Photo Solder Resist) or SR (Solder Resist) may form a protective layer, and a thermoplastic resin, an ultraviolet curable resin, a thermosetting resin, or the like may be used as the protective layer. Such resins may comprise a plain filler component.

The present invention is not limited by the above-described embodiment and the accompanying drawings, but is intended to be limited by the appended claims, and various forms of substitution, modification, and within the scope not departing from the technical spirit of the present invention described in the claims. It will be apparent to those skilled in the art that changes are possible.

1 to 5 are process charts showing a method for manufacturing a multilayer printed circuit board according to an embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

101: base substrate 102: first thin film layer

104: first circuit pattern 110: inner substrate

113: sprocket hole 120: outer layer substrate

121: insulating layer 122: second thin film layer

123: second circuit pattern

Claims (10)

(a) preparing an inner layer substrate; (b) forming sprocket holes on both sides of the inner layer substrate; (c) forming a first circuit pattern on at least one surface of the inner layer substrate; (d) stacking an outer layer substrate on the inner substrate such that the sprocket holes are exposed to the outside; (e) forming an alignment hole on the outer layer substrate; And (f) forming a second circuit pattern on at least one surface of the outer substrate based on the alignment hole. The method of claim 1, In the step (c), the method of manufacturing the multilayer printed circuit board includes forming the first circuit pattern based on the sprocket hole as a reference point. The method of claim 1, In the step (c), the step of forming the first circuit pattern on the central portion of the inner substrate comprising the steps of manufacturing a printed circuit board. The method of claim 1, In step (d), Providing the outer layer substrate having a width smaller than that of the inner substrate; And Stacking the outer substrate to a central portion of the inner substrate such that the sprocket hole is exposed to the outside. The method of claim 1, In step (e), And the alignment hole is formed based on the sprocket hole. The method of claim 5, In step (e), And the alignment hole penetrates both the outer layer substrate and the inner substrate. The method of claim 1, The alignment hole is a multilayer printed circuit board manufacturing method is formed by the mold processing. The method of claim 1, After the step (e), further comprising the step of removing both sides of the inner substrate on which the sprocket hole is formed. The method of claim 8, Removing both sides, Removing the both sides such that the inner substrate and the outer substrate have the same width. The method of claim 1, The step (f) further comprises the step of forming the second circuit pattern on the outer substrate with the alignment hole as a reference point.

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