KR20090009713A - Liquid crystal display device of in-plane switching mode and method for manufacturing the same - Google Patents

Abstract

A liquid crystal display device of an in-plane switching mode and a method for manufacturing the same are provided to improve the uniformity of the field direction by forming edge patterns without making a space. A plurality of gate lines(32) and data line(34) defines the pixel region. The thin film transistor(TFT) is formed in each intersection of data line and plurality of gate lines. The common line(36) is made of the same layer as the gate line. A common electrode finger part(39) is branched into a plural number. A pixel electrode finger part(38a) is formed with the common electrode finger by turns. The first edge pattern(35) is protruded to L shape at the end of common electrode finger parts. The second edge patterns(38c,37a,37b) are protruded to L shape in one end of the pixel electrode finger part.

Description

Liquid crystal display of in-plane switching mode and manufacturing method therefor {LIQUID CRYSTAL DISPLAY DEVICE OF IN-PLANE SWITCHING MODE AND METHOD FOR MANUFACTURING THE SAME}

The present invention relates to a liquid crystal display device, and more particularly, to an in-plane switching mode liquid crystal display device that can improve the transmittance and contrast ratio of the liquid crystal display device.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. Such a liquid crystal display has various modes according to the arrangement of liquid crystal molecules. For example, the liquid crystal display is divided into a twisted nematic mode for controlling the liquid crystal director by a vertical electric field and an in-plane switching mode for controlling the director of the liquid crystal by a horizontal electric field. .

The TN mode liquid crystal display drives a liquid crystal by a vertical electric field formed between a pixel electrode and a common electrode disposed to face the upper and lower substrates. The TN mode liquid crystal display device has an advantage of large aperture ratio but a narrow viewing angle.

The in-plane switching mode liquid crystal display device includes a color filter array substrate and a thin film array substrate disposed opposite to each other and having a liquid crystal layer therebetween. A black matrix for preventing light leakage and a color filter layer for implementing colors on the black matrix are formed on the color filter array substrate. The thin film transistor array substrate includes a gate line and a data line defining a unit pixel, a thin film transistor formed at an intersection point of the gate line and the data line, and a common electrode and a pixel electrode formed to be parallel to each other to generate a horizontal electric field.

The in-plane switching mode liquid crystal display device has excellent viewing angle characteristics by a liquid crystal driving method using a horizontal electric field of a common electrode and a pixel electrode.

Referring to FIG. 1, a horizontal field application type liquid crystal display includes a thin film transistor array 10 and a color filter array 15 facing each other with a liquid crystal 9 interposed therebetween. The color filter array 15 includes a black matrix 3, a color filter 5, and an overcoat layer 7 sequentially formed on the upper substrate 1. The black matrix 3 serves to prevent light leakage and to prevent light interference between neighboring color filters. The color filter 5 includes red (R), green (G), and blue (B), so that light transmitted through the color filter 5 can display colors. The overcoat layer 7 serves to planarize the upper substrate 1 on which the black matrix 3 and the color filter 5 are formed.

The thin film transistor array 10 is a thin film connected to each of the gate line 12 and the data line 14 and the gate line 12 and the data line 14 that cross each other on the lower substrate 11 to define a pixel region. The transistor TFT includes a pixel electrode 18 connected to the thin film transistor TFT, a common electrode 19 parallel to the pixel electrode 18, and a common line 16 connected to the common electrode 19. do.

The thin film transistor TFT supplies the data signal from the data line 14 to the pixel electrode 18 in response to the gate signal from the gate line 12. An electric field is formed between the pixel electrode 18 supplied with the data signal through the thin film transistor TFT and the common electrode 19 supplied with the reference voltage through the common line 16. The common electrode 19 may be formed on a different layer or on the same layer as the pixel electrode 18. When the common electrode 19 is formed on a layer different from the pixel electrode, the common electrode 19 is connected to the common line 16 to receive a reference voltage from the common line 16. On the other hand, when the common electrode 19 is formed on the same layer as the pixel electrode 18, the common electrode 19 is connected to the common line 16 through a contact hole exposing the common line 16 and is connected to the common line 16. The reference voltage is supplied.

When an electric field is formed between the pixel electrode 18 and the common electrode 16 as described above, the liquid crystal 9 rotates by the electric field. The degree of rotation of the liquid crystal 9 is adjusted in accordance with the data signal.

An upper polarizing plate 2a and a lower polarizing plate 2b for transmitting light oscillating in a specific direction are attached to each of an outer surface of the upper substrate 1 and an outer surface of the lower substrate 11. In general, the transmission axis x of the upper polarizing plate 2a and the transmission axis y of the lower polarizing plate 2b are disposed to be perpendicular to each other.

The transmission axes x and y of the polarizing plates 2a and 2b and the initial alignment state of the liquid crystal 9 become an element that determines the display mode of the liquid crystal display. In general, the in-plane switching mode liquid crystal display is a normally black mode in which black is displayed on a screen when an electric field is not formed.

When an electric field is formed between the pixel electrode 18 and the common electrode 19 in the normally black mode, the liquid crystals 9 are arranged side by side in the electric field. Here, the liquid crystal 9 may be driven at a specific angle or more in an initial alignment state by an electric field to contribute to transmittance. Most of the light transmitted through the liquid crystal 9 arranged side by side in the electric field is transmitted through the upper polarizing plate 2b to realize gradation. However, the light passing through some of the liquid crystals 9 does not pass through the upper polarizing plate 2b. It does not contribute to the transmittance of the switching mode liquid crystal display. The reason why the liquid crystal 9 does not contribute to the transmittance occurs is due to the structural characteristics of the pixel electrode 18, the common electrode 19, and the common line 16.

2A and 2B are enlarged views of regions in which an electric field is formed in an undesired direction. 2A and 2B, the electric field direction is indicated by a double arrow (↔).

2A and 2B, the pixel electrode 18 and the common electrode 19 include a plurality of fingers 18a and 19a formed in parallel with each other in the pixel area. Meanwhile, in order for a signal to be applied to the pixel electrode finger portions 18a and the common electrode finger portions 19a, the finger portions 18a of each electrode are formed in a direction perpendicular to the finger portions 18a and 19a of each electrode. , 19a), and a connection for supplying each signal is required.

For example, as illustrated in FIG. 2A, the pixel electrode 18 and the common electrode 19 may be formed on the same layer. In this case, the pixel electrode 18 is formed in a direction perpendicular to the plurality of pixel electrode finger portions 18a and the pixel electrode finger portions 18a to connect the pixel electrode finger portions 18a to the pixel electrode connection portions 18b. ). The common electrode 19 also includes a plurality of common electrode fingers 19a.

For example, as illustrated in FIG. 2B, the pixel electrode 18 and the common electrode 19 may be formed on different layers. In this case, the common electrode 19 includes a plurality of common electrode finger portions 19a parallel to each other. The common electrode finger 19a is connected to a common line 16 formed in a direction perpendicular to the common electrode finger 19a to receive a reference voltage. In addition, the pixel electrode 18 is formed in a direction perpendicular to the pixel electrode finger portion 18a and the pixel electrode finger portion 18a parallel to the common electrode finger portion 19a to connect the pixel electrode finger portion 18a. It includes a connection.

When signals are supplied to the pixel electrode 18 and the common electrode 19 of the in-plane switching mode liquid crystal display as described above, the electric field direction applied to most pixel areas is the pixel electrode finger portion 18a and the common electrode ping. Towards rejection 19a. However, in the region adjacent to the common line 16 and the pixel electrode connector 18b, the electric field direction is directed toward the common line 16 and the pixel electrode connector 18b. This is an electric field formed between the common line 16 and the pixel electrode connecting portion 18b in a direction perpendicular to the fingers 18a and 19a so as to be formed between the common electrode finger portion 19a and the pixel electrode finger portion 18a. This is because it is distorted. Due to the electric field distortion caused by the common line 16 and the pixel electrode connector 18b, the direction of the electric field is not uniform in the region adjacent to the common line 16 and the pixel electrode connector 18b, that is, the pixel region edge. . In an area where the electric field is not uniform, an inefficient driving region A for driving the liquid crystal in a direction that does not contribute to the transmittance and a discrimination for allowing the liquid crystal to be driven in directions opposite to each other so that light cannot be transmitted at the boundary thereof ( Disclination (disclination) region (B) is generated.

The inefficient driving region A and the disclination region B lower the transmittance and contrast ratio of the liquid crystal display, and as a result, the in-plane switching mode liquid crystal display lowers the display quality.

In order to solve the above problems, an object of the present invention is to provide an in-plane switching mode liquid crystal display device that can improve the transmittance and contrast ratio in the liquid crystal display device.

In order to achieve the above technical problem, the liquid crystal display device of the in-plane switching mode according to the characteristics of the present invention, a gate line and a data line on the substrate to define a pixel area crossing each other; and the gate line and the data line A thin film transistor formed at an intersection of the first thin film transistor; a first common line formed of the same layer as the gate line; and a plurality of first fingers branched in the pixel area, respectively; &Quot; a first electrode finger portion including a protruding pattern; And second fingers formed alternately with the first fingers, respectively, in the pixel area, and one end of the second fingers includes a second electrode finger part formed in a “|” pattern. The "child projection pattern" and the "|" child pattern are characterized in that they are formed without being spaced apart from the first common line.

The “L” shaped protruding pattern includes a first edge portion extending from the first finger portion, and a second edge portion inclined to form an obtuse angle with the first edge portion.

Here, the first electrode finger portion is made of the same layer of metal as the gate line, and the second electrode finger portion is made of a transparent metal layer. The first electrode finger portion is integrally formed with the first common line, and the “L” shaped protruding pattern has a shape protruding from the first common line. One end of the second electrode finger portion may be formed to extend toward the first common line such that the "|" character pattern overlaps with the adjacent "L" character protruding pattern on the left side. At the end, the "-" character pattern is further extended and formed to overlap the "L" character protrusion pattern on the right side, and the "|" character pattern and the "-" character pattern have an "L" character shape. At this time, the first common line meets the "-" pattern of the second finger portion, and has a reduced portion having a reduced width, so that the "L" shaped protrusion pattern and the reduced portion have a stepped step shape on a plane. Can be.

In some cases, the first electrode finger portion and the second electrode finger portion are made of the same transparent metal layer.

In this case, the first common line protrudes in a shape overlapping with the "|" character pattern in the horizontal portion of the first common line so that the first common line is not spaced apart from the "|" character pattern of one end of the second finger part. It may be further provided with a first protruding pattern.

The shape of the first protrusion pattern and the horizontal part of the first common line is the same shape as the “L” pattern at one end of the first finger part, and the first protrusion pattern is one side of the second electrode finger part. It may be formed by partially overlapping the end of the "|" character pattern. Here, the first common line is electrically connected to the second electrode finger.

Meanwhile, the second edge portion is bent at an angle different from the horizontal portion of the first common line, and an obtuse angle between the first edge portion and the second edge portion is different from the first edge portion and the first common portion. It may be made larger than the angle between the horizontal portions of the line.

The “L” shaped protruding pattern may further include a third edge portion connected to the second edge portion and formed to be parallel to the gate line.

A second common line is further formed to pass through the pixel area, parallel to the first common line, and at a symmetrical position on the same layer. The other ends of the first fingers and the second fingers are spaced apart from the second common line. It may be formed symmetrically with one end of the first fingers and the second fingers.

Alternatively, a second common line is further formed to pass through the pixel area, parallel to the first common line, and at a symmetrical position on the same layer, and the other end of the first fingers and the second fingers is the second common line. A bar shape may be formed without being spaced apart from each other, and the other end of the first fingers or the other end of the second fingers may overlap with the second common line.

The other ends of the bar-shaped first fingers and the second fingers may be bent at an angle different from the direction in which the second fingers travel, and enter the second common line.

The first common line may be formed to be parallel to the data line, and the first electrode finger portion and the second electrode finger portion may be formed to be inclined at an acute angle to the gate line.

In addition, a method of manufacturing an in-plane switching mode liquid crystal display device according to a feature of the present invention for achieving the same object, by selectively removing the first metal on the substrate, the gate line and the first common line in one direction And forming a first electrode finger having a plurality of first fingers, each of which has a plurality of branches, and including a “L” shaped protruding pattern at one end of the first fingers; and selectively removing the second metal. Forming a data line to define a pixel area crossing the gate line, and forming a thin film transistor at an intersection of the gate line and the data line; and selectively removing a transparent conductive metal to remove the pixel area. Have second fingers alternately formed with the first fingers, respectively, wherein one end of the second fingers is an "L" magnetic stone of the adjacent first fingers; And forming a second electrode finger portion including a “|” character pattern overlapping the exit pattern, wherein the “L” character protrusion pattern and the “|” character pattern are formed with the first common line. It is characterized by being formed without being separated. Here, the "|" pattern of one end of the second electrode finger portion extends to the first common line side so as to overlap the adjacent "L" ruled pattern on the left side, and to overlap the "L" ruled pattern on the right side. , The "-" character pattern is extended to further form.

In addition, a method of manufacturing an in-plane switching mode liquid crystal display device according to another aspect of the present invention for achieving the same object, by selectively removing the first metal on the substrate, the gate line and the first in one direction Forming a common line by selectively removing the second metal to form a pixel region crossing the gate line, and forming a thin film transistor at an intersection of the gate line and the data line; And a first electrode ping selectively removing the transparent conductive metal, each having a plurality of first fingers branched to each pixel area, the first electrode ping including an L-shaped protruding pattern at one end of the first fingers. A second electrode finger having a rejection and second fingers alternately formed with the first fingers, respectively, wherein one end of the second fingers comprises an “L” shaped pattern; It is made to include a step, wherein the "L" shaped protrusion pattern and the "L" shaped pattern is another feature that is formed without being spaced apart from the first common line.

The liquid crystal display of the in-plane switching mode according to the present invention has the following effects.

 In the lower edge portion of the pixel area, the edge patterns of the "L" shape formed by extending with the fingers are formed to be alternately arranged, or the "L" and "|" character patterns are alternately overlapped with each other through their extension portions. In this case, the uniformity in the electric field direction can be improved to significantly reduce the inefficient driving region and the disclination region. Accordingly, the thin film transistor substrate of the in-plane switching mode according to the embodiment of the present invention can improve the transmittance and contrast ratio of the horizontal field application liquid crystal display.

Hereinafter, an LCD in an in-plane switching mode according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

First Embodiment

3 is a plan view illustrating a thin film transistor substrate of an in-plane switching mode liquid crystal display according to a first embodiment of the present invention. 4 is a cross-sectional view taken along lines II ′ and II-II ′ of the thin film transistor substrate illustrated in FIG. 3.

3 and 4, a plurality of thin film transistor substrates of an in-plane switching mode liquid crystal display according to a first embodiment of the present invention may be arranged on the thin film transistor substrate 41 to define pixel regions crossing each other. A thin film transistor (TFT) formed at each intersection of the gate line 32 and the data line 34, the plurality of gate lines 32 and the data line 34, and the same layer as the gate line 32. A common line 36 formed in the pixel region, a common electrode finger portion 39 branched into a plurality of pixels, a pixel electrode finger portion 38a formed alternately with the common electrode finger portion 39, and A first edge pattern 35 protruding with an "L" shape at one end of the common electrode finger parts 39 and a second edge protruding with an "L" shape at one end of the pixel electrode finger part 38a in the same shape. Pattern 38c: 37a, 37b. Here, the first edge pattern 35 of the common electrode finger portion 39 and the second edge pattern 38c of each of the finger portions 38a of the pixel electrode 38 are each spaced apart from the common line 36. Is formed.

In addition, in the common electrode finger portion 39, the first edge pattern 35 on one side thereof is integrally formed with the common line 36. The common line 36 may include a first common line and a second common line which are spaced apart from each of the gate lines 32 defining the pixel area, and are symmetrically formed up and down. Is done. Hereinafter, for convenience, the first and second common lines are collectively referred to as a common line 36.

In addition, the pixel electrode 38 is connected to the pixel electrode connector 38b parallel to the horizontal portion of the common line 36 and the pixel electrode connector 38b to be connected to the common electrode finger 39 to form the plurality of pixel electrodes. At one end of the finger portion 38a and the pixel electrode finger portion 38a, a second edge pattern 38c is included.

Here, the first edge pattern 35 and the second edge pattern 38c are formed to be spaced apart from each other by symmetrically corresponding to upper and lower common lines, and the common electrode finger portion 39 and the pixel electrode finger portion 38a. The same "L" pattern is also formed in correspondence with the other end of).

In addition, a storage capacitor Cst is formed between the common line 36 and the pixel electrode connection portion 38b overlapping the common line 36.

As such, the pixel electrode finger 38a and the common electrode finger 39 of the pixel electrode 38 formed are driven by forming a horizontal electric field therebetween when a voltage is applied to each of them.

Here, a plurality of gate lines 32 and a plurality of data lines 34 intersecting each other with the gate insulating layer 43 interposed therebetween on the substrate 41 define a gate insulating layer 43 therebetween. The thin film transistor TFT is connected to the gate line 32 and the data line 34, and the thin film transistor TFT and the pixel electrode 38 are connected to the thin film transistor TFT. .

 The gate line 32 and the data line 34 are connected to a pad terminal connected to the driving circuit unit outside the thin film transistor array to supply a gate signal and a data signal to the thin film transistor TFT. In addition, the common line 36 is separated from the gate line 32 to be formed on the same layer as the gate line 32 to supply the common electrode finger 39 with a reference voltage for driving the liquid crystal.

The thin film transistor TFT supplies the data signal of the data line 34 to the pixel electrode 38 in response to the gate signal of the gate line 32. To this end, the thin film transistor TFT includes a gate electrode 32G connected to the gate line 32, a source electrode 34S connected to the data line 34, a drain electrode 34D connected to the pixel electrode 38, and A semiconductor pattern 48 overlapping the gate electrode 32G with the gate insulating film 43 interposed therebetween and connected to the source electrode 34S and the drain electrode 34D is provided.

The semiconductor pattern 48 includes an active layer 46 and an ohmic contact layer 47 formed on the active layer 46. The active layer 46 is exposed between the source electrode 34S and the drain electrode 34D to form a semiconductor channel. The ohmic contact layer 47 makes ohmic contact between the active layer 46 and the source electrode 34S, and between the active layer 46 and the drain electrode 34D. The semiconductor pattern 48 overlaps the source / drain conductive pattern group including the source electrode 34S, the drain electrode 34D, and the data line 34 due to the manufacturing process.

The common line 36 is formed to be parallel to the gate line 32, and a first edge pattern 35 is formed between the common line 36 and the common electrode finger 39. The first edge pattern 35 is formed of a first edge portion 35a extending from the common electrode finger portion 39 and a horizontal portion of the common line 36, and an obtuse angle with the first edge portion 35a. It comprises a second edge portion 35b constituting. The angle between the first and second edge portions is shaped like an "L" at an angle of 100 to 115 degrees. This first edge pattern 35 together with the second edge pattern 38c improves the uniformity of the electric field direction.

The pixel electrode 38 is connected to the drain electrode 34D through the pixel contact hole 30 that exposes the drain electrode 34D through the passivation layer 45 covering the source / drain conductive pattern. Accordingly, the pixel electrode 38 receives a data signal via the drain electrode 34D.

Between the pixel electrode connection portion 38b and the pixel electrode finger portion 38a, the second edge pattern 38c is parallel to the pixel electrode connection portion and the first edge portion 37a extending from the pixel electrode finger portion 38a portion. And a second edge portion 37b formed obtuse with the first edge portion 37a. The first and second edge portions 37a and 37b form an "L" shape at an angle of 100 to 115 degrees.

Here, the common line 36 side meets the second edge portion 37b of the second edge pattern 38c and includes a reduction portion 36a having a reduced width, and thus the first edge pattern 35 adjacent to the left and right sides. The second edge portion 35b and the contraction portion 36a of step) have stepped steps in the plane.

The first edge pattern 35 and the second edge pattern 38c are alternately disposed, and the common electrode finger portion 39 and the pixel electrode finger portion 38a are alternately disposed. Accordingly, when a signal is applied to the pixel electrode 38 and the common line 36, a horizontal electric field is formed between the common electrode finger portion 39 and the pixel electrode finger portion 38a as shown in FIG. 5.

In addition, an electric field in a direction similar to an electric field formed between the common electrode finger portion 39 and the pixel electrode finger portion 38a is also formed between the first edge pattern 35 and the second edge pattern 38c. For reference, in FIG. 5, the double arrow ↔ indicates the electric field direction when the reference voltage is supplied to the common line 36 and an arbitrary data voltage is supplied to the pixel electrode 38.

The storage capacitor Cst is configured by the pixel electrode connection 38b and the common line 36 overlapping each other with the passivation layer 45 and the gate insulating layer 43 interposed therebetween. The storage capacitor Cst allows the data signal charged in the pixel electrode 38 to be stably maintained at the pixel electrode 38 via the thin film transistor TFT.

As described above, the thin film transistor substrate of the in-plane switching mode according to the first embodiment of the present invention may be formed by connecting the common electrode finger 39 and the pixel electrode finger 38a to each other in the form of an "L" shape. By forming the first edge pattern 35 and the second edge pattern 38c, an electric field is formed in a region similar to the other region in the region adjacent to the pixel electrode connecting portion 38b and the common line 36, that is, the lower edge portion of the pixel region. It can be done. Herein, the lower edge portion of the pixel area is the distance d from the end of each of the first edge portions 35a and 37a of the first and second edge patterns 35 and 38c and the one end of the second edge portions 35b and 37b. ) Is an area of 26 to 28 µm.

As a result, the uniformity of the electric field direction formed in the pixel region is improved, and the inefficient driving region and disclination region are significantly reduced.

Second Embodiment

6 is a plan view illustrating a thin film transistor substrate in an in-plane switching mode according to a second embodiment of the present invention. FIG. 7 is a cross-sectional view of the thin film transistor substrate illustrated in FIG. 6 along the lines III-III ', IV-IV', and V-V '.

6 and 7, the thin film transistor substrate according to the second exemplary embodiment of the present invention crosses each other with the gate insulating layer 73 interposed therebetween on the substrate 71 to define a plurality of gate lines 62. And a plurality of data lines 64, a thin film transistor TFT connected to the gate line 62 and the data line 64, a pixel electrode 68 connected to the thin film transistor TFT, and a pixel electrode 68; A common electrode 69 forming a horizontal electric field, a common line 66 connected to the common electrode 69, and a storage capacitor Cst configured by overlapping the pixel electrode 68 and the common line 66 are included.

Detailed descriptions of the gate line 62, the data line 64, the thin film transistor TFT, and the storage capacitor Cst according to the second embodiment of the present invention are the same as those of the first embodiment of the present invention. .

The common line 66 is formed separately from the gate line 62. In addition, the common line 66 may include the first horizontal portion 166 and the second horizontal portion 266 facing each other with a region where the common electrode finger portion 69a and the pixel electrode finger portions 68a to be formed interposed therebetween. The first and second horizontal parts 166 and 266 are connected to each other by the shield pattern 366 at the edge of the pixel area. Here, the common electrode fingers 69a and the pixel electrode fingers 68a are formed on the same layer as the transparent electrode component.

Here, the first edge pattern 165 is a traveling direction of the first edge portion 165a extending from the common electrode finger portion 69a and the first horizontal portion 166 of the common line 66. It comprises a second edge portion 165b protruding from the. At this time, the first edge portion 165a and the second edge portion 165b form an obtuse angle. The first and second edge portions 165a and 165b form an "L" shape at an angle of 100 to 115 degrees. The first edge pattern 165 improves the uniformity of the electric field direction together with the second edge pattern 68c of the pixel electrode 68 which will be described later.

The common electrode 69 includes a common electrode connecting portion 69b overlapping the second horizontal portion 266 and a plurality of common electrode finger portions 69a formed in parallel with each other by being connected to the common electrode connecting portion 69b.

At the edge of the pixel region, an “L” shaped protrusion pattern, as described with reference to FIG. 3, is formed between the first horizontal portion 166 and the shield pattern 366, and within the pixel region. One end of the common electrode finger portion 69a is formed in a “|” shape, and the first edge protrudes from the first horizontal portion 166 to overlap the common electrode finger portion 69a without being spaced apart. Pattern 165 is formed. The first edge pattern 165 is formed integrally with the first horizontal portion 166 and is formed of a light blocking metal.

The common electrode connector 69b is connected to the common line 66 through the common contact hole 70 passing through the passivation layer 75 and the gate insulating layer 73. Finger parts 69a connected to the outermost part of the common electrode connection part 69b among the common electrode finger parts 69a are overlapped on the shield pattern common line finger part 366 to secure an effective effective opening area.

In this case, the first edge pattern 165 and the common electrode finger portion 69a are formed without being spaced apart from each other, and the first edge pattern 165 receives a common voltage signal from the first horizontal portion 166. As a result, even in a portion where the first edge pattern 165 is formed, a uniform electric field effect may be provided between the pixel electrode finger portion 68a, thereby minimizing the disclination region.

The pixel electrode 68 is connected to the pixel electrode connecting portion 68b and the pixel electrode connecting portion 68b formed in parallel with the first horizontal portion 166, and the plurality of pixel electrode finger portions formed in parallel with the common electrode finger portions 69a. (68a). Second edge patterns 68c are formed between the pixel electrode connection portion 68b and the pixel electrode finger portion 68a. The second edge pattern 68c is formed in parallel with the first edge portion 67a extending from the pixel electrode finger portion 68a and the pixel electrode connection portion 68b and forms an obtuse angle with the first edge portion 67a. Two edge portions 67b. The first and second edge portions 67a and 67b form an "L" shape at an angle of 100 to 115 degrees. The pixel electrode 68 is connected to the drain electrode 64D through the pixel contact hole 60 through which the drain electrode 64D is exposed through the passivation layer 75 covering the source / drain conductive pattern. Accordingly, the pixel electrode 68 receives a data signal via the drain electrode 64D.

Here, the first horizontal portion 166 is integrally connected to the shield pattern 366, and at the connection portion, the first horizontal portion 166 has an “L” shaped protruding pattern, which is a horizontal portion of the second edge pattern 68c. At the portion where the second edge portion 67b meets, a reduction portion 166a having a reduced width is provided, and the horizontal portion and the reduction portion of the “L” protruding pattern or the first edge pattern 165 adjacent to the left and right sides ( 166a has a stepped step shape on the plane.

Here, the first edge pattern 165 and the second edge pattern 68c are alternately disposed, and the common electrode finger portion 69a and the pixel electrode finger portion 68a are alternately disposed. Accordingly, when a signal is applied to the pixel electrode 68 and the common line 66, a horizontal electric field is formed between the common electrode finger portion 69a and the pixel electrode finger portion 68a as shown in FIG. 8. In addition, an electric field in a direction similar to an electric field formed between the common electrode finger portion 69a and the pixel electrode finger portion 68a is formed between the first edge pattern 165 and the second edge pattern 68c. For reference, in FIG. 8, the double arrow ↔ indicates the electric field direction when the reference voltage is supplied to the common line 66 and an arbitrary data voltage is supplied to the pixel electrode 68.

In the second embodiment of the present invention, the transmittance of the pixel region may be further improved by forming the common electrode finger portion 69a and the pixel electrode finger portion 68a with a transparent conductive metal.

As described above, the thin film transistor substrate of the in-plane switching mode according to the second embodiment of the present invention has a first edge connected to the common electrode finger portion 69a and the pixel electrode finger portion 68a in the form of an “L” shape, respectively. By forming the pattern 165 and the second edge pattern 68c, the region adjacent to the pixel electrode connection 68b and the common line first horizontal portion 166, that is, the lower edge portion of the pixel region, may be in a similar direction to other regions. An electric field can be formed. As a result, the uniformity of the electric field direction formed in the pixel region is improved, and the inefficient driving region and the disclination region are significantly reduced. Here, the lower edge portion of the pixel area is the distance d from the end of each of the first edge portions 165a and 67a of the first and second edge patterns 165 and 68c and the one end of the second edge portions 165b and 67b. ) Is an area of 26 to 28 µm.

As a result, the transmittance of the lower edge portion of the liquid crystal display including the thin film transistors of the in-plane switching mode according to the first and second embodiments of the present invention increased by more than 50% compared to the conventional, the overall transmittance is shown in Table 1 As can be seen that it increased to varying degrees depending on the model of the liquid crystal display.

size product family Aspect ratio resolution Unit pixel size Effect of application H (horizontal) V (vertical) H (mm) V (mm) 47 inches Full HD 16: 9 1920 1080 0.18050 0.54150 ~ 5.0% 47 inches HD 16: 9 1366 768 0.76125 0.25375 ~ 10.6% 42 inches Full HD 16: 9 1920 1080 0.16150 0.48450 ~ 5.6% 42 inches HD 16: 9 1366 768 0.68100 0.22700 ~ 11.9% 37 inches Full HD 16: 9 1920 1080 0.14225 0.42675 ~ 6.3% 37 inches HD 16: 9 1366 768 0.6 0.2 ~ 13.5%

Hereinafter, a method of manufacturing a thin film transistor substrate according to a first embodiment of the present invention will be described with reference to FIGS. 9A to 12B.

9A and 9B, a gate line 32, a gate electrode 32G, a common line 36, a common electrode finger 39, and a first edge pattern are formed on a substrate 41 by a first mask process. A first conductive pattern including 35 is formed. At this time, the common line 36 has a first edge pattern 35 protruding from the letter “L” between the common electrode finger portion 39, and is disposed between the adjacent first edge patterns 35. Therefore, it has a contraction portion 36a having a width larger than that of the horizontal portion of the first edge pattern 35.

The first conductive pattern is formed by forming a gate metal layer on the substrate 41 and then patterning the gate metal layer by a first mask process including a photolithography process and an etching process. The gate metal layer may be formed of a single layer or a plurality of metals such as molybdenum (Mo), aluminum (Al), aluminum-neodymium (Al-Nd), copper (Cu), chromium (Cr), titanium (Ti), and alloys thereof. It is formed into a layer structure.

10A and 10B, a gate insulating layer 43 is formed on the substrate 41 to cover the first conductive pattern. Thereafter, a second conductive pattern including the semiconductor pattern 48, the data line 34, the source electrode 34S and the drain electrode 34D is formed on the gate insulating film 43 by a second mask process.

As the gate insulating layer 43, an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) is used.

The semiconductor pattern 48 and the second conductive pattern may be formed by stacking a semiconductor layer and a source / drain metal layer on the gate insulating layer 43, and then performing the semiconductor layer and the source / drain by a second mask process including a photolithography process and an etching process. It is formed by patterning the drain metal layer.

As the semiconductor layer, amorphous silicon and amorphous silicon doped with impurities (n + or p +) are stacked and used. Source / drain metal layers include molybdenum (Mo), aluminum (Al), aluminum-neodymium (Al-Nd), copper (Cu), chromium (Cr), titanium (Ti), molybdenum alloys (MoTi), and molybdenum Metals such as alloys (MoNb) and titanium niobium alloys (TiNb) and alloys thereof are formed in a single layer or in a multiple layer structure.

The second mask process may form the semiconductor pattern 48 and the second conductive pattern in one mask process by using a halftone mask or a diffraction exposure mask. As a result, the semiconductor pattern 48 overlaps the lower portion of the second conductive pattern.

11A and 11B, a passivation layer 45 is formed on the gate insulating layer 43 to cover the semiconductor pattern 48 and the second conductive pattern. Subsequently, the pixel contact hole 30 is formed by the third mask process.

As the passivation layer 45, an inorganic insulating material such as a silicon oxide film (SiOx), a silicon nitride film (SiNx), or the like is deposited by a deposition method such as PECVD, or an acryl-based organic compound having a low dielectric constant, benzo cyclobutene (BCB) ), An organic insulating material such as PFBC (Perfluorocyclobutane), Teflon, Cytop, is formed by coating with a spin or spinless coating method.

The pixel contact hole 30 is formed by patterning the passivation layer 45 through a third mask process including a photolithography process and an etching process.

12A and 12B, the third conductive pattern including the pixel electrode finger portion 38a, the pixel electrode connection portion 38b, and the second edge pattern 38c may be formed on the passivation layer 45 by a fourth mask process. Is formed.

The third conductive pattern is formed by forming a transparent conductive metal layer on the protective film 45 and then patterning the transparent conductive metal layer by a fourth mask process including a photolithography process and an etching process.

As the transparent metal layer, indium tin oxide (ITO), tin oxide (TO; tin oxide), indium zinc oxide (IZO; indium zinc oxide), and indium tin zinc oxide (ITZO; indium tin zinc oxide) are used. do.

Hereinafter, a method of manufacturing a thin film transistor substrate according to a second exemplary embodiment of the present invention will be described with reference to FIGS. 19A to 20C.

19A to 19C are process plan views showing the manufacturing method according to the second embodiment of the present invention, and FIGS. 20A to 20C are process cross-sectional views showing the manufacturing method according to the second embodiment of the present invention.

19A to 20A, the first conductive pattern according to the second exemplary embodiment of the present invention selectively removes the first metal on the substrate 71 so that the gate line 62, the gate electrode 62G, The common line 66 and the first and second horizontal portions 166 and 266 formed of the first horizontal portion 166 and the second horizontal portion 266 formed in the horizontal direction on the lower side and the upper side of the pixel area, respectively, may be disposed. The shield pattern 366 and the first edge pattern 165 protruding from the first horizontal portion 166 toward the pixel region at the center of the pixel region are formed. The first conductive pattern is formed by forming a gate metal layer on the substrate 71 and then patterning the gate metal layer by a first mask process including a photolithography process and an etching process. The gate metal layer may be formed of a single layer or a plurality of metals such as molybdenum (Mo), aluminum (Al), aluminum-neodymium (Al-Nd), copper (Cu), chromium (Cr), titanium (Ti), and alloys thereof. It is formed into a layer structure.

19B and 20B, a gate insulating film 73 of a silicon nitride film or a silicon oxide film component is formed on the substrate 71 so as to cover the first conductive pattern. Subsequently, the semiconductor pattern 78 and the second conductive pattern may be formed by stacking a semiconductor layer and a source / drain metal layer 64 on the gate insulating layer 73, and then including a photolithography process and an etching process. It is formed by patterning a semiconductor layer and a source / drain metal layer by a mask process. Here, the second conductive pattern includes a data line 64, a source electrode 64S, and a drain electrode 64D.

As the semiconductor layer, amorphous silicon and amorphous silicon doped with impurities (n + or p +) are stacked and used. Source / drain metal layers include molybdenum (Mo), aluminum (Al), aluminum-neodymium (Al-Nd), copper (Cu), chromium (Cr), titanium (Ti), molybdenum alloys (MoTi), and molybdenum Metals such as alloys (MoNb) and titanium niobium alloys (TiNb) and alloys thereof are formed in a single layer or in a multiple layer structure.

The second mask process may form the semiconductor pattern 78 and the second conductive pattern in one mask process by using a halftone mask or a diffraction exposure mask. As a result, the semiconductor pattern 78 overlaps the lower portion of the second conductive pattern.

Subsequently, a protective film 75 is formed by depositing an inorganic insulating film of a silicon oxide film (SiOx) or a silicon nitride film (SiNx) by a plasma enhanced chemical vapor deposition (PECVD) method. Alternatively, an organic insulating material such as an acryl-based organic compound having a low dielectric constant, a benzo cyclobutene (BCB), a perfluorocyclobutane (PFBC), a teflon, and a cytop may be used as the passivation layer 75. It may be further formed by coating by a coating method such as lease.

 As shown in FIGS. 19C and 20C, the pixel contact hole 60 and the common contact hole 70 according to the second exemplary embodiment of the present invention may include a passivation layer 75 using a third mask including a photolithography process and an etching process. And at least one of the gate insulating film 73 is etched.

The third conductive pattern according to the second embodiment of the present invention includes the pixel electrode 68 and the common electrode 69. Here, the third conductive pattern is made of a transparent metal such as ITO or IZO. The pixel electrode 68 includes a pixel electrode connecting portion 68b formed on the first horizontal portion 166, a pixel electrode finger portion 68a parallel to an adjacent data line 64 in the pixel region, and A second edge pattern 68c is formed between the pixel electrode finger portion 68a and the pixel electrode connection portion 68b in an “L” protruding pattern. The second edge pattern 68c may be parallel to the first edge pattern 165 and may be integrally formed with the pixel electrode finger portion 68a and the pixel electrode connection portion 68b. The common electrode 69 includes a common electrode finger 69 parallel to the pixel electrode finger 68a and a common electrode connection 69b formed on the second horizontal portion 266. . One of the common electrode fingers 69 overlaps the first edge pattern 165 without being spaced apart from each other, and has one end having a “|” shape.

 The common electrode finger portion 69a and the first edge portion 165a of the first edge pattern 165 overlap each other with the gate insulating layer 73 and the passivation layer 75 interposed therebetween.

Third Embodiment

FIG. 13 is a plan view illustrating a thin film transistor substrate in an in-plane switching mode according to a third exemplary embodiment of the present invention, and FIG. 14 is an enlarged view illustrating a lower edge portion of the pixel area of FIG. 13. The cross-sectional view of the thin film transistor substrate according to the third embodiment of the present invention is the same as that of the second embodiment. Therefore, description of overlapping components will be omitted in comparison with the second embodiment.

13 and 14, a first edge pattern 186 is formed between the first horizontal portion 166 of the common line 66 and the common electrode finger portion 69a. The first edge pattern 186 is connected to the first edge portion 186a extending from the common electrode finger portion 69a and the first horizontal portion 166 of the common line 66 and is connected to the first edge portion 186a. And a second edge portion 186b inclined to form an obtuse angle of 120 to 130 degrees.

A second edge pattern 96 is formed between the pixel electrode connection portion 68b and the pixel electrode finger portion 68a. The second edge pattern 96 is connected to the first edge portion 96a extending from the pixel electrode finger portion 68a and the pixel electrode connection portion 68b, and has an obtuse angle of 120 to 130 degrees with the first edge portion 96a. It comprises a second edge portion 96b inclined to form.

That is, the second edge portion 96b is bent at an angle different from the first horizontal portion 166, and an obtuse angle between the first edge portion 96a and the second edge portion 96b is obtained. It is formed to be larger than the angle between the first edge portion 96a and the first horizontal portion 166.

As such, by forming the angles of the first edge portions 186a and 96a and the second edge portions 186b and 96b of the first and second edge patterns 186 and 96 to be larger than those of the first and second embodiments. The electric field in a direction similar to the horizontal electric field formed between the common electrode finger portion 69a and the pixel electrode finger portion 68a is also formed between the first and second edge patterns 186 and 96. That is, the transmittance in the lower edge portion of the pixel region in the first and second embodiments increases by 9 to 11%, thereby reducing the inefficient driving region and disclination region in the lower edge portion.

Fourth Embodiment

FIG. 15 is a plan view illustrating a thin film transistor substrate in an in-plane switching mode according to a fourth exemplary embodiment of the present invention, and FIG. 16 is an enlarged view illustrating a lower edge portion of the pixel area of FIG. 15. The cross-sectional view of the thin film transistor substrate according to the fourth embodiment of the present invention is the same as that of the second embodiment. Therefore, description of overlapping components will be omitted in comparison with the second embodiment.

15 and 16, a first edge pattern 176 is formed between the first horizontal portion 166 and the common electrode finger portion 69a of the common line 66. The first edge pattern 176 has a first edge portion 176a extending from the common electrode finger portion 69a and a second edge portion formed to be inclined to form an obtuse angle of 135 to 160 degrees with the first edge portion 176a ( 176b and a third edge portion 176c connected to the second edge portion and formed in parallel with the first horizontal portion 166 of the common line 66.

A second edge pattern 85 is formed between the pixel electrode connection portion 68b and the pixel electrode finger portion 68a. The second edge pattern 85 may be inclined to form an obtuse angle of 135 to 160 degrees with the first edge portion 85a extending from the pixel electrode finger portion 68a and the first edge portion 85a ( 85b and a third edge portion 85c connected to the second edge portion 85b to be parallel to the pixel electrode connection portion 68b.

As such, the angles of the first edge portions 176a and 85a and the second edge portions 176b and 85b of the first and second edge patterns 176 and 85 are formed at an angle greater than those in the first to third embodiments. The electric field in a direction similar to the horizontal electric field formed between the common electrode finger portion 69a and the pixel electrode finger portion 68a is also formed between the first and second edge patterns 176 and 85. That is, the transmittance at the lower edge of the pixel region in the first and second embodiments is increased by 11 to 13%, thereby significantly reducing the inefficient driving region and disclination region at the lower edge.

Modifications of Embodiments 1-4

As described above, one end of the common electrode finger and the pixel electrode finger may include an “L” shaped protruding pattern at at least one end, and the other end may be formed symmetrically with one end, or As shown in the second to fourth embodiments (refer to FIGS. 6, 13, and 15), the other end of the common electrode finger portion and the pixel electrode finger portions may have a second horizontal portion 266 of the common line. It may be formed in a bar shape without being spaced apart from.

Referring to FIG. 6, the common electrode finger portion 69a and the pixel electrode finger portion 68a are formed in parallel with each other, and the other ends of the respective finger portions 69a and 68a are the finger portions 69a and 68a. It can be seen that it has a bar shape extending in the advancing direction of and is formed without being spaced apart from the second horizontal portion 266, respectively.

The other end of the pixel electrode finger portion 68a is formed in a bar shape without being spaced apart from the second horizontal portion 266, and the common electrode finger portion 69a is formed in the second horizontal portion 266. It is connected to the common electrode connecting portion 69b on the () is formed integrally. In this case, the other end of the pixel electrode finger portion 68a is formed at a level not spaced apart from the second horizontal portion 266. In some cases, the edge of the second horizontal portion 266 is not overlapped. It can also be formed in contact with.

As such, the reason for forming the pixel electrode finger portion 68a and the second horizontal portion 266 functioning as a common line without being spaced apart from each other is that the pixel voltage and the common voltage are not spatially separated. To minimize disclaimation.

Here, the common electrode finger portion 69a is integrally formed with the common electrode connecting portion 69b made of the transparent metal of the same layer, and the common electrode connecting portion 69b overlaps the second horizontal portion 266, A gap between the pixel electrode finger part 68a and the pixel electrode finger part 68a may be formed inside the boundary line of the second horizontal part 266. In this case, the common electrode finger portion 69a is formed integrally with the common electrode connection portion 69b on the second horizontal portion 266, and has a shape overlapping the second horizontal portion 266 in a plane. Has

On the other hand, the above-described modification is described based on the drawings described in the second to fourth embodiments, but in the first embodiment, the shape of the pixel electrode finger portion and the common electrode finger portion corresponding to the upper common line of the pixel region is changed. Can be applied to achieve the same effect.

Fifth Embodiment

17 is a plan view illustrating a thin film transistor substrate in an in-plane switching mode according to a fifth embodiment of the present invention, and FIG. 18 is an enlarged view illustrating an upper edge portion of the pixel area of FIG. 17. The cross-sectional view of the thin film transistor substrate according to the fifth embodiment of the present invention is the same as that of the second embodiment. Therefore, description of overlapping components will be omitted in comparison with the second embodiment.

17 and 18, a third edge pattern 89 is formed between the common electrode connecting portion 69b and the common electrode finger portion 69a at the upper edge portion of the pixel region. The third edge pattern 89 is formed to be inclined in a direction different from the traveling direction of the common electrode finger 69b. At this time, the direction of the third edge pattern 89 is formed to be inclined at an angle of 23 to 26 degrees with respect to the traveling direction of the common electrode finger 69b.

In addition, a fourth edge pattern 99 is formed to extend from the pixel electrode finger portion 68a to overlap the second horizontal portion 266 of the common line 66. Here, the length of the fourth edge pattern 99 excluding the overlapping portion with the second horizontal portion 266 of the common line 66 is 8 to 10 µm, and is 20 to 30 degrees based on the pixel electrode finger portion 68a. More preferably, it is inclined at an angle of 23 to 26 degrees.

The third and fourth edge patterns 89 and 99 are alternately arranged side by side, and are formed between the common electrode finger portion 69a and the pixel electrode finger portion (between the third and fourth edge patterns 89 and 99). An electric field in a direction similar to the electric field formed between 68a) is formed.

As such, the common electrode pings the third edge pattern 89 formed to extend with the common electrode finger portion 69a at the upper edge of the pixel region, and the fourth edge pattern 99 formed to extend with the pixel electrode finger portion 68a. By forming inclined at an angle of 23 to 26 degrees with respect to the rejection 69a and the pixel electrode finger portion 68a, the transmittance at the upper edge portion of the conventional pixel region has an increase rate of 48 to 50%.

Here, the first and second edge patterns 165 and 68c may also be formed in the structure of any one of the first and second edge patterns in the first to fourth embodiments. In this case, when the third and fourth edge patterns and the structures of the first and second edge patterns in the fourth embodiment are provided, the first and second edge patterns in the first and second embodiments are provided. Compared with this, the transmittance is increased by 12.6%.

As described above, the thin film transistor substrate of the in-plane switching mode according to the exemplary embodiment of the present invention is formed so that the edge patterns of the “L” shape formed by extending with the fingers at the lower edge portion of the pixel region are alternately arranged, and the pixels are alternately arranged. By forming the edge patterns extending from the upper edge portion of the region to be inclined so as to be inclined alternately, the uniformity in the electric field direction may be improved to significantly reduce the inefficient driving region and the disclination region. Accordingly, the thin film transistor substrate of the in-plane switching mode according to the embodiment of the present invention can improve the transmittance and contrast ratio of the horizontal field application liquid crystal display.

The fifth embodiment described above is inclined at the other end of the common electrode finger portion and the pixel electrode finger portion in the modified examples of the first to fourth embodiments described above, and is parallel to the structure described in the first to fourth embodiments. Can be applied. In other words, the same effect can be achieved by applying the structure described in the fifth embodiment above the pixel region and applying the first to fourth embodiments or modified examples thereof below.

It looks at the common features of each embodiment of the present invention described above.

The thin film transistor substrate of the liquid crystal display device of the in-plane switching mode of the present invention includes a gate line and a data line crossing each other to define a pixel region, a thin film transistor formed at an intersection of the gate line and the data line, and the gate line. A first electrode finger having a first common line formed of the same layer and a plurality of first fingers branched into the pixel area, each of the first fingers having an L-shaped protrusion pattern at one end of the first fingers; The pixel area includes second fingers alternately formed with the first fingers, respectively, and one end of the second fingers includes a second electrode finger part formed in a “|” pattern. The ruler pattern and the "|" ruler pattern are formed substantially without being spaced apart from the first common line. Here, the first electrode finger portion and the second electrode finger portion may be defined as the common electrode and the pixel electrode, or vice versa.

In this case, in order to form the “L” shaped protrusion pattern and the straight pattern without being spaced apart from the first common line, the “L” shaped protrusion pattern or the “|” shaped pattern is further extended to the first common line side. You may.

When the "|" character pattern has a bar shape, the first common line may be extended toward the pixel region, and may be further extended without being spaced apart from or overlapping with the "L" protruding pattern or the "|" character pattern. .

In addition, the second electrode finger portion has the same shape as the first electrode finger portion, and the bar pattern at one end of the second electrode finger portion extends toward the first common line side so as to overlap the adjacent “L” protruding pattern on the left side. And a "-" character pattern is further extended to overlap with the "L" character protrusion pattern on the right side. In this case, the shape of one end of each of the first electrode finger portion and the second finger portion has an “L” shaped protruding pattern.

In particular, when the first electrode finger portion is formed integrally with the first common line and is formed in the same layer, one end of the second electrode finger portion may include an “L” shaped protruding pattern.

The first common line corresponds to the “−” shaped pattern forming portion of the second electrode finger portion and includes a reduced portion having a reduced width, so that the “L” shaped protruding pattern of the first finger portion adjacent to the left and right is horizontal. The portion and the reduction portion have stepped steps in the plane.

On the other hand, as shown in the plan view, the first electrode finger portion and the second electrode finger portion may be formed in a shape that is rotated by about 90 ° from the direction parallel to the data line. In this case, the first common line is formed in parallel with the data line, and the first electrode finger portion and the second electrode finger portion rotated by 90 degrees have a shape so as to be inclined to the gate line. The non-driven area at the edge can be minimized.

In addition, a second common line may be further formed on the thin film transistor substrate of the liquid crystal display of the in-plane switching mode, passing through the pixel region, parallel to the first common line, and at a symmetrical position of the same layer.

In this case, as in the first embodiment, the other ends of the first fingers and the second fingers are symmetrically with one end of the first fingers and the second fingers, without being spaced apart from the second common line, respectively. It may be formed by including a "L" protruding pattern, or if the other side has a bar shape, the first fingers or second fingers may be formed without being spaced apart from the second common line.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be apparent to those who have knowledge.

1 is a schematic view of an in-plane switching mode liquid crystal display;

2A and 2B illustrate an electric field formed at a lower edge portion of a pixel region of a conventional in-plane switching mode liquid crystal display device.

3 is a plan view illustrating a thin film transistor substrate of an in-plane switching mode liquid crystal display according to a first exemplary embodiment of the present invention.

4 is a cross-sectional view taken along lines II ′ and II-II ′ of the thin film transistor substrate illustrated in FIG. 3.

FIG. 5 is a view for explaining an electric field formed at a lower edge portion of a pixel region of a thin film transistor substrate in an in-plane switching mode according to a first embodiment of the present invention; FIG.

6 is a plan view illustrating a thin film transistor substrate in an in-plane switching mode according to a second embodiment of the present invention.

FIG. 7 is a cross-sectional view of the thin film transistor substrate of FIG. 6 taken along lines III-III ', IV-IV', and V-V '. FIG.

FIG. 8 is a view for explaining an electric field formed at a lower edge portion of a pixel region of a thin film transistor substrate in an in-plane switching mode according to a second embodiment of the present disclosure; FIG.

9A to 12B are views for explaining a method of manufacturing a thin film transistor substrate according to the first embodiment of the present invention.

13 is a plan view illustrating a thin film transistor substrate in an in-plane switching mode according to a third embodiment of the present invention.

14 is an enlarged view illustrating a lower edge portion of the pixel area of FIG. 13.

15 is a plan view illustrating a thin film transistor substrate in an in-plane switching mode according to a fourth embodiment of the present invention.

16 is an enlarged view illustrating a lower edge portion of the pixel area of FIG. 15.

17 is a plan view illustrating a thin film transistor substrate in an in-plane switching mode according to a fifth embodiment of the present invention.

FIG. 18 is an enlarged view of an upper edge portion of the pixel area of FIG. 17; FIG.

19A to 19C are process plan views showing the manufacturing method according to the second embodiment of the present invention.

20A to 20C are cross-sectional views showing a manufacturing method according to a second embodiment of the present invention.

Claims (19)

A gate line and a data line on the substrate, the gate line and the data line crossing each other to define a pixel region; A thin film transistor formed at an intersection of the gate line and the data line; A first common line formed of the same layer as the gate line; A first electrode finger portion having a plurality of first fingers branched in the pixel area, the first electrode finger portion including an “L” shaped protruding pattern at one end of the first fingers; And In the pixel area, second fingers are formed alternately with the first fingers, respectively, and one end of the second fingers includes a second electrode finger part formed in a “|” pattern. And the “L” protruding pattern and the “|” character pattern are formed without being spaced apart from the first common line. The method of claim 1, The L-shaped protrusion pattern includes a first edge portion extending from the first finger portion and a second edge portion inclined to form an obtuse angle with the first edge portion. Display device. The method of claim 1, The first electrode finger portion is made of the same layer of metal as the gate line, And the second electrode finger portion is formed of a transparent metal layer. The method of claim 3, wherein And the first electrode finger unit is integrally formed with the first common line, and the “L” protruding pattern has a shape protruding from the first common line. The method of claim 4, wherein One end of the second electrode finger portion, The "|" character pattern is formed extending to the said 1st common line side so that it may overlap with the adjacent "L" character protrusion pattern of the left side, At the end of the "|" character pattern, the "-" character pattern is further extended so as to overlap with the "L" character protrusion pattern on the right side, The "|" pattern and the "-" pattern form an "L" shape, wherein the liquid crystal display of the in-plane switching mode The method of claim 5, Wherein the first common line meets the "-" pattern of the second finger portion, the width of the reduced portion is reduced, the "L" shaped projection pattern and the reduced portion is characterized in that the step-shaped step in the plane Liquid crystal display in in-plane switching mode. The method of claim 1, And the first electrode finger portion and the second electrode finger portion are made of a transparent metal layer of the same layer. The method of claim 7, wherein The first common line protrudes from the horizontal portion of the first common line in a shape overlapping with the “|” ruled pattern so that the first common line is not spaced apart from the “|” ruled pattern at one end of the second finger portion. An in-plane switching mode liquid crystal display further comprising a pattern. The method of claim 8, The shape formed by the horizontal portion of the first protruding pattern and the first common line is the same shape as the “L” shaped pattern at one end of the first finger part. And the first protruding pattern is partially overlapped with a "|" pattern of one end of the second electrode finger portion. The method of claim 8, And the first common line is electrically connected to the second electrode finger. The method of claim 2, The second edge portion is bent at an angle different from the horizontal portion of the first common line, The obtuse angle between the first edge portion and the second edge portion is larger than the angle between the first edge portion and the horizontal portion of the first common line. The method of claim 2, The L-shaped protrusion pattern further includes a third edge portion connected to the second edge portion and formed in parallel with the gate line. The method of claim 1, A second common line is further formed at the symmetrical position on the same layer and parallel to the first common line passing through the pixel area; The other ends of the first fingers and the second fingers are formed symmetrically with one end of the first fingers and the second fingers, without being spaced apart from the second common line. Device. The method of claim 1, A second common line is further formed at the symmetrical position on the same layer and parallel to the first common line passing through the pixel area; The other ends of the first fingers and the second fingers are formed in a bar shape without being spaced apart from the second common line. The other end of the first fingers or the other end of the second fingers, overlap with the second common line, the liquid crystal display of the in-plane switching mode. The method of claim 14, The other ends of the bar-shaped first fingers and the second fingers are bent at an angle different from the advancing direction of the second fingers to enter the second common line. The method of claim 1, The first common line is formed parallel to the data line, And the first electrode finger portion and the second electrode finger portion are formed to be inclined at an acute angle to the gate line. Selectively removing the first metal to form a gate line and a first common line in one direction, each having a plurality of branched first fingers, and " L " end projections at one end of the first fingers; Forming a first electrode finger portion comprising a pattern; Selectively removing a second metal to form a data line to cross the gate line to define a pixel region, and to form a thin film transistor at an intersection of the gate line and the data line; Selectively removing the transparent conductive metal so that each pixel region has second fingers formed alternately with the first fingers, and one end of the second fingers is an "L" character of the adjacent first fingers; And forming a second electrode finger portion including a "|" character pattern overlapping the protruding pattern, The L-shaped protruding pattern and the “|” shaped pattern are formed without being spaced apart from the first common line, wherein the liquid crystal display device of the in-plane switching mode is used. The method of claim 17, The "|" pattern of one end of the second electrode finger portion extends to the first common line side to overlap with the adjacent "L" shaped protrusion pattern on the left side, and is overlapped with the "L" shaped protrusion pattern on the right side, -"Is a manufacturing method of the liquid crystal display device of the in-plane switching mode characterized in that the elongated pattern is further formed. Selectively removing the first metal on the substrate to form a gate line and a first common line in one direction, Selectively removing a second metal to form a data line to cross the gate line to define a pixel region, and to form a thin film transistor at an intersection of the gate line and the data line; Selectively removing the transparent conductive metal, each of the pixel regions having a plurality of first fingers, each of which has a plurality of first fingers, and a first electrode finger portion including an L-shaped protruding pattern at one end of the first fingers; And having second fingers alternately formed with the first fingers, respectively, wherein one end of the second fingers comprises forming a second electrode finger portion including an “L” shaped pattern, The L-shaped protrusion pattern and the “L” shaped pattern may be formed without being spaced apart from the first common line.

Images