KR20090008650A - Method for forming a thin film structure and method for forming a gate structure using the same - Google Patents

Abstract

A method for forming a thin film structure and a method for forming a gate electrode using the same are provided to reduce a process failure of a patterning process by preventing the particle from remaining on the surface of the thin film structure due to an organic material. A first thin film(102) is formed on a substrate(100). A part of the first thin film is doped with the impurity. A thermal process using the oxygen gas is performed in the first thin film doped with the impurity. The organic material remaining the first thin film is removed. An oxide film(106) is formed on the first thin film. A second thin film on the oxide film is made of the nitride.

Description

Method for forming a thin film structure and method for forming a gate structure using the same}

The present invention relates to a method of forming a thin film structure and a method of forming a gate electrode using the same. More specifically, the present invention relates to a method of forming a thin film structure in which a polysilicon film doped with an impurity and a silicon nitride film are stacked, and a method of forming a gate electrode of a transistor using the method.

The manufacturing process of a semiconductor device includes a process of depositing a thin film on a substrate, selectively performing an ion implantation process on the substrate or the thin film, and patterning the thin film. When performing the process of patterning the thin film or the process of ion implantation, an etching mask or an ion implantation mask is required, and such a mask is typically formed through a photo process.

The photolithography process is performed by applying a photoresist on a semiconductor substrate or other object, exposing the applied photoresist in a predetermined pattern, and then supplying a developer onto the exposed photoresist to perform development. It is done through. The photoresist pattern formed through the photo process should be cleanly removed from the substrate or the object after the etching process or the ion implantation process is performed. In general, the photoresist pattern used as a mask is removed through an ashing process and / or a strip process. However, even when the ashing process and / or the strip process are performed, the organic material, which is a main component of the photoresist pattern, may remain on the substrate.

On the other hand, after the ion implantation process of doping the impurities having a high concentration is performed, the photoresist pattern used as the ion implantation mask may be cured. Therefore, even when the ashing and stripping process is performed, the photoresist pattern used as the ion implantation mask is not completely removed and a large amount of organic material remains.

On the other hand, even after performing only the ion implantation process, the organic material may remain in the film or substrate. That is, even if only the step of doping the impurity having a high concentration on the entire surface of the film or substrate without forming the photoresist pattern, the organic material may remain in the film or substrate.

The organic residue causes the semiconductor device to fail during the subsequent process.

For example, when the upper thin film is formed on a thin film or a substrate in which the organic residue remains, a number of particles are generated on the surface of the deposited upper thin film by bonding with the organic residue. Particles formed on the surface of the upper thin film will have a different etching characteristics than the upper thin film. Therefore, when the upper thin film is patterned by photolithography, particles of the upper thin film surface may have a relatively low etching rate or no etching at all compared to the upper thin film. Therefore, a problem occurs such that the thin film is shorted or the thin film is not patterned at the site where the particles are generated.

It is an object of the present invention to provide a method for forming a thin film structure that can reduce particle generation.

Another object of the present invention is to provide a method of forming a gate electrode including polysilicon doped with impurities.

In the method for forming a thin film structure according to an embodiment of the present invention for achieving the above object, to form a first thin film on a substrate. Dopants are doped in a portion of the first thin film. A heat treatment using oxygen gas is performed on the first thin film doped with impurities to form an oxide film on the surface of the first thin film while removing organic substances remaining in the first thin film. Next, a second thin film made of nitride is formed on the oxide film.

Doping the impurity is performed through an ion implant process to which a plasma is applied.

In the gate electrode forming method according to an embodiment of the present invention for achieving the above object, a polysilicon film is formed on a substrate. A first photoresist pattern is formed on the first region of the polysilicon film. A first impurity of a first conductivity type is doped into the first region of the polysilicon film through a first ion implantation process using the first photoresist pattern as a mask. The first photoresist pattern is removed from the polysilicon film. A heat treatment using oxygen gas is performed on the polysilicon film to form an oxide film on the surface of the polysilicon film while removing organic substances remaining in the first thin film. A silicon nitride film is formed on the oxide film. The silicon nitride film is patterned to form a hard mask pattern. A gate electrode is formed by etching the oxide film and the polysilicon film using the hard mask pattern as an etching mask.

On the surface of the thin film structure formed by the above process, particles generated by the remaining organic matter are hardly generated.

In addition, particles are hardly generated on the silicon nitride film in the process of forming the gate electrode. Therefore, a hard mask pattern having a normal shape is formed from the silicon nitride film, and thus a gate electrode which does not generate short or bridge failure may be formed.

As such, when using the method of the present invention, process defects in the thin film formation and patterning process of the thin film are reduced. Therefore, the effect which the yield of a semiconductor element becomes high can be anticipated.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Although the embodiments of the present invention are described in detail with reference to the accompanying drawings, the present invention is not limited to the following embodiments, and those skilled in the art will understand the technical spirit of the present invention. The present invention may be embodied in various other forms without departing from the scope thereof. In the accompanying drawings, the dimensions of the substrate, layer (film), pattern or electrodes are shown to be larger than actual for clarity of the invention. In the present invention, each layer (film), pattern or electrodes is referred to as being formed "on", "top" or "bottom" of the substrate, each layer (film), pattern or electrodes. (Film), pattern or electrodes directly formed on or below the substrate, each layer (film), pattern or electrodes, or other layers (film), other patterns, other pads or other electrodes on the substrate It may additionally be formed. Also, when layers (films) are referred to as "first" and / or "second", they are not intended to limit these members but merely to distinguish each layer (films). Thus, "first" and / or "second" may be used selectively or interchangeably for each layer (film).

1 to 4 are cross-sectional views illustrating a method of forming a thin film structure according to an embodiment of the present invention.

Referring to FIG. 1, a first thin film 102 to be implanted with impurities is formed on a substrate 100. The first thin film 102 may be made of polysilicon or amorphous silicon that is not doped with impurities.

Thereafter, a photoresist pattern is formed on the first thin film 102. Specifically, the photoresist pattern 104 is formed by applying a photoresist film to the first thin film 102 and then performing an exposure process, a developing process, a baking process, and the like. The photoresist pattern 104 selectively exposes a portion for implanting impurities.

In the present exemplary embodiment, a photoresist pattern is formed on the first thin film 102 using an ion implantation mask. However, when the entire first thin film 102 is doped, the process of forming the photoresist pattern 104 may be omitted.

Next, impurities are implanted into the first thin film 102 using the photoresist pattern 104 as a mask. The implanting of the impurity includes an ion implant (PLAD) process in which plasma is applied. When the plasma ion implantation process is performed, a high concentration of impurities may be doped into the first thin film 102.

In this case, the impurities are implanted into the photoresist pattern 104 as well as the first thin film 102 exposed by the photoresist pattern 104. However, the photoresist pattern 104 is damaged by impurities or radicals having high energy. That is, the photoresist pattern 104 is cured by impurity particles or radicals injected during the ion implant process, while hydrophilicity or water solubility is reduced.

Referring to FIG. 2, the photoresist pattern 104 is removed through an ashing and stripping process.

Oxygen or ozone may be used as a reaction gas for performing the ashing process. Alternatively, carbon tetrafluoride (CF4) gas or sulfur hexafluoride (SF6) gas may be added to the oxygen gas as a reaction gas for performing the ashing process.

In addition, the stripping process may be performed using sulfuric acid solution.

However, as in the present embodiment, when the plasma ion implant process in which the high energy is applied in the previous process is performed, the surface of the photoresist pattern 104 used as the mask is cured. Therefore, through the ashing and stripping process, it is not easy to completely remove the cured photoresist pattern 104. As a result, organic residues containing carbon remain in the first thin film 102.

In contrast, when the impurity ion implant process is performed without using the photoresist pattern 104, the process of removing the photoresist pattern 104 is not necessary. However, even when the photoresist pattern 104 is not used, some residues including carbon remain in the first thin film 102 after the plasma ion implantation process is performed.

Referring to FIG. 3, an oxide film 106 is formed on a surface of the first thin film by performing a heat treatment using oxygen gas on the first thin film 102 doped with impurities. As described above, when the heat treatment is performed, impurities doped in the first thin film 102 are activated.

Oxygen introduced during the heat treatment is combined with carbon remaining on the first thin film 102 to be CO or CO ₂ , and thus carbons on the first thin film 102 may be removed. Therefore, the amount of carbon remaining on the first thin film 102 is greatly reduced compared to the conventional.

In addition, the oxide film 106 formed on the surface of the first thin film 102 serves as a blocking film to prevent the gas and carbon from bonding to form a thin film at a subsequent thin film formation. Therefore, defects in which particles are generated by carbon remaining on the first thin film 102 are reduced.

The heat treatment may be performed at about 900 to about 1000 seconds to about 60 to about 300 seconds, which may vary depending on the characteristics of the transistor to be formed. More specifically, the heat treatment may proceed for about 120 seconds at 950 ℃.

Referring to FIG. 4, a second thin film 108 including nitride is formed on the oxide film 106. The second thin film 108 is made of silicon nitride, and may be formed by chemical vapor deposition.

In the process of forming the second thin film 108, a large amount of particles containing carbon and nitrogen may be generated while the nitrogen provided as a reaction gas and the carbon remaining on the first thin film 102 are combined. The particles are produced while having the shape of being agglomerated on the surface of the second thin film 108. The generated particles have different etching characteristics from that of the second thin film 108, which may cause defects in subsequent patterning processes.

However, most of the carbon on the surface of the first thin film 102 was removed by performing a heat treatment using oxygen before forming the second thin film 108. Therefore, the number of particles generated during the formation of the second thin film 108 is greatly reduced.

Specifically, the number of particles generated on the surface of the second thin film 108 when the heat treatment process using oxygen is performed, when the heat treatment process using no heat treatment or nitrogen is performed, the second thin film 108 is performed. It is about 1 to 10% of the number of particles generated on the surface.

According to the present exemplary embodiment, a second thin film including a first thin film doped with an impurity, an oxide film, and a nitride may be stacked. In addition, it is possible to suppress the generation of particles causing short failure in the subsequent process on the surface of the second thin film.

5 through 10 are cross-sectional views illustrating a method of forming a gate electrode according to an exemplary embodiment of the present invention. Hereinafter, a method of forming each gate electrode including polysilicon doped with impurities of different conductivity types on a substrate will be described.

 Referring to FIG. 5, a semiconductor substrate 200 having a first region for forming an N-type transistor and a second region for forming a P-type transistor is provided.

A shallow trench device isolation process is performed on the semiconductor substrate 200 to form a device isolation layer pattern 202. The device isolation layer pattern 202 separates the active region and the device isolation region.

A P-well (not shown) provided as a channel region is formed in the substrate 200 of the first region, and an N-well (not shown) provided as a channel region is formed in the substrate 200 of the second region. do.

A gate insulating film 204 is formed on the surface of the semiconductor substrate 200. The gate insulating layer 204 may be formed of silicon oxide formed by a thermal oxidation process. Alternatively, the gate insulating layer 204 may be formed of a metal oxide such as hafnium oxide, zirconium oxide, titanium oxide, or tantalum oxide.

A polysilicon layer 206 having no impurities doped is formed on the gate insulating layer 204. The polysilicon film 206 may be formed by a low pressure chemical vapor deposition (LPCVD) process.

Referring to FIG. 6, a first photoresist pattern 208 is formed to cover the polysilicon layer 206 positioned on the second region. That is, the first photoresist pattern 208 exposes a portion of the polysilicon layer 206 positioned on the first region.

N-type impurities such as arsenic and phosphorus are doped into the polysilicon layer 206 by using the first photoresist pattern 208 as an ion implantation mask. The doping of the impurities may be performed by a plasma ion implant process as described above. Therefore, after the plasma ion implantation process is performed, the first photoresist pattern 208 is cured and the solubility is greatly reduced.

After performing the process of doping the N-type impurities, although not shown, an ashing and stripping process is performed to remove the first photoresist pattern 208. However, even after the first photoresist pattern 208 is removed, the organic material including carbon remains in the polysilicon layer 206.

Referring to FIG. 7, a second photoresist pattern 210 is formed to cover the polysilicon layer 206 positioned on the first region. That is, the second photoresist pattern 210 exposes a portion of the polysilicon layer 206 positioned on the second region.

P-type impurities such as boron are doped into the polysilicon layer 206 using the second photoresist pattern 210 as an ion implantation mask. The doping of the impurities may be performed by a plasma ion implant process as described above. Therefore, after the plasma ion implantation process is performed, the second photoresist pattern 210 is cured and solubility is greatly reduced.

After performing the process of doping the P-type impurities, although not shown, the second photoresist pattern 210 is removed by performing an ashing and stripping process. However, even after the second photoresist pattern 210 is removed, the organic material including carbon remains in the polysilicon layer 206.

Referring to FIG. 8, a surface of the polysilicon film 206 may be formed by performing a heat treatment using oxygen gas on the polysilicon film 206 doped with N-type impurities and P-type impurities in the first and second regions, respectively. An oxide film 212 is formed in the film. As described above, when the heat treatment is performed, impurities doped in the polysilicon film 206 are activated.

Oxygen introduced during the heat treatment is combined with carbon remaining on the polysilicon film 206 to form CO or CO ₂ , and thus carbons on the polysilicon film 206 may be removed. Therefore, the amount of carbon remaining on the polysilicon film 206 is greatly reduced compared to the conventional.

Referring to FIG. 9, a silicon nitride film (not shown) is formed on the oxide film 212. The silicon nitride film may be formed through an LP-CVD process or a PE-CVD process. As described above, since most of the carbon has been removed by the heat treatment step using oxygen, particles are hardly generated on the surface of the silicon nitride film formed by the step.

Thereafter, a third photoresist pattern (not shown) is formed on the silicon nitride film. The third photoresist pattern is formed to mask a portion where the gate electrode is to be formed. The hard mask pattern 214a is formed by etching the silicon nitride layer using the third photoresist pattern as an etching mask.

On the other hand, when particles are formed on the surface of the silicon nitride film, the particle portion is hardly etched even when the etching process is performed. Therefore, the silicon nitride film under the particle remains unetched, so that the hard mask pattern 214a is not formed in a normal shape. However, according to the present exemplary embodiment, since hardly any particles are generated on the surface of the silicon nitride layer, a portion of the silicon nitride layer may not be etched to reduce the occurrence of defects in the hard mask pattern 214a.

Referring to FIG. 10, the oxide layer 212 and the polysilicon layer 206 are etched using the hard mask pattern 214a as an etch mask. When the process is performed, an NMOS transistor gate structure 218a including a first polysilicon pattern 206a, an oxide layer pattern 212a, and a hard mask pattern 214a is formed in the first region, and the second region is formed. In the region, a gate structure 218b for a PMOS transistor in which a first polysilicon pattern 206b, an oxide film pattern 212a and a hard mask pattern 214a are stacked is formed. In this case, since no defect occurs in the hard mask pattern 214a, no short or bridge defect occurs in the gate structures 218a and 218b.

Hereinafter, the degree of contamination of carbon after the impurity ion implant process and subsequent treatment according to the conditions of one embodiment of the present invention and the conditions to be compared will be described and the results are described. Since carbon contamination of the thin film causes particles to be generated during subsequent nitride film formation, it can be seen that particles are reduced by comparing the degree of carbon contamination.

Comparative experiment

Comparative Example 1

An undoped polysilicon film was deposited on the substrate to a thickness of 1000 kPa. Thereafter, boron was doped into the polysilicon film. The doping of the boron was performed by a plasma ion implant process. The ion implant process was performed without forming a photoresist pattern.

Comparative Example 2

An undoped polysilicon film was deposited on the substrate to a thickness of 1000 kPa. Thereafter, boron was doped into the polysilicon film. The doping of the boron was performed by a plasma ion implant process. The ion implant process was performed without forming a photoresist pattern. Next, the substrate was heat-treated in a nitrogen atmosphere for diffusion of boron doped into the polysilicon film.

Example

An undoped polysilicon film was deposited on the substrate to a thickness of 1000 kPa. Thereafter, boron was doped into the polysilicon film. The doping of the boron was performed by a plasma ion implant process. The ion implant process was performed without forming a photoresist pattern. Next, the substrate was heat-treated in an oxygen atmosphere for diffusion of boron doped into the polysilicon film.

FIG. 11 is a SIMS profile showing the content of carbon for each of the comparative examples and examples.

In FIG. 11, the portion denoted by reference numeral 150 is a SIMS profile of carbon measured in the polysilicon film of Comparative Example 1, and the portion denoted by 152 is a SIMS profile of carbon measured in the polysilicon film of Comparative Example 2, The portion indicated at 154 is the SIMS profile of carbon measured in the polysilicon film of the example.

Referring to FIG. 11, it can be seen that the carbon content of the polysilicon film formed by the example is very small compared to the carbon content of the polysilicon films formed by the comparative examples 1 and 2.

As such, when the carbon content is small in the polysilicon film doped with the impurity, particles are not formed in the nitride film formed subsequently. Therefore, according to the method of an embodiment of the present invention, it is possible to suppress particles generated on the thin film.

As described above, according to the present invention, particles generated on the thin film can be suppressed. Therefore, the characteristics of the thin film can be improved, and short or bridge failure caused by the particles when patterning the thin film can be reduced. As such, the defects caused by the particles are reduced, thereby increasing the manufacturing yield of the semiconductor device. Specifically, the defect in the process for forming the gate electrode is reduced, so that a MOS transistor having high performance can be formed.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified without departing from the spirit and scope of the invention described in the claims below. And can be changed.

1 to 4 are cross-sectional views illustrating a method of forming a thin film structure according to an embodiment of the present invention.

5 through 10 are cross-sectional views illustrating a method of forming a gate electrode according to an exemplary embodiment of the present invention.

FIG. 11 is a SIMS profile showing the content of carbon for each of the comparative examples and examples.

Claims (8)

Forming a first thin film on the substrate; Doping impurities into a portion of the first thin film; Performing a heat treatment using oxygen gas on the first thin film doped with impurities to form an oxide film on the surface of the first thin film while removing organic substances remaining in the first thin film; And And forming a second thin film made of nitride on the oxide film. The method of claim 1, wherein the doping the impurities, Forming a photoresist pattern on the first thin film; Doping impurities into a portion of the first thin film through an ion implantation process using the photoresist pattern as a mask; And And removing the photoresist pattern. The method of claim 1, wherein the first thin film comprises polysilicon. The method of claim 1, wherein the second thin film comprises silicon nitride. The method of claim 1, wherein the doping of the impurities is performed through an ion implant process to which plasma is applied. Forming a polysilicon film on the substrate; Forming a first photoresist pattern on the first region of the polysilicon film; Doping a first conductive type first impurity into a first region of the polysilicon layer through a first ion implantation process using the first photoresist pattern as a mask; Removing the first photoresist pattern from the polysilicon film; Performing a heat treatment using oxygen gas on the polysilicon film to form an oxide film on the surface of the polysilicon film while removing organic substances remaining in the first thin film; Forming a silicon nitride film on the oxide film; Patterning the silicon nitride film to form a hard mask pattern; And And forming a gate electrode by etching the oxide layer and the polysilicon layer using the hard mask pattern as an etching mask. The method of claim 6, wherein after removing the first photoresist pattern, Forming a second photoresist pattern on the polysilicon film; Doping a second conductivity type second impurity in a second region of the polysilicon layer through a second ion implantation process using the second photoresist pattern as a mask; And Removing the second photoresist pattern. The method of claim 6, wherein the doping of the impurities is performed through an ion implant process to which plasma is applied.

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