KR20080103843A - Flat panel display and manufacturing method thereof - Google Patents

Abstract

A flat display panel with improved durability and a method for manufacturing the same are provided to minimize the generation of pore in the frit when hardening the frit, thereby improving durability of the flat display panel. A thin film transistor substrate(100) includes the hardening member(400) formed along the edge line. A cover substrate is bonded to the TFT substrate. A sealant formed along the edge line of the TFT substrate, and the cover substrate bonds the TFT substrate and the cover substrate. A frit(500) formed along the connection corner by bonding the TFT substrate, and the cover substrate.

Description

Flat panel display and its manufacturing method {FLAT PANEL DISPLAY AND MANUFACTURING METHOD THEREOF}

1 is a view for explaining the structure of a conventional flat panel display device;

2 is a view for explaining a flat panel display according to the first embodiment of the present invention,

3 is a cross-sectional view taken along III-III of FIG. 2,

4 is an enlarged cross-sectional view of portion 'A' of FIG. 2,

5 is an enlarged perspective view of a portion 'B' of FIG. 2,

6A and 6B are views for explaining a flat panel display device according to a second embodiment of the present invention.

7 is a flowchart illustrating a method of manufacturing a flat panel display device according to a first embodiment of the present invention.

8A to 8C are diagrams for describing a method of manufacturing a flat panel display device according to a first embodiment of the present invention.

9A to 9C are views for explaining a method of forming embossing on the hardening member according to the first embodiment of the present invention.

10 is a flowchart illustrating a method of manufacturing a flat panel display device according to a second embodiment of the present invention.

11A to 11C are views for explaining a method of manufacturing a flat panel display device according to a second embodiment of the present invention.

Explanation of Signs of Major Parts of Drawings

10: flat panel display device 100: thin film transistor substrate

110: insulating substrate 120: semiconductor layer

130: gate insulating film 140: gate electrode

150: interlayer insulating film 161: source electrode

162: drain electrode 170: protective film

180: connecting electrode 200: organic light emitting substrate

210: cover substrate 220: first electrode layer

230: blocking pattern 240: partition wall

250: organic light emitting layer 260: second electrode layer

300: sealant 400: hardening member

410 embossing 500 frit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel display and a method for manufacturing the same. More particularly, the present invention relates to minimizing the occurrence of pores in the frit during curing of the frit applied to the flat panel display. The present invention relates to a flat display device having improved durability and a method of manufacturing the same.

BACKGROUND OF THE INVENTION Organic light emitting diodes (OLEDs) have recently come into the spotlight due to advantages such as low voltage driving, light weight, wide viewing angle, and high-speed response among flat panel displays.

Hereinafter, with reference to FIG. 1, the general structure of OLED1 is demonstrated. 1 is a cross-sectional view of an OLED in accordance with one embodiment of various OLED structures.

As shown in FIG. 1, the OLED 1 includes a thin film transistor TFT including a gate electrode, a source electrode, and a drain electrode, a pixel electrode 3 connected to the thin film transistor TFT, and a pixel electrode. (3) the partition 4 between which the partitions are divided, the organic light emitting layer 5 formed on the pixel electrode 3 in the region between the partitions 4, and the common electrode formed on the organic light emitting layer 5 ( 6).

Here, the organic light emitting layer 5 is sensitive to moisture and oxygen, and when the moisture and oxygen flow into the organic light emitting layer 5, the performance of the organic light emitting layer 5 may be degraded and the life thereof may be shortened. In order to prevent such deterioration of the organic light emitting layer 5, a sealing process is performed in which the cover substrate 7, which prevents the inflow of moisture and oxygen, is bonded to the insulating substrate 2 provided with the organic light emitting layer 5. . Then, a sealant is applied along the edge between the two substrates 2 and 7 to mutually attach the two substrates 2 and 7.

However, the sealant made of an organic material may not completely block moisture and oxygen, and thus, moisture and oxygen may flow into the organic light emitting layer 5 through the sealant to deteriorate the organic light emitting layer 5.

In order to solve this problem, a method of attaching the two substrates 2 and 7 to each other using a glass frit 8 instead of an organic sealant has been proposed. The frit 8 has an advantage in that the moisture permeability and the oxygen permeability are very low to prevent the organic light emitting layer 5 from deteriorating.

However, this frit 8 is cured from the surface and finally cured inside. As a result, a gas or the like generated inside does not escape to the outside and is trapped inside to generate a plurality of pores 9. Moisture and oxygen may be introduced into the pores 9 and cracks by the pores 9. As a result, the oxygen and moisture transmittance of the frit 8 is increased and the organic light emitting layer is deteriorated, thereby degrading the lifespan and performance of the flat panel display. In addition, the hardened frit 8 may be broken by an external impact, so that the flat panel display device to which only the frit 8 is applied has a poor durability.

Accordingly, an object of the present invention is to provide a flat panel display device having improved durability and minimizing the occurrence of pores in the frit during curing of the frit applied to the flat panel display device.

Another object of the present invention is to provide a method of manufacturing a flat panel display device having improved durability and minimizing the occurrence of pores in the frit during curing of the frit applied to the flat panel display device. will be.

The object is, according to the present invention, a thin film transistor substrate comprising a curing member formed along the edge; A cover substrate opposed to the thin film transistor substrate; A sealant formed along an edge between the thin film transistor substrate and the cover substrate to bond the thin film transistor substrate and the cover substrate to each other; And a frit formed along a bonding edge formed by bonding the thin film transistor substrate and the cover substrate to at least partially overlap the hardening member.

The thin film transistor substrate may further include a thin film transistor having a gate electrode, and the curing member may be formed of the same material as the gate electrode.

The thin film transistor substrate further includes a thin film transistor having a source electrode and a drain electrode, and the curing member may be formed of the same material as the source electrode and the drain electrode.

The thin film transistor substrate may further include a thin film transistor and a connection electrode connected to the thin film transistor, and the curing member may be formed of the same material as the connection electrode.

Here, the hardening member may include a metal.

The hardening member may include at least one of Cr, AlNd, and Al.

Here, a plurality of embossing may be formed on the outer surface of the hardening member.

The thin film transistor substrate may have a larger area than the cover substrate.

The object of the present invention is, according to the present invention, a thin film transistor substrate; A cover substrate opposed to the thin film transistor substrate; A sealant formed along an edge between the thin film transistor substrate and the cover substrate to bond the thin film transistor substrate and the cover substrate to each other; A hardening member formed in an edge region of at least one of the thin film transistor substrate and the cover substrate; And a frit formed along a bonding edge formed by bonding the thin film transistor substrate and the cover substrate to at least partially overlap the hardening member.

Here, the hardening member may include at least one of a metal in a thin film form and a metal in a particulate state.

Another object of the present invention, according to the present invention, comprising the steps of providing a thin film transistor substrate comprising a curing member formed along the edge; Bonding a cover substrate to the thin film transistor substrate using a sealant; Forming a frit along a bonding edge formed by bonding the thin film transistor substrate and the cover substrate to at least partially overlap the hardening member; It is achieved by a method for manufacturing a flat panel display device comprising the step of curing the frit.

The preparing of the thin film transistor substrate may further include forming a gate electrode on the insulating substrate, and the curing member may be formed of the same material as the gate electrode.

The preparing of the thin film transistor substrate may further include forming a source electrode and a drain electrode on the insulating substrate, and the curing member may be formed of the same material as the source electrode and the drain electrode.

The preparing of the thin film transistor substrate may further include forming a thin film transistor and forming a connection electrode connected to the thin film transistor, and the curing member may be formed of the same material as the connection electrode.

The hardening member may be formed through a photolithography process.

Here, the hardening member may be patterned to have a plurality of embossing on the outer surface.

The hardening member is patterned to have the plurality of embossings, comprising: forming a metal layer on an insulating substrate; Forming a photoresist film comprising a flat portion and an embossed portion having a height higher than the flat portion on the metal layer; Forming a plurality of embossing (embossing) corresponding to the embossed portion on the outer surface of the hardening member through the etching of the metal layer using the photosensitive film.

In addition, the hardening member may include at least one of Cr, AlNd and Al.

Another object of the invention, according to the present invention, the step of bonding the thin film transistor substrate and the cover substrate using a sealant; Forming a hardening member on at least one corner region of the thin film transistor substrate and the cover substrate; Forming a frit along a bonding edge formed by bonding the thin film transistor substrate and the cover substrate to at least partially overlap the hardening member; And it is achieved by a method of manufacturing a flat panel display device comprising the step of curing the frit.

Here, the hardening member may be formed through deposition using a mask having at least one opening corresponding to the edge region.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. Hereinafter, the OLED will be described as an example among various flat panel display devices. However, the present invention is not limited thereto, and it can be applied to other flat panel display devices such as a liquid crystal display (LCD) and a PDP. In addition, the fact that a film is formed (located) on top of another film is not only when the two films are in contact with each other but also between the two films. It also includes the case where it exists.

FIG. 2 is a view for explaining a flat panel display device according to a first exemplary embodiment of the present invention, FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2, and FIG. 5 is an enlarged perspective view of a portion 'B' of FIG. 2.

The OLED 1 is a self-luminous device using an organic material (organic light emitting layer) that emits light by receiving an electrical signal. The performance and lifespan of such organic material are vulnerable to moisture (moisture) and oxygen. Therefore, a sealing method that effectively prevents oxygen and moisture penetrating into the organic material (organic light emitting layer) is important.

As shown in FIGS. 2 and 3, the OLED 10 according to the first embodiment of the present invention includes a thin film transistor substrate 100 and an organic light emitting layer 250 having a thin film transistor Tr formed thereon. The organic light emitting substrate 200 is formed along the edge between the two substrates 100 and 200 and is formed along the edges of the sealant 300 and the thin film transistor substrate 100 that bond the two substrates 100 and 200 to each other. The frit 500 formed along the bonding edge portion C formed by bonding the thin film transistor substrate 100 and the organic light emitting substrate 200 to at least partially overlap the hardening member 400 and the hardening member 400. Include.

First, the thin film transistor substrate 100 will be described. First, an inner region of the sealant 300 will be described, and then an outer region of the sealant 300 will be described.

The thin film transistor substrate 100 includes a thin film transistor Tr formed on the insulating substrate 110, and a connection electrode 180 connecting the thin film transistor Tr and the second electrode layer 260 of the cover substrate 200. ).

The insulating substrate 110 may be a transparent substrate and an organic substrate or a plastic substrate.

The thin film transistor Tr is formed on the insulating substrate 110. The thin film transistor Tr includes a semiconductor layer 120, a gate electrode 140, a source electrode 161, a drain electrode 162, and the like.

The semiconductor layer 120 deposits amorphous silicon (a-Si: H) on the insulating substrate 110, forms a crystalline silicon layer through a dehydrogenation process and a crystallization process using heat, and defines an amorphous silicon layer. It is formed by patterning in the shape of. The semiconductor layer 120 is divided into a first region 120a and a second region 120b positioned at both sides of the first region 120a according to an amount of doping of an impurity. The second region 120b is a region in which Group 3 or Group 5 elements are heavily doped.

The semiconductor layer 120 is covered by the gate insulating layer 130 made of an inorganic material such as silicon oxide or silicon nitride. An opening for exposing the second region 120b is formed in the gate insulating layer 130.

The gate electrode 140 is formed in the gate insulating layer 130 on the first region 120a. When the ion is doped by the gate electrode 140, impurities are hardly doped in the first region 120a of the semiconductor layer 120, and impurities are heavily doped in the first region 120b. Here, the gate electrode 140 may include at least one of molybdenum (Mo), manganese (Mn), aluminum (Al), alminium (AlNd), copper (Cu), chromium (Cr), and similar metals. Can be.

The gate electrode 140 is covered by the interlayer insulating layer 150. The interlayer insulating layer 150 may be an inorganic insulating layer or an organic insulating layer. Insulation contact holes 151 and 152 exposing the second regions 120b are formed in the interlayer insulating layer 150. At least a portion of the second region 120b of the semiconductor layer 120 is exposed to the outside by the first and second insulating layer contact holes 151 and 152.

The source electrode 161 and the drain electrode 162 are formed in one region on the interlayer insulating layer 150. The source electrode 161 is connected to the second region 120b through the first insulating film contact hole 151, and the drain electrode 162 is connected to the second region 120b through the second insulating film contact hole 152. It is connected. Here, the source electrode 161 and the drain electrode 162 may include molybdenum (Mo), manganese (Mn), aluminum (Al), aluminum (AlNd), copper (Cu), chromium (Cr), and similar metals. It may include at least one of.

The source electrode 161 and the drain electrode 162 are covered by the passivation layer 170. The passivation layer 170 may be an acrylic organic insulating layer. A drain contact hole 171 exposing at least a portion of the drain electrode 162 is formed in the passivation layer 170.

The connection electrode 180 connected to the drain electrode 162 is formed on the passivation layer 170 through the drain contact hole 171. The connection electrode 180 is for connecting between the thin film transistor Tr and the second electrode 260 which will be described later. Molybdenum (Mo), manganese (Mn), aluminum (Al), aluminum (AlNd), copper (Cu), chromium (Cr) and similar metals.

The sealant 300 is formed along an edge between the insulating substrate 110 and the cover substrate 210. The sealant 300 is a sealant that prevents oxygen or moisture from flowing through the adhesive between the substrates 110 and 210 and the space between the substrates 110 and 210. The sealant 300 is made of an organic material, and specifically, may be made of melamine resin, urea resin, phenol resin, resorcinol resin, epoxy resin, unsaturated polyester resin, polyurethane resin, acrylic resin, and the like. It is not. The sealant 300 may be formed by any one of a dispenser method, a screen printing method, a slit coating method, and a roll printing method. The sealant 300 made of such an organic material may be cured by UV or cured by heat.

Next, the outer region of the sealant 300 will be described.

A hardening member 400 for hardening the frit 500 is formed on the insulating substrate 110 on the outer side of the sealant 300. The hardening member 400 is formed along the edge of the insulating substrate 110. The hardening member 400 includes at least one of molybdenum (Mo), manganese (Mn), aluminum (Al), alminium (AlNd), copper (Cu), chromium (Cr) and similar metals. More preferably, the hardening member 400 may include chromium (Cr), aluminum (AlNd), and aluminum (Al) having good reflectance and thermal conductivity in order to speed up the curing speed of the frit 500. The hardening member 400 according to the first embodiment of the present invention is preferably formed simultaneously when any one of the gate electrode 140, the source electrode 161, the drain electrode 162, and the connection electrode 180 is formed. Do. Since the hardening member 400 is formed of the above-described metals, any one of the gate electrode 140, the source electrode 161, the drain electrode 162, and the connection electrode 180 may be formed of the same or similar metals. Forming at the same time is economical because it can prevent the increase of the number of processes. Specifically, when the hardening member 400 is made of the same material as the gate electrode 140, a metal layer (not shown) to be formed of the gate electrode 140 and the hardening member 400 is formed on the insulating substrate 110. And a photoresist film (not shown) is formed on the metal layer to form the gate electrode 140 and the hardening member 400, respectively, and then pattern the metal layer (not shown) using the photoresist film (not shown) to form the gate electrode. 140 and the curing member 400 can be formed at the same time. Even when the hardening member 400 is simultaneously formed with the source electrode 161, the drain electrode 162, or the connection electrode 180, the hardening member 400 may be formed by the same principle and method as the method of forming the gate electrode 140.

Hardening member 400 according to the first embodiment of the present invention may be provided with a flat surface, a plurality of embossing (410, embossing) may be formed on the surface as shown in FIG. The embossing 410 is for improving the curing speed of the frit 500 by the curing member 400. Specifically, the laser light incident on the hardening member 400 is diffusely reflected by the embossing 410, so that the laser light is uniformly spread throughout the frit 500. As a result, the curing rate and the curing uniformity of the frit 500 are improved. In addition, as the contact area of the frit 500 and the hardening member 400 is increased by the embossing 410, the heat generated from the hardening member 400 is better transmitted to the frit 500. As a result, the curing speed of the frit 500 is improved. On the other hand, the manufacturing method of the hardening member 400 having the embossing 410 will be described in detail in the paragraphs describing the manufacturing method of the flat panel display device according to the present invention.

A frit 500 is formed in the bonding edge portion C (see FIG. 4) formed by bonding the two substrates 110 and 210. As shown in FIGS. 2 to 4, the frit 500 is formed along the bonding edge portion C (see FIG. 4) to at least partially overlap the above-described hardening member 400. Such frit 500 is frit-like powder glass, and is composed of SiO ₂ , TiO ₂ , PbO, PbTiO ₃ , Al ₂ O ₃ , a binder, a curing agent, and the like. The frit 130 has a very low water transmittance and oxygen transmittance of about 1 g / m 2 day to 10 g / m 2 day to prevent the organic light emitting layer 250 from deteriorating. In addition, it is possible to manufacture in a vacuum chamber having a durability that can be mounted in a vacuum chamber, thereby minimizing the penetration of oxygen and moisture from the outside. As a result, the lifespan of the flat panel display device 10 is increased and the performance is improved. The frit 500 may be cured by heat using a laser, a hardening member 400 in contact with the frit 500, an oven, or the like, and may be thermoplastic. The hardening process of the frit 500 will be described in detail in the following paragraphs describing a method of manufacturing a flat panel display.

However, this frit 500 is cured from the surface of the frit 500 when the laser light is incident on the frit 500 and finally cured inside. As a result, a gas or the like generated inside does not escape to the outside and is trapped inside to generate a plurality of pores. Moisture and oxygen may be introduced into the pores by cracks due to such pores and pores. As a result, the oxygen and moisture transmittance of the frit 500 is increased, thereby deteriorating the organic light emitting layer, thereby degrading the lifespan and performance of the flat panel display. In addition, the hardened frit 500 may be broken by an external impact, so that the flat panel display device to which only the frit 500 is applied has a poor durability.

However, in the flat panel display device 10 according to the present invention, the curing speed of the frit 500 is improved by the hardening member 400 so that the curing speed of the inside and the surface of the frit 500 is almost similar or frit. The internal curing rate of 500 is faster than the surface curing rate to minimize the generation of pores. Specifically, conventionally, the curing member 400 is not provided, the laser light incident on the frit 500 first hardened the surface of the frit 500. However, when the hardening member 400 is provided as in the present invention, the laser light incident on the frit 500 is reflected by the hardening member 400 to spread to the inside of the frit 500. Accordingly, the internal curing rate of the frit 500 is improved, so that the curing rate of the inside and the surface of the frit 500 is about the same or the internal curing rate of the frit 500 is faster than the surface curing rate. . Furthermore, when the embossing 410 (see FIG. 5) is formed on the surface of the hardening member 400, the laser light is more diffusely reflected, and the contact area between the frit 500 and the hardening member 400 is improved to increase the hardening member ( Heat generated at 400 may be easily transferred to the frit 500. Accordingly, the internal curing speed of the frit 500 is improved to minimize the generation of pores.

In addition, the flat panel display 10 according to the first embodiment of the present invention applies the sealant 300 and the frit 500 simultaneously. As a result, even if the frit 500 is partially broken by the external impact, the sealant 300 adheres the substrates 110 and 210 to each other, thereby improving durability and impact resistance of the flat panel display 10. In addition, moisture and oxygen introduced into the broken portion of the frit 500 may be blocked by the sealant 300 to prevent deterioration of the organic light emitting layer 250.

Hereinafter, the organic light emitting substrate 200 will be described.

The organic light emitting substrate 200 may include a cover substrate 210 that opposes the insulating substrate 110, a first electrode layer 220 formed on a bottom surface of the cover substrate 210, and an organic light emitting layer on the first electrode layer 220. The blocking pattern 230 positioned in the area between the 250, the partition 240 disposed on the blocking pattern 230, and partitioning the pixel, and the pixel between the partition 240 are respectively filled. The organic light emitting layer 250, the organic light emitting layer 250, and the second electrode layer 260 formed on the partition wall 240 are included.

The cover substrate 210 may be made of glass or plastic, like the insulating substrate 110.

The first electrode layer 220 made of a transparent conductive metal is formed on the front surface of the cover substrate 210. Specifically, the first electrode layer 220 may be made of indium tin oxide (ITO), indium zinc oxide (IZO), or the like. The first electrode layer 220 is an anode for supplying holes to the organic light emitting layer 250.

A blocking pattern 230 is formed in the boundary region between each pixel. The blocking pattern 230 is an inorganic insulating layer including silicon nitride (SiNx) or silicon oxide (SiO ₂ ). The blocking pattern 230 is to insulate the first electrode layer 200 from layers made of another conductive material. The blocking pattern 230 is provided in a planar lattice shape, and distinguishes between pixels.

The partition wall 240 is formed on the blocking pattern 230. The partition wall 240 is formed of a photosensitive organic material, and may include, for example, an acrylic resin, a polyimide resin, or the like. The partition wall 240 defines each pixel and is provided in a grid shape.

An organic light emitting layer 250 is formed in each pixel. The organic light emitting layer 250 may include a hole injecting layer, a hole transfer layer, an emission layer, an electron transfer layer, and an electron injection layer. Can be. The light emitting layer includes a red light emitting layer for emitting red light, a green light emitting layer for emitting green light, and a blue light emitting layer for emitting blue light. The light emitting layer may be formed of a perylene-based dye, a rhomine-based dye, rubrene, or a polyfluorene derivative, a (poly) paraphenylene vinylene derivative, a polyphenylene derivative, a polyvinylcarbazole, a polythiophene derivative, or a polymer material thereof. It may be used by doping with ylene, 9,10-diphenylanthracene, tetraphenylbutadiene, nile red, coumarin 6, quinacridone and the like.

The holes transferred from the first electrode layer 220 and the electrons transferred from the second electrode layer 260 are combined in the organic light emitting layer 250 to become excitons, and then generate light in the process of deactivating the excitons. Accordingly, each pixel becomes a red pixel, a blue pixel, and a green pixel according to the type of light emitting layer.

The second electrode layer 260 is formed on the partition wall 240 and the organic light emitting layer 250. The second electrode layer 260 is formed independently for each pixel. The second electrode layer 260 is also called a cathode and supplies electrons to the organic light emitting layer 250. The second electrode layer 250 is made of an opaque material such as aluminum and silver, and the light emitted from the organic light emitting layer 250 is emitted toward the cover substrate 210.

Meanwhile, unlike the description, the second electrode layer 260 may be made of indium tin oxide (ITO) or indium zinc oxide (IZO), and the first electrode layer 220 may be made of an opaque material such as aluminum or silver. have. At this time, the emission direction of the emitted light is in the direction of the insulating substrate 110.

Hereinafter, a structure of a flat panel display device according to a second embodiment of the present invention will be described with reference to FIGS. 6A and 6B. In the second embodiment, only characteristic parts distinguished from the first embodiment will be described and described, and descriptions thereof will be omitted or summarized according to the first embodiment. In addition, for the convenience of description, the same reference numerals are assigned to the same components to be described.

As shown in FIG. 6A, the hardening member 400 according to the second embodiment of the present invention is formed on the insulating substrate 110 and the cover substrate 210, respectively, unlike the first embodiment. As described above, the hardening member 400 according to the second exemplary embodiment has a shape and structure different from that of the first exemplary embodiment, unlike the first exemplary embodiment, in which the hardening member 400 is insulated by the vacuum deposition method. This is because they are formed on both the 110 and the cover substrate 210. The manufacturing method of the hardening member 400 according to the second embodiment will be described in detail in the paragraph describing the manufacturing method of the flat panel display device.

The hardening member 400 according to the second embodiment may have a thin film form or a particulate state. Specifically, as shown in FIG. 6A, the hardening member 400 may be formed in the corner region E of the insulating substrate 110 and the corner region E of the cover substrate 210 in the form of a thin film. . Alternatively, as shown in FIG. 6B in a modified embodiment, the hardening member 400 may be formed in the corner region E of the insulating substrate 110 and the corner region E of the cover substrate 210 in the form of particles, respectively. Can be. The thin film form of FIG. 6A or the particle state of FIG. 6B is determined according to the pattern or shape of the mask 700 (FIG. 11A) used when manufacturing the hardening member 400.

6A and 6B, after the hardening member 400 is formed in the corner region E of the insulating substrate 110 and the corner region E of the cover substrate 210, the frit 500 is formed. ) Is formed to at least partially overlap the curing member 400. Thereafter, as in the first embodiment, the frit 500 is hardened by applying heat or laser light to the hardening member 400.

Curing member 400 according to the second embodiment shows an example according to the form and manufacturing method different from the first embodiment. The hardening member 400 according to the second embodiment may be applied when the hardening member is to be manufactured by a separate process and when the hardening member 400 needs to be manufactured after the adhesion of both substrates 110 and 210. .

Meanwhile, in the second embodiment of the present invention, a case in which the hardening member 400 is formed in the corner region E of the insulating substrate 110 and the cover substrate 210 has been described as an example, but is not limited thereto. If 400 is a position that can overlap with the frit 500 to be described later may be formed anywhere in the insulating substrate 110 and the cover substrate 210.

Hereinafter, a method of manufacturing the flat panel display device according to the first embodiment of the present invention will be described in detail with reference to FIGS. 7 to 8C.

First, as shown in FIGS. 7 and 8A, a thin film transistor substrate 100 including a hardening member 400 formed along an edge of the insulating substrate 110 is prepared (S11). The hardening member 400 may include a gate electrode 140 (see FIG. 3), a source electrode and a drain electrode 161, 162 (see FIG. 3), and a connection electrode 180 (see FIG. 3) by using a photolithography process. It can be formed at the same time with either. A detailed method of forming the hardening member 400 will be described in detail in the following paragraphs describing a method of forming the embossing 410 (see FIG. 5) of the hardening member 400 to be described later.

Meanwhile, the organic light emitting substrate 200 is prepared at the same time as the formation of the thin film transistor substrate 100 or in a separate process (S12). The organic light emitting substrate 200 may include a first electrode layer 220 (see FIG. 3), an organic light emitting layer 250 (see FIG. 3), a partition wall 240 (see FIG. 3), and a second electrode layer 260 on the cover substrate 210. 3) etc. are formed in accordance with a well-known method.

When the thin film transistor substrate 100 and the organic light emitting substrate 200 are completed, the sealant 300 is applied to the edges of the insulating substrate 110 and the cover substrate 210, and as shown in FIG. 8A, both substrates are provided. (100, 200) are bonded to each other (S20). The sealant 300 is made of an organic material and may be formed by any one of a dispenser method, a screen printing method, a slit coating method, and a roll printing method. . When both substrates 100 and 200 are bonded, the sealant 300 is irradiated with UV or heat to cure the sealant 300.

Next, as shown in FIG. 7 and FIG. 8B, the frit 500 is formed in the bonding edge portion C (S30). The frit 500 is formed outside the sealant 300 to at least partially overlap the hardening member 400, as shown in FIG. 7. The frit 500 may be formed by any one of a dispenser method, a screen printing method, a slit coating method, and a roll printing method. The frit 500 is preferably formed to cover all the spaces between the insulating substrate 110 and the cover substrate 120 in order to prevent oxygen and moisture introduced from the outside.

When the frit 500 is formed in the bonding edge portion C, the frit 500 is cured (S40). In the hardening process of the frit 500, the bonded substrates 100 and 200 are put in an oven to dry the frit 500. The drying process is to apply about 80 degrees of heat to the frit 500 in the oven. Subsequently, the first and second firing processes are performed using the laser device 600. The primary firing step is to dry and remove the solvent component contained in the frit 500. On the other hand, the solvent contained in the frit 500 is contained in order to easily form the frit 500 of the solvent component by a method such as dispensing (dispensing). Next, as shown in FIG. 8C, the laser light 600 is irradiated to the frit 500 to completely cure the frit 500. The laser light irradiated to the frit 500 is reflected by the hardening member 400 to spread to the inside of the frit 500. Accordingly, the internal curing rate of the frit 500 is improved, so that the curing rate of the inside and the surface of the frit 500 is about the same or the internal curing rate of the frit 500 is faster than the surface curing rate. . Furthermore, when the embossing 410 (see FIG. 5) is formed on the surface of the hardening member 400, the laser light is more diffusely reflected, and the contact area between the frit 500 and the hardening member 400 is improved to increase the hardening member ( Heat generated at 400 may be easily transferred to the frit 500. Accordingly, the internal curing speed of the frit 500 is improved to minimize the generation of pores.

Hereinafter, a method of manufacturing the hardening member 400 on which the embossing 410 (see FIG. 5) is formed will be described in detail with reference to FIGS. 9A to 9C.

First, as shown in FIG. 9A, a metal layer 450 is formed on an insulating substrate 110. Herein, the metal layer 450 may include at least one of molybdenum (Mo), manganese (Mn), aluminum (Al), alminium (AlNd), copper (Cu), chromium (Cr), and the like. have. When the metal layer 450 is formed, the photosensitive film 480 is formed on the metal layer 450. The photoresist film 480 is made of an organic material, and is a positive type in which a portion exposed to light is removed in a development process or a negative type in which an unexposed portion is removed in a development process. Can be.

When the photosensitive film 480 is formed, the photosensitive film 480 is exposed and developed using a blocking mask (not shown) having a predetermined pattern, as shown in FIG. 9B. As a result, the photosensitive film 480 has a flat portion 481 and an embossed portion 482 having a height higher than that of the flat portion 481. The metal layer 450 which is not covered by the photoresist layer 480 is a portion to be removed later during the etching of the metal layer 450. Meanwhile, among the gate electrodes 140 (see FIG. 3), the source electrode 161 (see FIG. 3), the drain electrode 162 (see FIG. 3), and the connection electrode 180 (see FIG. 3), the hardening member 400 to be manufactured is manufactured. In the case of being formed at the same time as the one, the photoresist film 480 may include the gate electrode 140 (see FIG. 3), the source electrode 161 (see FIG. 3), and the drain electrode in addition to the flat portion 481 and the embossed portion 482. 162 (see FIG. 3) and patterns for forming any one of the connection electrode 180 (see FIG. 3).

Next, the lower metal layer 450 is etched using the photosensitive film 480 having the flat end portion 481 and the embossing portion 482. By the etching process of the metal layer 450, as shown in FIG. 9C, the metal layer 450 which is not covered by the photosensitive film 480 is removed and the metal layer 450 positioned below the flat portion 481 is removed. The height is lowered, and the embossing 410 is formed in the metal layer 450 positioned below the embossing portion 482. At the same time, any one of a gate electrode 140 (see FIG. 3), a source electrode 161 (see FIG. 3), a drain electrode 162 (see FIG. 3), and a connection electrode 180 (see FIG. 3) is formed. Thereafter, when the remaining photosensitive film 480 is removed, the hardening member 400 having the embossing 410 is completed. During the etching of the metal layer 450, among the gate electrode 140 (see FIG. 3), the source electrode 161 (see FIG. 3), the drain electrode 162 (see FIG. 3), and the connection electrode 180 (see FIG. 3). Any one will be formed.

Meanwhile, in the method of forming the hardening member 400 having no structure of the embossing 410, the metal layer 450 may be etched after the photosensitive film 480 is formed so as not to have the embossing portion 482 in the above-described method.

Hereinafter, a method of manufacturing a flat panel display device according to a second embodiment of the present invention will be described with reference to FIGS. 10 to 11C. In the second embodiment, only characteristic parts distinguished from the first embodiment will be described and described, and descriptions omitted or summarized will be in accordance with the first embodiment.

First, as shown in FIG. 10, according to a known method, a thin film transistor substrate 100 is prepared (S110), and an organic light emitting substrate 200 is provided in a separate process (S120).

When the thin film transistor substrate 100 and the organic light emitting substrate 200 are provided, the substrates 100 and 200 are bonded to each other using the sealant 300 (see FIG. 3) (S200).

When both substrates 100 and 200 are bonded to each other, as shown in FIG. 11A, the hardening member 400 is formed in the corner region of the insulating substrate 110 and the cover substrate 210 through an evaporation method. . In the vacuum deposition method, a mask 700 having a predetermined opening pattern 710 between a flat display device 10 and a source 800 for evaporating a metal material and having a flat panel display device 10 bonded to the inside of a vacuum chamber. ) And then heat the source 800 so that the metal molecules are deposited on the flat panel display device 10 through the opening pattern 710. In this case, the curing member 400 is formed on the flat panel display device 10 at a position corresponding to the opening pattern 710.

Meanwhile, in the second embodiment of the present invention, the case in which the hardening member 400 is formed at the corner regions of the insulating substrate 110 and the cover substrate 210 has been described as an example, but is not limited thereto. If the position can overlap the frit 500 to be described later may be formed in any one of the insulating substrate 110 and the cover substrate 210.

11A illustrates a case in which a thin film-type hardening member 400 is formed, but when the shape of the opening pattern 710 of the mask 700 is provided in many small circles, the hardening member having a particle shape as shown in FIG. 6B is illustrated. 400 may also be formed.

Next, when the hardening member 400 is formed, as shown in FIGS. 10 and 11B, the frit 500 is formed in the bonding edge portion C (S300).

Thereafter, the frit 500 is cured using the laser apparatus 600 (S500).

As described above, according to the present invention, there is provided a flat panel display device which minimizes a phenomenon in which pores are generated in the frit during curing of the frit applied to the flat panel display device and improves durability. .

In addition, a method of manufacturing a flat panel display device having improved durability and minimizing the occurrence of pores in the frit during curing of the frit applied to the flat panel display device is provided.

Claims (20)

A thin film transistor substrate including a hardening member formed along an edge thereof; A cover substrate opposed to the thin film transistor substrate; A sealant formed along an edge between the thin film transistor substrate and the cover substrate to bond the thin film transistor substrate and the cover substrate to each other; And And a frit formed along a bonding edge formed by bonding the thin film transistor substrate and the cover substrate to at least partially overlap the hardening member. The method of claim 1, The thin film transistor substrate further includes a thin film transistor having a gate electrode, And the hardening member is formed of the same material as the gate electrode. The method of claim 1, The thin film transistor substrate further includes a thin film transistor having a source electrode and a drain electrode, And the hardening member is formed of the same material as the source electrode and the drain electrode. The method of claim 1, The thin film transistor substrate further includes a thin film transistor and a connection electrode connected to the thin film transistor, And the hardening member is formed of the same material as the connection electrode. The method of claim 1, And the hardening member comprises a metal. The method of claim 1, And the hardening member comprises at least one of Cr, AlNd, and Al. The method of claim 1, A flat panel display device, characterized in that a plurality of embossing is formed on the outer surface of the hardening member. The method of claim 1, And the thin film transistor substrate has an edge blocking structure having a larger area than the cover substrate. Thin film transistor substrate A cover substrate opposed to the thin film transistor substrate; A sealant formed along an edge between the thin film transistor substrate and the cover substrate to bond the thin film transistor substrate and the cover substrate to each other; A hardening member formed in an edge region of at least one of the thin film transistor substrate and the cover substrate; And And a frit formed along a bonding edge formed by bonding the thin film transistor substrate and the cover substrate to at least partially overlap the hardening member. The method of claim 1, And the hardening member comprises at least one of a metal in a thin film form and a metal in a particulate state. Providing a thin film transistor substrate including a hardening member formed along an edge thereof; Bonding a cover substrate to the thin film transistor substrate using a sealant;  Forming a frit along a bonding edge formed by bonding the thin film transistor substrate and the cover substrate to at least partially overlap the hardening member; And curing the frit. The method of claim 11, The preparing the thin film transistor substrate further includes forming a gate electrode on the insulating substrate. And the hardening member is formed of the same material as the gate electrode. The method of claim 11, The preparing the thin film transistor substrate further includes forming a source electrode and a drain electrode on the insulating substrate. And the hardening member is formed of the same material as the source electrode and the drain electrode. The method of claim 11, The preparing the thin film transistor substrate further includes forming a thin film transistor and forming a connection electrode connected to the thin film transistor. And the hardening member is formed of the same material as the connection electrode. The method of claim 11, The hardening member is a manufacturing method of a flat panel display device characterized in that formed through a photolithography process. The method of claim 11, And said hardening member is patterned to have a plurality of embossing on an outer surface thereof. The method of claim 16, The method in which the hardening member is patterned to have the plurality of embossing, Forming a metal layer on the insulating substrate; Forming a photoresist film on the metal layer, the photosensitive film including a flat part and an embossing part having a height higher than that of the flat part; And forming a plurality of embossings corresponding to the embossed portion on an outer surface of the hardening member by etching the metal layer using the photosensitive film. The method of claim 11, And said hardening member comprises at least one of Cr, AlNd and Al. Bonding the thin film transistor substrate and the cover substrate to each other using a sealant; Forming a hardening member on at least one corner region of the thin film transistor substrate and the cover substrate; Forming a frit along a bonding edge formed by bonding the thin film transistor substrate and the cover substrate to at least partially overlap the hardening member; And And curing the frit. The method of claim 19, And the hardening member is formed through deposition using a mask having at least one opening corresponding to the edge region.

Images