KR20080094387A

KR20080094387A - Liquid crystal display

Info

Publication number: KR20080094387A
Application number: KR1020070038769A
Authority: KR
Inventors: 나준희; 손지원; 조선아
Original assignee: 삼성전자주식회사
Priority date: 2007-04-20
Filing date: 2007-04-20
Publication date: 2008-10-23

Abstract

A liquid crystal display device having an improved response time is provided. The liquid crystal display device includes a first insulating substrate, a pixel electrode formed on the first insulating substrate, the pixel electrode including two or more fine electrode groups formed of a plurality of fine electrodes arranged substantially side by side in a predetermined direction, and the first insulating substrate. A second insulating substrate facing the substrate; a common electrode formed on the second insulating substrate and not patterned; and a liquid crystal layer interposed between the first and second insulating substrates; Each fine electrode group is formed into two or more domains by a notch.

Description

Liquid crystal display

1 is a layout view of a thin film transistor array panel included in a liquid crystal display according to a first exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view of a liquid crystal display including a thin film transistor array panel taken along line II-II ′ of the thin film transistor array panel of FIG. 1.

3 is an enlarged view of a portion F of FIG. 1.

4 is a partial cross-sectional view of a thin film transistor array panel included in a liquid crystal display according to a modification of the first exemplary embodiment of the present invention.

5 is a layout view of a thin film transistor array panel included in a liquid crystal display according to a second exemplary embodiment of the present invention.

FIG. 6 is an enlarged view of a portion G of FIG. 5.

7 is a partial cross-sectional view of a thin film transistor array panel included in a liquid crystal display according to a modification of the second exemplary embodiment of the present invention.

10: first insulating substrate 22: gate line

26: gate electrode 28: storage wiring

30: gate insulating film 40: semiconductor layer

55, 56: ohmic contact layer 62: data line

65 source electrode 66 drain electrode

70: shield 76: contact hole

86: pixel electrode

86_1, 86'_1, 88_1, 88'_1: first fine electrode

86_2 and 88_2: second fine electrode 86_3 and 88_3: third fine electrode

86_4, 88_4: fourth fine electrode 87: fine slit

87_1, 87'_1, 87_1, 87'_1: first fine slit

87_2, 88_2: second fine slit 87_3, 88_3: third fine slit

87_4 and 88_4: fourth fine slit 92 and 152: vertical alignment layer

95: connection pattern 100: thin film transistor array panel

110: second insulating substrate 120: black matrix

130: color filter 135: overcoat layer

140: common electrode 186, 186 ', 188, 188': notch

200: common electrode display panel 300: liquid crystal layer

310: liquid crystal

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having improved response speed of liquid crystals.

The liquid crystal display is one of the most widely used flat panel display devices. The liquid crystal display includes two substrates on which a field generating electrode such as a pixel electrode and a common electrode are formed, and a liquid crystal layer interposed therebetween. Is applied to generate an electric field in the liquid crystal layer, thereby determining the orientation of the liquid crystal in the liquid crystal layer and controlling the polarization of incident light to display an image.

Among them, the vertical alignment mode liquid crystal display in which the long axis of the liquid crystal is arranged vertically with respect to the upper and lower substrates without an electric field applied, has gained much attention due to its large contrast ratio and easy implementation of a wide reference viewing angle. Vertical alignment mode As a means for implementing a wide viewing angle in a liquid crystal display, there are a method of forming a gap in the field generating electrode and a method of forming a protrusion on the field generating electrode.

The liquid crystal display device having a gap includes a patterned vertical alignment (PVA) mode liquid crystal display device having a gap on both upper and lower substrates, and a patternless VA (patternless) in which a fine pattern is formed only on the lower substrate and no pattern is formed on the upper substrate. VA mode liquid crystal display devices, and the like, and there is an increasing demand for a patternless VA mode liquid crystal display device which is advantageous in preventing static electricity and does not cause an alignment miss.

However, the patternless VA mode liquid crystal display has a problem in that a random motion occurs and a response speed is slowed, and a declination is caused to cause instant afterimages.

Accordingly, there is a need for a liquid crystal display device having improved response speed.

An object of the present invention is to provide a liquid crystal display device having an improved response speed.

Technical problems of the present invention are not limited to the above-mentioned technical problems, other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

According to an exemplary embodiment of the present invention, a liquid crystal display device includes a first insulating substrate and a plurality of fine electrodes formed on the first insulating substrate and arranged substantially in parallel in a predetermined direction. A pixel electrode including two or more fine electrode groups, a second insulating substrate facing the first insulating substrate, a common electrode formed on the second insulating substrate and not patterned, and the first and second insulating substrates. Including a liquid crystal layer interposed therebetween, each of the fine electrode is formed with at least one notch, each fine electrode group is divided into two or more domains by the notch.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments and modifications described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments and modifications disclosed below, but may be embodied in various forms, and only the present embodiments are provided so that this disclosure will be thorough and complete in the art to which the present invention pertains. It is provided to fully inform the person skilled in the art the scope of the invention, which is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

When elements or layers are referred to as "on" or "on" of another element or layer, intervening other elements or layers as well as intervening another layer or element in between It includes everything. On the other hand, when a device is referred to as "directly on" or "directly on" indicates that no device or layer is intervened in the middle.

The spatially relative terms " below ", " beneath ", " lower ", " above ", " upper " It may be used to easily describe the correlation of a device or components with other devices or components. Spatially relative terms are to be understood as including terms in different directions of the device in use or operation in addition to the directions shown in the figures.

Hereinafter, a liquid crystal display according to a first exemplary embodiment of the present invention will be described with reference to FIGS. 1 to 3. 1 is a layout view of a thin film transistor array panel included in a liquid crystal display according to a first exemplary embodiment of the present invention. FIG. 2 is a cross-sectional view of a liquid crystal display including a thin film transistor array panel taken along line II-II ′ of the thin film transistor array panel of FIG. 1.

First, referring to FIGS. 1 and 2, the liquid crystal display of the present embodiment is interposed between the thin film transistor array panel 100, the common electrode panel 200, and the two display panels 100 and 200 disposed to face each other. Made of a liquid crystal layer 300.

The thin film transistor array panel 100 includes two or more fine electrode groups formed on the first insulating substrate 10 and composed of a plurality of fine electrodes 86_1, 86_2, 86_3, and 86_4 arranged substantially side by side in a predetermined direction. And a pixel electrode 82, and at least one notch 186 is formed in each of the fine electrodes 86_1, 86_2, 86_3, and 86_4.

Both the color filter 130 and the pixel electrode 86 may be formed in the thin film transistor array panel 100 included in the liquid crystal display of the present exemplary embodiment. The liquid crystal display according to the present exemplary embodiment has an array on color filter (AOC) structure in which a thin film transistor array such as a gate wiring is formed on the color filter 130, or a color filter on in which the color filter 130 is formed on the thin film transistor array. Array) structure, but will be described taking an AOC structure as an example.

In the thin film transistor array panel 100 of the AOC structure liquid crystal display, a black matrix 120 defining a pixel region is formed directly on the first insulating substrate 10. The black matrix 120 may be made of an opaque material such as chromium (Cr), for example, and serves to improve light quality by preventing light leakage. The black matrix 120 may be formed to overlap the gate and / or data line to maximize the aperture ratio.

Red, green, and blue color filters 130 are sequentially arranged in the pixel area defined by the black matrix 120. These color filters 130 serve to pass only light of a specific wavelength band.

The color filter 130 may be formed of a photosensitive organic material, for example, a photoresist. These color filters 130 may be formed to have the same thickness or may have a predetermined step.

An overcoat layer 135 may be formed on the color filter 130 to planarize these steps.

The gate line 22 is formed in the horizontal direction, for example on the overcoat layer 135, and the gate electrode 26 formed in the form of a processus | protrusion is formed in the gate line 22. As shown in FIG. The gate line 22 and the gate electrode 26 are called gate wirings.

In addition, the storage wiring 28 is formed on the first insulating substrate 10 and extends in the horizontal direction substantially in parallel with the gate line 22. The storage wiring 28 is formed to overlap with a part of the pixel electrode 86 to be described later in the pixel. In the present embodiment illustrated in FIG. 1, the storage wiring 28 is disposed at the center of the pixel. However, the present invention is not limited thereto, and the storage wiring 28 overlaps the pixel electrode 86 so that a constant storage capacitance is obtained. The shape and arrangement of the storage wiring 28 may be modified in various forms within a range that satisfies the conditions for forming the).

The gate wirings 22 and 26 and the storage wiring 28 include aluminum-based metals such as aluminum (Al) and aluminum alloys, silver-based metals such as silver (Ag) and silver alloys, and copper-based metals such as copper (Cu) and copper alloys. Metal, molybdenum (Mo) and molybdenum alloys such as molybdenum-based metal, it may be made of chromium (Cr), titanium (Ti), tantalum (Ta). In addition, the gate lines 22 and 26 and the storage line 28 may have a multilayer structure including two conductive layers (not shown) having different physical properties. One of the conductive films has a low resistivity metal such as aluminum-based metal, silver-based metal, or copper-based metal so as to reduce signal delay or voltage drop in the gate wirings 22 and 26 and storage wiring 28. And so on. In contrast, the other conductive layer is made of a material having excellent contact properties with other materials, particularly indium tin oxide (ITO) and indium zinc oxide (IZO), such as molybdenum-based metals, chromium, titanium, tantalum and the like. A good example of such a combination is a chromium bottom film and an aluminum top film and an aluminum bottom film and a molybdenum top film. However, the present invention is not limited thereto, and the gate wirings 22 and 26 and the storage wiring 28 may be made of various metals and conductors.

A gate insulating film 30 made of silicon nitride (SiNx), silicon oxide, or the like is formed on the gate wirings 22 and 26 and the storage wiring 28.

On the gate insulating film 30, a semiconductor layer 40 made of hydrogenated amorphous silicon, polycrystalline silicon, or the like is formed. The semiconductor layer 40 may have various shapes such as an island shape and a linear shape. For example, the semiconductor layer 40 may be formed in an island shape on the gate electrode 26 as shown in FIG. 1. In addition, in another embodiment of the present invention, when the semiconductor layer is linearly formed, the semiconductor layer may be positioned below the data line 62 and extend to the upper portion of the gate electrode 26.

On the semiconductor layer 40, ohmic contact layers 55 and 56 made of a material such as n + hydrogenated amorphous silicon doped with a high concentration of silicide or n-type impurities are formed. The ohmic contact layers 55 and 56 may have various shapes such as an island shape and a linear shape. For example, when the ohmic contact layers 55 and 56 have island shapes, the ohmic contact layers 55 and 56 may be island shapes. 56 may be located under the source electrode 65 and the drain electrode 66. In addition, in another embodiment of the present invention, when the ohmic contact layer is linear, the ohmic contact layer may be formed to extend below the data line 62.

The data line 62 and the drain electrode 66 are formed on the ohmic contact layers 55 and 56 and the gate insulating layer 30. The data line 62 extends in a second direction, for example, a vertical direction, and crosses the gate line 22 to define a pixel. A source electrode 65 extending from the data line 62 to the top of the semiconductor layer 40 in the form of a branch is formed. The drain electrode 66 is separated from the source electrode 65 and positioned above the semiconductor layer 40 so as to face the source electrode 65 with respect to the gate electrode 26. The drain electrode 66 includes a rod-shaped pattern disposed on the semiconductor layer 40 and an extension pattern extending from the rod-shaped pattern and having a large area and in which the contact hole 76 is located.

The data line 62, the source electrode 65, and the drain electrode 66 are referred to as data lines 62, 65, and 66.

The data lines 62, 65, and 66 are preferably made of refractory metals such as chromium, molybdenum-based metals, tantalum, and titanium, and include a lower layer (not shown) such as a refractory metal and an upper layer of low resistance material (not shown). It may have a multilayer film structure consisting of a). Examples of the multilayer film structure include a triple film of molybdenum film, aluminum film, and molybdenum film in addition to the above-described double film of chromium lower film and aluminum upper film or aluminum lower film and molybdenum upper film.

The source electrode 65 overlaps at least a portion of the semiconductor layer 40, and the drain electrode 66 faces the source electrode 65 around the gate electrode 26 and at least partially overlaps the semiconductor layer 40. do. Here, the ohmic contact layers 55 and 56 are interposed between the semiconductor layer 40, the source electrode 65, and the semiconductor layer 40 and the drain electrode 66 to lower contact resistance therebetween.

A passivation layer 70 made of an insulating layer is formed on the data line 62, the drain electrode 66, and the exposed semiconductor layer 40. The protective film 70 is an inorganic material made of silicon nitride or silicon oxide, an organic material having excellent planarization characteristics and photosensitivity, or a-Si: C: O formed by plasma enhanced chemical vapor deposition (PECVD). and a low dielectric constant insulating material such as a-Si: O: F. In addition, the passivation layer 70 may have a double layer structure of the lower inorganic layer and the upper organic layer in order to protect the exposed portion of the semiconductor layer 40 while maintaining excellent characteristics of the organic layer.

In the passivation layer 70, a contact hole 76 exposing the drain electrode 66 is formed.

On the passivation layer 70, a pixel electrode 86 electrically connected to the drain electrode 66 is formed through the contact hole 76 for each pixel. That is, the pixel electrode 86 is physically and electrically connected to the drain electrode 66 through the contact hole 76 to receive a data voltage from the drain electrode 66. The pixel electrode 86 is made of a transparent conductor such as indium tin oxide (ITO) or indium zinc oxide (IZO).

1 to 3, the characteristics of the pixel electrode of this embodiment will be described in detail. 3 is an enlarged view of a portion F of FIG. 1.

Referring to FIG. 1, the pixel electrode 86 of the present embodiment may be formed of, for example, four fine electrode groups. Each microelectrode group includes a plurality of microelectrodes 86_1, 86_2, 86_3 and 86_4 arranged substantially side by side in a predetermined direction, and between the plurality of microelectrodes 86_1, 86_2, 86_3 and 86_4. ) Is placed. The fine electrodes 86_1, 86_2, 86_3 and 86_4 and the fine slits 87_1, 87_2, 87_3 and 87_4 are alternately arranged. The fine electrodes 86_1, 86_2, 86_3 and 86_4 may have a bar shape that is formed to be elongated in a predetermined direction in each of the fine electrode groups. The widths of the fine electrodes 86_1, 86_2, 86_3 and 86_4 and the fine slits 87_1, 87_2, 87_3 and 87_4 may be the same. In this case, the widths of the fine electrodes 86_1, 86_2, 86_3 and 86_4 may be 3 μm to 5 μm in consideration of high light transmittance and exposure sensitivity of the exposure machine forming the fine electrodes 86_1, 86_2, 86_3 and 86_4. The fine electrodes 86_1, 86_2, 86_3, and 86_4 of the present embodiment may all have a constant width from the center to the edge of the pixel electrode 86. The fine electrodes 86_1, 86_2, 86_3 and 86_4 and the fine slits 87_1, 87_2, 87_3 and 87_4 are arranged side by side in a predetermined direction in one microelectrode group, and the fine electrodes 86_1 and 86_2 formed in different microelectrode groups. , 86_3, 86_4) are different from each other.

At least one notch 186 is formed in each of the fine electrodes 86_1, 86_2, 86_3, and 86_4, and each of the fine electrode groups is divided into two or more domains by the notches 186.

For example, among the quadrants that divide the pixel electrode 86 into four quadrants, the first microelectrode group positioned in the upper quadrant includes a plurality of first microelectrodes 86_1 arranged side by side in the first direction. . The first direction may be substantially 45 ° with respect to the polarization axis of the polarizer (not shown) formed on the first insulating substrate 10. The first fine slits 87_1 are disposed between the plurality of first fine electrodes 86_1 formed in the first direction. The first fine electrodes 86_1 and the first fine slits 87_1 are alternately arranged to form an electric field with the common electrode (see 140 of FIG. 2) described later.

The notch 186 of the present exemplary embodiment may have a convex shape protruding from the at least one side of the first fine electrode 86_1 toward the first fine slit 87_1. The notches 186 may protrude from both sides of the first fine electrode 86_1 to face each other at the first fine slit 87_1. In this case, the notches 186 adjacent to each other are spaced apart from each other so as to be electrically connected. The shape of the notch 186 may be a polygon such as a triangle, a square, a rhombus, or a semicircle, but as long as it can form a singular point (see Q in FIG. 3) to regulate the orientation of the liquid crystal (see 310 in FIG. 2). It is not limited to such a shape.

Referring to FIG. 3, when the electric field is applied to the pixel electrode 86 and the common electrode (see 140 of FIG. 2), the initial and final arrangement of the liquid crystals (see 310 of FIG. 2) will be described. By intentionally forming a singular point Q where a director gathers in one place on the first microelectrode 86_1, a large accumulation of elastic energy of the liquid crystal positioned around the singular point Q is achieved. The head arrangement direction A is predetermined. For example, a bipolar singularity Q in which the head arrangement direction A of the liquid crystals converges is formed in a region where the notch 186 having a convex shape is formed. By determining the arrangement direction of the liquid crystals disposed in the first microelectrode group by the notch 186, the liquid crystal has a driving force in the B direction when the driving voltage is applied, and the response of the liquid crystal display device is prevented by preventing the random motion of the liquid crystal. Can improve speed. The first microelectrode group is divided into two domains when one notch 186 is formed in the first microelectrode 86_1. That is, the liquid crystal disposed in the first microelectrode group (see 310 in FIG. 2) is oriented toward the notch 186 so that the liquid crystal on the upper part of the notch 186 and the liquid crystal under the notch 186 converge in the first microelectrode group. To be oriented in different directions. Accordingly, even if the length of the first fine electrode 86_1 is long, the speed at which the liquid crystal determines the orientation when the driving voltage is applied is increased, and the response speed of the liquid crystal display is improved.

Referring to FIGS. 1 and 3 again, among the quadrants that divide the pixel electrode 86 into four quadrants, the second fine electrode groups positioned in the quadrants of the left and the upper directions are arranged in a plurality of second fine electrodes arranged side by side in the second direction. Electrode 86_2. The second direction may be substantially perpendicular to the first direction, and may be substantially 135 ° with respect to the polarization axis of the polarizer (not shown) formed on the first insulating substrate 10. The second fine slits 87_2 are disposed between the plurality of second fine electrodes 86_2.

The thin film transistor array panel 100 may further include a third fine electrode group and a fourth fine electrode group under the pixel electrode 86 of the present exemplary embodiment.

For example, the third microelectrode group may be positioned in four quadrants of the left and the lower directions among the quadrants that divide the pixel electrode 86 into four equal parts. The third fine electrode group includes a plurality of third fine electrodes 86_3 arranged side by side in the third direction. The third direction may be substantially perpendicular to the second direction, and may be substantially 225 ° with respect to the polarization axis of the polarizer (not shown) formed on the first insulating substrate 10. The third fine slits 87_3 are disposed between the adjacent third fine electrodes 86_3.

For example, the fourth microelectrode group may be positioned in the quadrants of the right and bottom of the quadrants that divide the pixel electrode 86 into four equal parts. The fourth microelectrode group includes a plurality of fourth microelectrodes 86_4 arranged side by side in the fourth direction. The fourth direction may be substantially perpendicular to the third direction and the first direction, and may be substantially 315 ° with respect to the polarization axis of the polarizer (not shown) formed on the first insulating substrate 10. The fourth fine slits 87_4 are disposed between the plurality of fourth fine electrodes 86_4 formed in the fourth microelectrode group in the fourth direction.

The notches 186 are formed on the second to fourth fine electrodes 86_2, 86_3, and 86_4 in the second to fourth fine electrode groups, similarly to the first fine electrodes 86_1, and the liquid crystal 310 is notched 186. Is oriented toward). Accordingly, each fine electrode group is divided into two domains per one notch 186. The liquid crystal 310 of the entire pixel electrode 86 is oriented in the arrow direction of FIG. 1.

The fine electrode groups adjacent to each other are connected to each other by the connection pattern 95. For example, the first microelectrode group and the second microelectrode group that are adjacent to each other may be connected to each other by a connection pattern 95 which is an extension of the first and second microelectrodes 86_1 and 86_2. The connection pattern 95 may have a zigzag shape in which the extension of the first fine electrode 86_1 and the extension of the second fine electrode 86_2 are alternately arranged. However, the connection pattern 95 of the present exemplary embodiment is not limited thereto and may have a cross shape that divides the pixel area into four parts. In this case, each fine electrode 86_1, 86_2, 86_3, 86_4 is branched in a different direction from the cross-shaped connecting pattern.

Referring to FIG. 2, a first vertical alignment layer 92 may be formed on the pixel electrode 86 and the passivation layer 70 of the present exemplary embodiment to align liquid crystals. The first vertical alignment layer 92 orients the liquid crystals 310 vertically together with the second vertical alignment layer 152. Accordingly, when the driving voltage is not applied to the liquid crystal display, a clear black color is implemented in the liquid crystal display. The first vertical alignment layer 92 may be formed of a material including, for example, polyimide as a main chain and a side chain.

A polarizing plate (not shown) may be formed on the first insulating substrate 10. In detail, the polarizer may be formed on the first insulating substrate 10 on the opposite side of the pixel electrode 86 or the like. The polarization axes of the polarizing plates formed on the first insulating substrate 10 are perpendicular to the polarization axes of the polarizing plates formed on the second insulating substrate (see 110 in FIG. 2).

The common electrode display panel 200 includes a common electrode 140 formed on the second insulating substrate 110 and not patterned, and is disposed to face the thin film transistor array panel 100. The common electrode 140 of this embodiment is not patterned. Since the process for patterning the common electrode 140 is not required in the common electrode display panel 200 according to the present exemplary embodiment, misalignment is prevented when the thin film transistor array panel 100 and the common electrode display panel 200 are assembled. It does not need to be anti-static treatment, the transmittance is high and the manufacturing cost can be reduced.

A second vertical alignment layer 152 that vertically aligns the liquid crystals 310 is formed on the common electrode 140. A spacer may be interposed between the thin film transistor array panel 100 and the common electrode panel 200 to maintain a cell gap, which is a gap between the two display panels.

On the second insulation substrate 110, a polarizer may be disposed on an opposite surface on which the common electrode 140 is formed, which is perpendicular to the polarization axis of the polarizer formed on the first insulating substrate 10.

The liquid crystal layer 300 formed from the liquid crystal 310, the UV curable monomer, and the UV curing initiator is interposed between the thin film transistor array panel 100 and the common electrode display panel 200 facing each other.

The liquid crystal 310 included in the liquid crystal layer 300 may have negative dielectric anisotropy, and may be, for example, the nematic liquid crystal 310. The UV curable monomer may be, for example, an acrylate-based monomer, the initiator for UV curing may be made of a material that can be absorbed in the UV region.

The liquid crystal 310 included in the liquid crystal layer 300 as described above is pretilted to form an angle of, for example, 88 to 90 ° with the thin film transistor array panel 100 by UV irradiation, and notches 186. Will face to the side.

A backlight assembly including a lamp is disposed under the thin film transistor array panel 100, the common electrode display panel 200, and the liquid crystal layer 300 interposed therebetween.

Hereinafter, a liquid crystal display according to a modification of the first embodiment of the present invention will be described in detail with reference to FIG. 4. 4 is a partial cross-sectional view of a thin film transistor array panel included in a liquid crystal display according to a modification of the first exemplary embodiment of the present invention. In the following embodiments and modifications, the same reference numerals are used for the same elements as those of the first embodiment of the present invention for convenience of description, and the description thereof is omitted or simplified.

Referring to FIG. 4, in the liquid crystal display of the present modification, the width of the first fine electrode 86 ′ _1 becomes narrower as it moves away from the notch 186 ′. In addition, the width of the first fine slit 87'_1 is wider as it moves away from the notch 186 '. As a result, the alignment of the liquid crystal (not shown) is more effectively regulated. Specifically, as the width of the first fine electrode 86 ′ _1 increases toward the notch 186 ′, the head arrangement direction A ′ of the liquid crystal (not shown) is directed toward the singularity Q ′ of the bipolarity. do. That is, the array driving force (B 'direction) directed toward the singular point Q' becomes larger than the case where the width of the first fine electrode 86'_1 is uniform. Therefore, the liquid crystals disposed in the first fine electrode 86 ′ _1 may be arranged in a predetermined direction within a shorter time.

The same phenomenon occurs in the second to fourth microelectrode groups including the second to fourth microelectrodes (not shown), and when the driving voltage is applied, the liquid crystal is centered on the notch 186 ′ in each microelectrode group. Arranged to converge.

Hereinafter, a liquid crystal display according to a second exemplary embodiment of the present invention will be described in detail with reference to FIGS. 5 and 6. 5 is a layout view of a thin film transistor array panel included in a liquid crystal display according to a second exemplary embodiment of the present invention. FIG. 6 is an enlarged view of a portion G of FIG. 5.

5 and 6, the liquid crystal display of the present exemplary embodiment may also be formed of, for example, first to fourth fine electrode groups that divide the pixel electrode 88 into four parts. The first to fourth fine electrode groups are arranged in parallel at angles of 45 °, 135 °, 225 °, and 315 ° with respect to the polarization axis of the polarizing plate (not shown) formed on the first insulating substrate (not shown), respectively. First to fourth fine electrodes 88_1, 88_2, 88_3, and 88_4. The first to fourth fine electrodes 88_1, 88_2, 88_3 and 88_4 are alternately arranged with the first to fourth fine slits 89_1, 89_2, 89_3 and 89_4, respectively.

The notch 188 of the present embodiment is recessed from at least one side of the first to fourth fine electrodes 88_1, 88_2, 88_3 and 88_4 toward the center of the first to fourth fine electrodes 88_1, 88_2, 88_3 and 88_4. It may be concave. The notch may have a concave shape recessed toward the center of the first to fourth micro electrodes 88_1, 88_2, 88_3, and 88_4 from both sides of the first to fourth microelectrodes 88_1, 88_2, 88_3, and 88_4. The notches 188 that face each other on the central side of the first to fourth fine electrodes 88_1, 88_2, 88_3 and 88_4 are spaced apart from each other so as to be electrically connected to each other.

Looking at the initial and final arrangement of liquid crystals (not shown) after the electric field is applied to the pixel electrode 88 and the common electrode (not shown) with reference to FIG. 6, the head of the liquid crystal is formed as the notch 188 is formed. Negative singularities P of which the array direction C partially converges and partially diverge are formed on the first fine electrode 88_1. By determining the arrangement direction of the liquid crystals arranged in the first microelectrode group by the notch 188, the liquid crystal has a driving force in the D direction when the driving voltage is applied, and the response of the liquid crystal display device is prevented by preventing the random motion of the liquid crystal. Can improve speed. The first microelectrode group is divided into two domains when one notch 188 is formed in the first microelectrode 88_1. That is, the liquid crystal disposed in the first microelectrode group is oriented in a direction opposite to the notch 188 so that the liquid crystals on the upper part of the notch 188 and the liquid crystal under the notch 188 in the first microelectrode group diverge. Is oriented. Accordingly, even if the length of the first fine electrode 88_1 is long, the speed at which the liquid crystal determines the alignment when the driving voltage is applied is increased, and the response speed of the liquid crystal display is improved.

Referring to FIG. 5, notches 188 are formed in the other microelectrode groups similarly to the first microelectrode group, and the microelectrode groups are divided into a plurality of domains, respectively. As shown in figure, it diverges from the notch 188.

In addition, the fine electrodes 88_1, 88_2, 88_3, and 88_4 may each include two or more notches 188. In this case, the concave notches 188 of the present embodiment and the convex notches of the first embodiment of the present invention (see 186 of FIG. 1) may be alternately disposed in each of the fine electrodes 88_1, 88_2, 88_3, and 88_4. have. Each fine electrode group is divided into a plurality of domains by the concave notch 188 and the convex notch. By alternately arranging the concave notch 188 and the convex notch, the head arrangement direction C of the liquid crystal molecules is previously arranged so that the head of the liquid crystal disposed at the domain boundary is directed from the negative singularity P to the bipolar singularity. You can decide. As a result, the alignment speed of the liquid crystal may be faster, and thus the response speed of the liquid crystal display may be improved.

Hereinafter, a liquid crystal display according to a modification of the second embodiment of the present invention will be described in detail with reference to FIG. 7. 7 is a partial cross-sectional view of a thin film transistor array panel included in a liquid crystal display according to a modification of the second exemplary embodiment of the present invention.

Referring to FIG. 7, in the liquid crystal display of the present modification, the width of the first fine electrode 88 ′ _1 increases as the distance from the notch 188 ′ increases. In addition, the width of the first fine slits 89'_1 becomes narrower as it moves away from the notch 188 '. As a result, the alignment of the liquid crystal (not shown) is more effectively regulated. Specifically, as the width of the first fine electrode 88 ′ _1 increases toward the notch 188 ′, the head arrangement direction C ′ of the liquid crystal is directed toward the opposite side of the negative singularity P ′. That is, the array driving force (D 'direction) directed toward the opposite side of the singular point P' becomes larger than the case where the width of the first fine electrode 88'_1 is uniform. Therefore, the liquid crystals disposed in the first fine electrode 88 ′ _1 may be arranged in a predetermined direction within a shorter time.

The same phenomenon occurs in the second to fourth microelectrode groups including the second to fourth microelectrodes (not shown), and when the driving voltage is applied, the liquid crystal is centered on the notch 188 'in each of the microelectrode groups. Arranged to diverge.

Although the embodiments and modifications of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the above embodiments and modifications, but may be manufactured in various different forms. Those skilled in the art will appreciate that it can be implemented in other specific forms without changing the technical spirit or essential features of the present invention. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

As described above, the liquid crystal display according to the exemplary embodiments may include a notch, thereby improving response speed.

Claims

A first insulating substrate;

A pixel electrode formed on the first insulating substrate, the pixel electrode including two or more fine electrode groups formed of a plurality of fine electrodes arranged substantially parallel to each other in a predetermined direction;

A second insulating substrate facing the first insulating substrate;

A common electrode formed on the second insulating substrate and not patterned; And

It includes a liquid crystal layer interposed between the first and second insulating substrate,

At least one notch is formed in each of the fine electrodes, and each of the fine electrode groups is divided into two or more domains by the notch.

According to claim 1,

Further comprising fine slits disposed between the fine electrodes,

The fine electrode and the fine slit are alternately arranged,

And the notch is a convex shape protruding from at least one side of the fine electrode toward the fine slit side or a concave shape recessed from at least one side of the fine electrode toward the central side of the fine electrode.

The method of claim 2,

The convex shape or the concave shape is a triangle.

The method of claim 2,

The notch is convex,

And the notches protrude from both sides of each of the fine electrodes to face each other at the side of the fine slit.

The method of claim 4, wherein

The width of the fine electrode decreases as the distance from the notch.

The method of claim 2,

The notch is concave,

And the notches are recessed from both sides of each of the fine electrodes toward a central side of each of the fine electrodes to face each other.

The method of claim 6,

The width of the fine electrode increases as the distance from the notch increases.

The method of claim 2,

Each microelectrode comprises at least two said notches,

And a concave notch and a convex notch are alternately disposed on each of the minute electrodes.