KR20080088205A - Method for ion implant to use plasma doping - Google Patents

Abstract

An ion implantation method using plasma doping is provided to reduce the amount of lost dopants on a surface of a polysilicon layer in a cleaning process by reducing dopant layers laminated on the surface of the polysilicon layer. A gate insulating layer(33) is formed on an upper surface of a substrate(31). A polysilicon layer is formed on an upper surface of the gate insulating layer. A first ion implantation process is performed to implant first ions into the polysilicon layer. A second ion implantation process is performed to implant second ions into the polysilicon layer. Each of the second ions has atomic weight smaller than the atomic weight of each of the first ions. The substrate includes a PMOS region and an NMOS region.

Description

Ion implantation method using plasma doping {METHOD FOR ION IMPLANT TO USE PLASMA DOPING}

1A and 1B are TEM photographs for performing beamline ion implantation and plasma doping and comparing the cleaning processes after

Figure 2 is a graph for comparing the concentration after each cleaning process progress in the beamline ion implantation and plasma doping,

3 is a coupling diagram showing the ion implantation principle,

4A to 4E are cross-sectional views illustrating a method of manufacturing a dual poly gate according to a preferred embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings.

31: Substrate

32: recess pattern

33: gate insulating film

34B: N-type polysilicon electrode

34C: P-type Polysilicon Electrode

35: mask pattern

36: dopant layer

The present invention relates to a semiconductor device manufacturing technology, and more particularly, to an ion implantation method using plasma doping.

Higher integration of semiconductor devices demands higher speeds as devices increase, and as the degree of integration increases, ion implantation using high energy and large amounts of ions is required for ion implantation to form junctions in silicon substrates. Skills needed.

Accordingly, a dual poly gate process has recently been proposed in which an N-type polysilicon film is formed in an NMOS region and a P-type polysilicon film is formed in a PMOS region, respectively. In the dual poly gate process, an N-type impurity is implanted into a polysilicon film in an NMOS region and a P-type impurity is implanted into a polysilicon film in a PMOS region to form an N-type or P-type polysilicon film, respectively, so that the gate of the NMOS region and the PMOS region is electrically It is a process to improve the mechanical characteristics.

Recently, a recess gate process for increasing a channel length by recessing a portion of a substrate in order to secure refresh characteristics has been introduced.

However, in the case of the dual poly gate process in which the recess gate is introduced, it is difficult to uniformly doping impurities to the recess region.

Accordingly, a converted process is performed in which a polysilicon film doped with N-type impurities is formed and then counter-doped by selectively implanting P-type impurities into only the polysilicon film in the PMOS region.

However, the beam line ion implantation process currently used for the converged process takes a lot of time and has a problem in that it is inferior in mass productivity.

Therefore, the plasma doping method, which is capable of implanting a large amount of ions in a short time, has been applied. In the case of plasma doping, most of the dopant is doped on the surface of the polysilicon film, and the dopants doped on the surface are diffused into the polysilicon film by a subsequent thermal process.

However, there is a problem in that dopants doped on the surface of the polysilicon film are lost in the process of stripping and cleaning the photoresist pattern used to selectively implant the PMOS region.

1A and 1B are TEM photographs for performing beamline ion implantation and plasma doping, and comparing the cleaning processes.

Referring to FIG. 1A, the surface of the polysilicon film after beamline ion implantation (a) and after the cleaning process (b) can be compared. Looking at (a) after the beamline ion implantation and (b) after the cleaning process, it can be seen that there is no loss of the dopant layer formed on the surface of the polysilicon film.

In contrast, referring to FIG. 1B, the surface of the polysilicon film after plasma doping (a) and after the cleaning process (b) can be compared. In (a) after plasma doping, a thick dopant layer is formed on the surface of the polysilicon film, but in (b) after the cleaning process, the dopant layer is reduced to about half the thickness, indicating that dopant loss occurs.

Figure 2 is a graph for comparing the concentration after each cleaning process progress in the beamline ion implantation and plasma doping.

Comparing FIG. 2, the concentration of boron is 7E21 / cm3 at 200 μs at beamline ion implantation, the concentration of boron at 8E20 / cm3 at 400 μs, and the concentration of boron at 1E21 / cm3 at 400 μs at plasma doping and 5E20 at 400 μs. It can be seen that the dopant loss occurred in plasma doping rather than beamline ion implantation at / cm3.

As described above, due to the dopant loss generated during plasma doping, the amount of dopant to be diffused into the polysilicon film during the subsequent thermal process is reduced, so that a larger amount of ion implantation is required than in the plasma doping process. Like ion implantation, there is a problem in that mass productivity is poor.

The present invention has been proposed to solve the above problems of the prior art, and an object of the present invention is to provide an ion implantation method using plasma doping which can secure mass productivity by preventing dopant loss during plasma doping.

In the ion implantation method using the plasma doping of the present invention for achieving the above object, forming a gate insulating film on a substrate, forming a polysilicon film on the gate insulating film, performing a first ion implantation into the polysilicon film And a second ion implantation into the polysilicon film using an atom having an atomic weight smaller than that of the first ion implantation.

In particular, the first ion implantation is characterized in that the lattice bond between the silicon in the polysilicon film is weakened by using atoms having a larger atomic weight than the second ion implantation.

Hereinafter, the most preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention. .

3 is a coupling diagram showing the ion implantation principle.

As shown in FIG. 3, implanting ions 12 from the top into the surface allows ions 12 to enter between bonds of the silicon 11 lattice, or to bond between the atoms of silicon 11. Collisions weaken a certain depth of lattice or collide with silicon atoms and bounce off.

By repeating this method, ions are doped to the bottom and bonded with the bonding between silicon atoms weakened by subsequent thermal processes to complete ion implantation. Therefore, ion implantation uses ions of small size and active reactivity, and in a preferred embodiment of the present invention, a beamline ion implantation process is previously performed with ions having a high atomic weight before plasma doping to weaken lattice bonding of silicon.

4A through 4E are cross-sectional views illustrating a method of manufacturing a dual poly gate according to an exemplary embodiment of the present invention.

As shown in FIG. 4A, a recess pattern 32 is formed in the cell region of the substrate 31 having the cell region and the peripheral region. Here, the peripheral region of the substrate 31 has an NMOS region and a PMOS region. In addition, the recess pattern 32 is for securing a refresh characteristic by increasing a channel length. A recess pattern 32 is formed on the substrate 31 and the mask pattern is etched on the substrate 31. It can be formed by etching a certain thickness.

Subsequently, a gate insulating film 33 is formed on the entire surface of the substrate 31 including the recess pattern 32. The gate insulating film 33 may be formed of an oxide film, and the oxide film may be a thermal oxide film or a plasma oxide film.

Next, a polysilicon film 34 is formed on the gate insulating film 33. Here, the polysilicon film 34 is used as a gate electrode, and may be formed to fill all of the recess patterns 32 and to have a predetermined thickness on the substrate 31. In particular, the polysilicon film 34 may be formed of an N-type polysilicon film to form a dual poly gate. By directly forming the N-type polysilicon film, the inside of the recess pattern 32 may have the same dopant amount as the polysilicon film 34 on the substrate 31.

Hereinafter, the polysilicon film 34 is referred to as an 'N-type polysilicon film 34'.

As shown in FIG. 4B, a mask pattern 35 is formed on the N-type polysilicon film 34 of the cell region and the peripheral region NMOS region. The mask pattern 35 is intended to be used as an ion implantation barrier in a subsequent ion implantation process. The photoresist is coated on the N-type polysilicon layer 34 and exposed and developed to form the N-type polysilicon of the peripheral PMOS region. The film 34 may be formed by patterning the film 34 to be open.

Subsequently, the first ion implantation 100 is performed on the open N-type polysilicon film 34. The first ion implantation 100 is for weakening lattice bonds between silicon in the N-type polysilicon layer 34 and may be performed by beamline ion implantation using ions having a larger atomic weight than subsequent second ion implantation.

The beamline ion implantation may be performed at an energy of 5 keV to 10 keV and a dose of 0.5E4 / cm 2 to 1.0E8 / cm 2, wherein the ions used are ions used in subsequent second ion implantation, that is, boron (B) or phosphorus ( It may be any one selected from the group of trivalent ions, pentavalent ions, combinations of trivalent and pentavalent ions, and boron compounds having an atomic weight greater than Ph). In particular, trivalent ions are aluminum (Al), gallium (Ga), indium (In), pentavalent ions are ascenic (As), boron compounds are BF ₂ , B ₂ F ₄ , B ₃ F ₆ or BH ₂ , B ₂ H ₄ may be.

As described above, when the first ion implantation 100 is performed using ions having a large atomic weight, the amount of collision that strikes the N-type polysilicon layer 34 during ion implantation is large, and energy is applied to the silicon lattice of the N-type polysilicon layer 34. And weaken the bonds between the silicon atoms.

As shown in FIG. 4C, the second ion implantation 200 is performed. The second ion injection 200 implants P-type impurities into the N-type polysilicon film 34 to counter-dope the N-type polysilicon film 34 with the P-type polysilicon film 34A. It can be performed by plasma doping. In particular, the P-type impurity may be trivalent ion, preferably boron (B).

Although the dopant layer 36 is formed on the P-type polysilicon film 34A converted by the second ion implantation 200, the bond between silicon atoms is weakened by the first ion implantation 100. Amount of P-type impurities into the N-type polysilicon film 34 by applying the second ion implantation 200 to the N-type polysilicon film 34 with a smaller atomic weight than the first ion implantation 100. Is implanted and thus the dopant layer 36 formed on the P-type polysilicon film 34A is reduced.

Therefore, even after the subsequent cleaning process, the dopant layer 36 formed on the surface of the P-type polysilicon film 34A is reduced, so that the amount of dopant that is lost is also reduced, and eventually injected into the P-type polysilicon film 34A. It is possible to increase the amount of dopant being added.

As shown in FIG. 4D, the mask pattern 35 is removed. When the mask pattern 35 is a photosensitive film, the removal may be performed by an oxygen strip.

Next, a washing process is performed. At this time, a part of the dopant layer 36 is lost on the P-type polysilicon film 34A by the cleaning process, but the amount of the P-type impurity injected into the P-type polysilicon film 34A increases. Since the dopant layer 36 itself is reduced, the amount of dopant lost by the cleaning process is also reduced, and thus the amount of dopant remaining in the P-type polysilicon film 34A can be increased.

Subsequently, heat treatment is performed on the N-type and P-type polysilicon films 34 and 34A. Here, the heat treatment is performed for the activation of the dopant, and the dopants which are mostly present on the surface during plasma doping may be diffused into the polysilicon layer.

N-type impurities may be further implanted into the N-type polysilicon film 34 before the heat treatment. In this case, the N-type impurity may be phosphorus (Ph).

As shown in Fig. 4E, the N-type and P-type polysilicon films 34, 34A are patterned to form the N-type and P-type polysilicon electrodes 34B, 34C. The dopant layer 36B is also patterned on the P-type polysilicon film 34A by patterning the N-type and P-type polysilicon films 34 and 34A.

Before patterning the N-type and P-type polysilicon films 34 and 34A, a metal conductive film may be formed on the N-type and P-type polysilicon films 34 and 34A, and a hard mask nitride film may be formed.

According to the present invention, before the plasma doping, beamline ion implantation is first performed using ions having a larger atomic weight than the ions used for plasma doping, thereby weakening lattice bonds between silicon atoms in the polysilicon film, thereby lowering the polysilicon film during plasma doping. The advantage is that the dopant can inject more.

In addition, since a larger amount of dopant is injected into the lower portion of the polysilicon layer, the dopant layer is reduced on the upper portion of the polysilicon layer, thereby reducing the amount of dopant lost by the subsequent cleaning process.

On the other hand, in the present invention, after forming the N-type polysilicon film 34, the P-type polysilicon film 34A was formed by ion implantation of P-type impurities, but the N-type polysilicon film 34 to improve device characteristics. In addition, N-type impurities may be ion implanted. In this case, N-type impurities may use pentavalent ions, and pentavalent ions may be phosphorus (Ph).

As such, although the technical idea of the present invention has been described in detail according to the above-described preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

In the ion implantation method using plasma doping according to the present invention, more dopants can be injected into the polysilicon layer during ion implantation through plasma doping, thereby reducing the dopant layer accumulated on the surface of the polysilicon layer and performing a cleaning process. The amount of dopant lost at the surface of the polysilicon film can be reduced.

Claims (12)

Forming a gate insulating film on the substrate; Forming a polysilicon film on the gate insulating film; Performing a first ion implantation on the polysilicon film; And Performing a second ion implantation into the polysilicon film using atoms having an atomic weight smaller than that of the first ion implantation Ion implantation method using plasma doping comprising a. The method of claim 1, And the substrate has an NMOS region and a PMOS region. The method of claim 1, Wherein the first ion implantation weakens lattice bonds between silicon in the polysilicon layer using atoms larger in atomic weight than the second ion implantation. The method of claim 3, The first ion implantation is performed using any one selected from the group of trivalent ions, pentavalent ions, combinations of trivalent ions and pentavalent ions and boron compounds. The method of claim 4, wherein The trivalent ion is aluminum (Al), gallium (Ga), indium (In), the pentavalent ion is acenic (As), the boron compound is BF ₂ , B ₂ F ₄ , B ₃ F ₆ or BH ₂ , B ₂ H _{4 It} is an ion implantation method using plasma doping. The method of claim 1, The first ion implantation is ion implantation method using plasma doping, characterized in that the energy of 5keV ~ 10keV, 0.5E4 / cm2 ~ 1.0E8 / cm2. The method of claim 2, The ion implantation method using plasma doping, characterized in that the NMOS region in the second ion implantation using a pentavalent ion. The method of claim 7, wherein The pentavalent ion is phosphorus (Ph) characterized in that the ion implantation method using plasma doping. The method of claim 2, The ion implantation method using plasma doping, characterized in that the PMOS region in the second ion implantation using trivalent ions. The method of claim 9, The trivalent ions are boron (B) ion implantation method using plasma doping, characterized in that. The method of claim 1, The ion implantation method using plasma doping, characterized in that the first ion implantation is performed by beamline ion implantation. The method of claim 1, The second ion implantation is ion implantation method using plasma doping, characterized in that carried out by plasma doping.

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