KR20080062647A - Thin film transistor array substrate and method for fabricating the same - Google Patents
Thin film transistor array substrate and method for fabricating the same Download PDFInfo
- Publication number
- KR20080062647A KR20080062647A KR1020060138684A KR20060138684A KR20080062647A KR 20080062647 A KR20080062647 A KR 20080062647A KR 1020060138684 A KR1020060138684 A KR 1020060138684A KR 20060138684 A KR20060138684 A KR 20060138684A KR 20080062647 A KR20080062647 A KR 20080062647A
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- South Korea
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- 239000000758 substrate Substances 0.000 title claims abstract description 55
- 239000010409 thin film Substances 0.000 title claims description 40
- 238000000034 method Methods 0.000 title claims description 27
- 239000004065 semiconductor Substances 0.000 claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 claims abstract description 8
- 238000002161 passivation Methods 0.000 claims description 29
- 239000011810 insulating material Substances 0.000 claims description 15
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 239000010408 film Substances 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 8
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 claims description 5
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 5
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 4
- 244000126211 Hericium coralloides Species 0.000 claims description 2
- 239000004973 liquid crystal related substance Substances 0.000 abstract description 10
- 230000003247 decreasing effect Effects 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 66
- 239000011241 protective layer Substances 0.000 description 9
- 229910052750 molybdenum Inorganic materials 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 3
- 229910052804 chromium Inorganic materials 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- -1 acryl Chemical group 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910016048 MoW Inorganic materials 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 125000000896 monocarboxylic acid group Chemical group 0.000 description 1
- 235000006408 oxalic acid Nutrition 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13458—Terminal pads
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
Abstract
Description
1 is a plan view of a thin film transistor array substrate of the prior art.
2 is a plan view of a thin film transistor array substrate according to an embodiment of the present invention.
3A and 3B are cross-sectional views cut along the portions I to I 'and II to II' of FIG.
4A and 4B are cross-sectional views of sections III to III 'and IV to IV' of FIG. 2;
5 is a cross-sectional view of a pixel electrode and a common electrode arranged to be alternated according to an exemplary embodiment of the present invention.
6A through 6E are manufacturing process diagrams of a thin film transistor array substrate according to an embodiment of the present invention.
The present invention relates to a thin film transistor array substrate and a method of manufacturing the same, and more particularly, to a thin film transistor array having a structure of increasing the contrast ratio and a method of manufacturing the same.
As the information society develops, the demand for display devices for outputting image information is diversified.PDP (Plasma Display Panel), FED (Field Emission Display), and OLED (Organic Light Emitting) are replacing the existing CRT (Cathode Ray Tube). Various flat panel display devices such as diodes have emerged.
Among the various flat panel display devices as described above, liquid crystal display devices (LCDs), which are used in various ways from mobile phone screens to large TV screens, will be referred to as the most representative flat panel display devices.
The liquid crystal display device generally includes a thin film transistor array substrate on which a thin film transistor is formed, and a color filter array substrate bonded to the thin film transistor array substrate and the liquid crystal layer with a predetermined distance therebetween.
In general, the thin film transistor array substrate includes a gate line transferring a gate signal, a data line defining a pixel region crossing the gate line, a common line formed simultaneously with the gate line, and transmitting a common voltage, and the gate A thin film transistor including a gate electrode connected to a line, a source electrode connected to the data line, and a drain electrode formed to face the source electrode, and a pixel electrode electrically connected to the thin film transistor.
The color filter array substrate includes a light blocking layer formed on the substrate to define a display area, and a color filter layer formed to cover the display area.
In the liquid crystal display having the above structure, various methods for realizing a wide viewing angle have been proposed to implement the same image even when the screen is viewed from a wider angle in order to be used as an image device such as a TV. BACKGROUND ART A liquid crystal display device forming a horizontal electric field capable of realizing a viewing angle has been widely adopted.
Next, FIG. 1A is a plan view illustrating a thin film transistor array substrate in a horizontal field type liquid crystal display, and FIG. 1B is a cross-sectional view taken along the line I to I 'of FIG. 1A.
The horizontal field type thin film transistor array substrate shown in FIGS. 1A and 1B includes a plurality of
The
The
The
The
The passivation layer 32 is formed on the entire surface of the substrate including the thin film transistor.
The
However, the horizontal field type thin film transistor array substrate according to the related art having the above configuration has the following problems.
In the contact hole region in which the pixel electrode is electrically connected to the drain electrode, rubbing is not performed properly, and thus the alignment state of the liquid crystal is changed. Accordingly, even in a black screen, leakage light generated in the contact hole region is generated. There was a problem that the contrast ratio is lowered by.
The present invention has been made to solve the above problems, and aims to prevent the contrast ratio from being lowered by minimizing the contact hole area.
In order to achieve the above object, the horizontal field-type thin film transistor array substrate according to the present invention has a structure in which the pixel electrode and the drain electrode are in direct contact with each other without a contact hole formed separately, and an organic insulating layer is formed on the pixel electrode. It has a structure to secure the aperture ratio.
In addition, in order to achieve the above object, a method of manufacturing a horizontal field type thin film transistor array substrate according to the present invention comprises the steps of forming a gate line and a data line on the substrate, the gate electrode branched from the gate line and the data line Forming a thin film transistor having a branched source electrode and a drain electrode formed to face the source electrode, forming a pixel electrode directly contacting the drain electrode, and forming a first electrode on a front surface of the substrate including the pixel electrode; Forming a passivation layer and a second passivation layer, and forming a common electrode on the second passivation layer.
Next, a horizontal field type thin film transistor array substrate according to an exemplary embodiment of the present invention will be described.
2 is a plan view of a horizontal field type thin film transistor array substrate according to an exemplary embodiment of the present invention.
3A is a cross-sectional view of the II-II 'section of FIG. 2, and FIG. 3B is a cross-sectional view of the III-III' section of FIG.
2, 3A and 3B, the horizontal field type thin film transistor array substrate according to the embodiment of the present invention, the
The gate pattern group including the
The
An
A
A
An ohmic contact layer (not shown) may be further interposed between the data pattern group and the
The ohmic contact layer may be formed of amorphous silicon doped with n-type impurities such as phosphorous, and the
The
The
The first
4A is a diagram showing a cross section of the gate pad portion, and FIG. 4B is a diagram showing a cross section of the data pad portion.
The
A
The
The
The
In this case, the
As shown in FIG. 2, the
In addition, the
A common voltage is supplied to the common electrode to rotate the liquid crystal by an electric field generated by a potential difference with the
In addition, the
In the
As shown in FIG. 2, the
In addition, the
When the
As described above, the horizontal field type thin film transistor array substrate according to the exemplary embodiment of the present invention has a feature that the common electrode is formed to overlap the data line.
In this case, a region overlapping the
The parasitic capacitance prevents the voltage charged in the
Therefore, when the second protective film is formed of an organic insulating material having a low dielectric constant, it has an effect of preventing the influence of the parasitic capacitance.
In addition, the horizontal field type thin film transistor array substrate according to the exemplary embodiment of the present invention has a structure in which the drain electrode and the pixel electrode directly contact each other, and thus there is no need to form a separate contact hole in the pixel region.
Therefore, there is an effect of preventing a defect occurring in the process of forming the contact hole, and also has an effect of preventing the contrast ratio is lowered because the liquid crystal is not properly aligned in the contact hole.
Next, a method of manufacturing a horizontal field type thin film transistor array substrate according to an embodiment of the present invention will be described.
6A through 6E are manufacturing process diagrams of a horizontal field type thin film transistor array substrate according to an exemplary embodiment of the present invention.
For convenience of explanation, the gate line, the thin film transistor, the pixel area, the data line, the gate pad part, and the data pad part are sequentially shown from the left side of the drawing.
As shown in FIG. 6A, first, a metal layer formed on the
The process of forming the gate pattern group may be formed by, for example, a photolithography method.
That is, when a photoresist is applied on the metal layer, exposed using a photomask, and subjected to a developing process, the photoresist in the exposed area is developed and removed and the lower metal layer is exposed.
After etching the exposed metal layer, a photoresist may be removed by a strip process to form a pattern.
After forming the gate pattern group, an insulating
In addition, an ohmic contact layer (not shown) may be further formed on the
Next, as shown in FIG. 6B, a second metal layer is formed on the entire surface of the substrate including the
In this case, the data pattern group and the
In addition, the
At this time, in order to simultaneously pattern the
As described above, after forming the data pattern group, as shown in FIG. 6C, a transparent conductive layer is formed on the entire surface of the substrate including the data pattern group, and then the transparent conductive layer is patterned to form the drain electrode in the pixel region. The
In this case, a transparent metal such as Indium-Tin-Oxide (ITO) or Indium-Zinc-Oxide (IZO) is mainly used as the transparent conductive layer. In order to pattern the
The
In addition, the
Next, the
In this case, the first
The first
As such, after forming the
Next, as shown in FIG. 6E, a transparent conductive layer is formed on the entire surface of the substrate including the
The
The
In this case, as described above, the
When the pixel electrode is formed in the shape of a comb, it is preferable that the comb teeth of the pixel electrode and the comb teeth of the common electrode are alternately formed.
In addition, a
The present invention described above is not limited to the above-described embodiment and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.
The horizontal field type thin film transistor array substrate according to the present invention has the following effects.
First, since the drain electrode and the pixel electrode are in direct contact, there is no need to form a contact hole in the pixel area.
If the contact holes are not formed in the pixel area as described above, defects due to problems such as holes not being formed properly in the process of forming the contact holes are prevented. It has the effect of preventing the problem from decreasing.
Second, the protective film is formed of an organic insulating material having a low dielectric constant, thereby reducing parasitic capacitance due to overlapping of the common electrode and the data line formed on the entire substrate.
Claims (16)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020060138684A KR20080062647A (en) | 2006-12-29 | 2006-12-29 | Thin film transistor array substrate and method for fabricating the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020060138684A KR20080062647A (en) | 2006-12-29 | 2006-12-29 | Thin film transistor array substrate and method for fabricating the same |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20080062647A true KR20080062647A (en) | 2008-07-03 |
Family
ID=39814757
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| KR1020060138684A KR20080062647A (en) | 2006-12-29 | 2006-12-29 | Thin film transistor array substrate and method for fabricating the same |
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| Country | Link |
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| KR (1) | KR20080062647A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010013984A2 (en) * | 2008-08-01 | 2010-02-04 | 부경디스플레이 (주) | Method and apparatus for manufacturing thin-film transistor |
| WO2010013985A2 (en) * | 2008-08-01 | 2010-02-04 | 부경디스플레이 (주) | Method and apparatus for manufacturing a thin-film transistor array substrate |
| US8767150B2 (en) | 2012-01-20 | 2014-07-01 | Samsung Display Co., Ltd. | Liquid crystal display and method of manufacturing the same |
| KR101531691B1 (en) * | 2008-08-01 | 2015-06-25 | 주식회사 무한 | Method and apparatus for febrication of thin film transistor array substrate |
| US9229275B2 (en) | 2013-09-05 | 2016-01-05 | Samsung Display Co., Ltd. | Display panel and display apparatus including the same |
-
2006
- 2006-12-29 KR KR1020060138684A patent/KR20080062647A/en not_active Application Discontinuation
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010013984A2 (en) * | 2008-08-01 | 2010-02-04 | 부경디스플레이 (주) | Method and apparatus for manufacturing thin-film transistor |
| WO2010013985A2 (en) * | 2008-08-01 | 2010-02-04 | 부경디스플레이 (주) | Method and apparatus for manufacturing a thin-film transistor array substrate |
| WO2010013984A3 (en) * | 2008-08-01 | 2010-06-10 | 제이에스라이팅(주) | Method and apparatus for manufacturing thin-film transistor |
| WO2010013985A3 (en) * | 2008-08-01 | 2010-06-10 | 부경디스플레이 (주) | Method and apparatus for manufacturing a thin-film transistor array substrate |
| CN102171605A (en) * | 2008-08-01 | 2011-08-31 | Js光源科技有限公司 | Method and apparatus for manufacturing a thin-film transistor array substrate |
| CN102177462A (en) * | 2008-08-01 | 2011-09-07 | Js光源科技有限公司 | Method and apparatus for manufacturing thin-film transistor |
| US8173457B2 (en) | 2008-08-01 | 2012-05-08 | Js Lighting Co., Ltd. | Method and apparatus for manufacturing thin-film transistor array substrate |
| US8278127B2 (en) | 2008-08-01 | 2012-10-02 | Js Lighting Co., Ltd. | Method for manufacturing a thin-film transistor using a laser |
| KR101499651B1 (en) * | 2008-08-01 | 2015-03-06 | 주식회사 무한 | Method and apparatus for febrication of thin film transistor array substrate |
| KR101531691B1 (en) * | 2008-08-01 | 2015-06-25 | 주식회사 무한 | Method and apparatus for febrication of thin film transistor array substrate |
| US8767150B2 (en) | 2012-01-20 | 2014-07-01 | Samsung Display Co., Ltd. | Liquid crystal display and method of manufacturing the same |
| US9229275B2 (en) | 2013-09-05 | 2016-01-05 | Samsung Display Co., Ltd. | Display panel and display apparatus including the same |
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