KR20080060847A - Method for detecting phase current of inverter circuit - Google Patents

Abstract

A method for detecting a phase current of an inverter circuit is provided to reduce energy loss and noise due to a current ripple by reducing current pulsation through a pattern of an SVPWM(Space Vector Pulse Width Modulation) signal and a basic voltage vector symmetrical with respect to a middle value of an SVPWM period. A method for detecting a phase current of an inverter circuit includes the steps of: determining whether an instruction voltage vector is positioned in a problem region in which currents of two different phases is not detected on a vector diagram of a reference voltage vector(S320); generating a plurality of SVPWM signals so that at least one of the SVPWM signals is divided into two pulses to detect the currents with two different phases when the indication voltage vector is positioned in the problem region(S330); and detecting the currents with two different phases applied to a load according to the generated SVPWM signals(S350,S360).

Description

Method for Detecting Phase Current of Inverter Circuit {Method for Detecting Phase Current of Inverter Circuit}

1 is a circuit diagram for phase current detection of an inverter circuit using a single current sensor according to the present invention.

FIG. 2A is a diagram showing a basic voltage vector and a phase current detected corresponding thereto in a space vector pulse width modulation control.

Figure 2b is a vector diagram showing a basic voltage vector in the space vector pulse width modulation control.

FIG. 3 is a diagram showing an SVPWM signal corresponding to a command voltage vector and an application time of each basic voltage vector in the space vector pulse width modulation control.

4A is a diagram illustrating an application time of an SVPWM signal and corresponding basic voltage vectors when two different phase currents cannot be detected.

4B is a vector diagram when it is impossible to detect currents of two different phases.

Fig. 4C is a vector diagram showing a problem area in which two different phase currents cannot be detected.

5 is a flowchart illustrating a phase current detection method of an inverter circuit using a single current sensor according to the present invention.

FIG. 6A illustrates an SVPWM signal generated by the SVPWM generation method and an application time of each basic voltage vector according to the first embodiment of the present invention.

6B is a vector diagram showing a relationship between an effective voltage vector and a command voltage vector by an SVPWM signal generated by the SVPWM generation method according to the first embodiment of the present invention.

FIG. 7A illustrates an SVPWM signal generated by the SVPWM generation method and an application time of each basic voltage vector according to the second embodiment of the present invention.

7B is a vector diagram showing a relationship between an effective voltage vector and a command voltage vector by an SVPWM signal generated by the SVPWM generation method according to the second embodiment of the present invention.

* Description of symbols on the main parts of the drawings *

10: commercial power 70: inverter switch unit

90: phase current detection unit 100: control unit

The present invention relates to a phase current detection method of a three-phase inverter circuit, and more particularly, to a phase current detection method of a three-phase inverter circuit controlled based on a phase current detected using a single current sensor.

In general, the inverter circuit is a power conversion device that converts DC power into pulse-shaped three-phase AC power (U, V, W) having an arbitrary variable frequency. Washing machines, refrigerators, air conditioners due to energy saving and ease of output control In order to drive motors used in electrical appliances, etc., their use is gradually increasing.

In general, in order to properly control a motor using the inverter circuit, a method of detecting a phase current applied to the motor and controlling the current applied to the motor according to the pulse width modulation (PWM) method is used.

Recently, a method of controlling a motor using a space vector pulse width modulation (SVWWM) method, which introduces a space vector concept and controls a current applied to a motor based on a phase current detected by a single current sensor, has been widely used. And the contents thereof are disclosed in detail in US Patent No. 5,309,349.

However, the method of controlling the motor by using the space vector pulse width modulation method is that when one or more of two effective voltage vectors for decomposing the reference voltage vector required for motor control are smaller than a predetermined size, currents of two different phases are different. There is a problem that it cannot be detected.

In this case, when the size of at least one of the effective voltage vectors is smaller than a predetermined size, it means that the application time of the effective voltage vector is small. When the application time of the effective voltage vector is small, the phase current detector in the switching state of the effective voltage vector is small. Since the minimum time for sampling the current cannot be secured, the phase current corresponding to the effective voltage vector cannot be detected.

Therefore, since all three-phase currents required for motor control cannot be obtained, motor control is not performed properly, resulting in a problem of deteriorating the stability of the system to which the motor is applied.

The present invention is to solve the above-mentioned problems of the prior art, an object of the present invention is to convert a command voltage vector for controlling a three-phase load into a plurality of effective voltage vectors applied to the switching circuit space pulse width modulation (SVPWM) In the inverter circuit of the control method, when one or more of the effective voltage vectors applied to the load control are smaller than a certain size and cannot detect two different phase currents, an equivalent signal is applied to the SVPWM signal applied to the inverter switch unit. The present invention provides a method for detecting a phase current of an inverter circuit to convert the current into a phase current.

In addition, another object of the present invention is to provide an apparatus and method for detecting a phase current of an inverter circuit which can minimize current ripple, energy loss, noise, and the like when applying the converted SVPWM signal.

In order to achieve the above object, the present invention is an inverter circuit of a space vector pulse width modulation (SVPWM) control method for converting a command voltage vector for controlling a three-phase load to a plurality of effective voltage vectors to be applied to the switching circuit, A first step of determining whether the command voltage vector is located in a problem area that is a region in which two different phase currents cannot be detected on the vector diagram of the reference voltage vector; and in the first step, the command voltage vector is located in the problem area In accordance with the second step of generating the plurality of SVPWM signal so that at least one of the plurality of SVPWM signal is divided into two pulses to detect the current of two different phases according to the plurality of SVPWM signals generated in the second step A phase current detection method of an inverter circuit comprising a third step of detecting two different phase currents applied to the load.

In addition, the problem area is characterized in that the application time of at least one of the plurality of effective voltage vectors is shorter than the current sampling time required for the phase current detection.

In addition, in the second step, a plurality of SVPWM signals are generated such that a plurality of effective voltage vectors whose application time is longer than a current sampling time and whose sum of vectors is equal to the command voltage vector are applied to the switching circuit. do.

In the second step, the two pulses are symmetrical with respect to the median of the SVPWM period.

In addition, in the second step, the two pulses are turned on at the start point and the end point of the SVPWM period, respectively, and are off when any one of the other SVPWM signals is on.

The third step may further include calculating a current of the remaining phases using the detected two-phase currents, and generating a command voltage vector having a next period based on the currents of the three phases.

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in detail.

1 is a circuit diagram for phase current detection of an inverter circuit using a single current sensor according to the present invention.

In FIG. 1, the phase current detection circuit of the inverter circuit using a single current sensor is a rectifier 20 for full-wave rectifying and outputting a commercial power source 10, and a reactor L located at a rear end of the rectifier 20 to improve power factor. 30, a switching mode power supply (SMPS) 40 connected to the rectifier 20 and outputting a reference voltage having a predetermined magnitude, and output from the rectifier 20 connected to the rectifier 20. The smoothing capacitor 60 converts the voltage into a direct current by converting the voltage into a direct current, and the three-phase alternating current (U, U) having a predetermined variable frequency through a pulse width modulation (PWM) of the direct current voltage output from the smoothing capacitor 60. V, W) to drive the motor 110, the inverter switch unit 70, and outputs the pattern of the SVPWM signal supplied to the inverter switch unit 70, the inverter switch unit 70 through the inverter driver 80 In the inverter circuit consisting of a control unit 100 for controlling the It comprises a phase current detection unit 90.

The inverter switch unit 70 connects the six switching elements Q1 to Q6 and the diode FRD with a three-phase full bridge to convert the DC voltage into three-phase AC and converts the three-phase AC into a motor ( A normal switching circuit supplied to 110 is provided.

The control unit 100 is a microprocessor that controls the on / off of the six switching elements Q1 to Q6 of the inverter switch unit 70 to generate three-phase alternating current of arbitrary voltage and arbitrary frequency.

The phase current detection unit 90 receives a voltage across the shunt resistance 90a and the shunt resistance 90a provided between the smoothing capacitor 60 and the inverter switch unit 70 and flows through the shunt resistance 90a. It includes a current detector (90b) for outputting a current and the A / D converter (90c) for converting the output of the current detector (90b) to a digital signal to pass to the control unit (100).

In the present embodiment, the control unit 100 controls the speed of the motor 110 by controlling the operation of the inverter switch unit 70 using a pulse width modulation (SVPWM) using a space vector. As it is disclosed in the cited invention, it will be briefly described.

Typically, the three-phase inverter switch unit 70 of FIG. 1 is controlled in such a manner that the other one is turned off when one of the two switching elements provided in each leg is turned on, so that the entire inverter switch unit 70 is turned off. When indicating the switching state, the state of the upper switching elements Q1, Q3, and Q5 is usually indicated by 1 or 0. In this case, 1 means that the switch is closed and energized, and 0 means that the switch is open.

When controlling in the above manner, the inverter switch unit 70 is in any one of eight states corresponding to the on / off combination of the switching elements Q1 to Q6, and the SVPWM method is in each of the eight states. The SVPWM signal is generated using the eight basic voltage vectors.

In addition, the current signal detected by the phase current detector 90 in the section to which each basic voltage vector is applied becomes the same as any one of the three-phase current flowing through the motor 110.

FIG. 2A is a diagram showing the basic voltage vector and the phase current detected by the phase current detector 90 corresponding thereto, and FIG. 2B is a vector diagram showing the basic voltage vector.

As shown in FIG. 2A, the basic voltage vector has six effective voltage vectors V1 to V6 and two zero voltage vectors V7 and V8. The zero voltage vectors V7 and V8 are respectively turned off at the upper or lower switching elements. It is (1,1,1) and (0,0,0) which are in the state and the electric current does not flow in the motor 110. FIG. At this time, the numbers in parentheses indicate the on and off states of the switching elements Q1, Q3 and Q5, respectively.

In the basic voltage vector diagram of FIG. 2B, the six effective voltage vectors V1 to V6 are arranged to have a phase difference of 60 degrees from each other, the zero voltage vectors V7 and V8 are located at their origins, and the controller 100 includes the motor 110. Given an arbitrary command voltage vector required for control, the SVPWM signal is generated such that the basic voltage vectors V1 to V8 obtained by decomposing the given command voltage vector are applied as described above.

For example, when any voltage vector Vref of FIG. 2B is given as a command voltage vector, the command voltage vector Vref is one of two neighboring effective voltage vectors V1 and V2 as shown in Equation [1]. The zero voltage vector V0 is decomposed and expressed. In other words,

Vref = β1 * V1 + β2 * V2 + β3 * V0, β1 + β2 + β3 = 1 ....... [1]

In this case, the zero voltage vector V0 in Equation [1] may be represented by a linear combination of V7 and V8 as shown in Equation [2].

V0 = β4 * V7 + β5 * V8, β4 + β5 = β3 ......... [2]

The controller 100 generates an SVPWM signal as shown in FIG. 3 to control the operation of the inverter switch unit 70 according to the command voltage vector, where A, B, and C are examples of switching elements Q1, Q3, and Q5, respectively. The order of the basic voltage vectors applied to the motor 110 when performing such modulation is the same as V8, V1, V2, V7, V2, V1, and V8, and the time when each basic voltage vector is applied is shown in FIG. Is shown.

Therefore, if the current is detected in the section to which the effective voltage vector of the basic voltage vector is applied, two different phase currents can be detected. As a result, the current of the other one phase can be calculated using the sum of three phase currents as zero. have.

However, the current sampling by the phase current detection unit 90 should be performed after a time period in which current ringing occurs after the operation of the switching element for reliable current detection. Among the basic voltage vectors applied as described above, When one or two are smaller than a predetermined size, one or two phase currents cannot be detected because the application time of the corresponding basic voltage vector is smaller than the time required for the current sampling of the phase current detector 90.

This case is shown in the SVPWM signal of FIG. 4A and the vector diagram of FIG. 4B. As shown in FIG. 4B, when the magnitude of β2 * V2, which is one of the basic voltage vectors obtained by decomposing the reference voltage vector Vref, is small, as shown in FIG. 4A, the application time of V2 is short and as a result, the phase current I _c corresponding to V2. Will not be available.

Fig. 4C shows the entire region of the basic voltage vector in which such a case occurs, and it is impossible to detect the phase current required when the command voltage vector is located in the problem area which is hatched.

Therefore, the present invention provides a novel phase current detection method to solve this problem, Figure 5 is a flow chart illustrating a phase current detection method of the inverter circuit using a single current sensor according to the present invention.

When the information on the phase current detected by the phase current detector 90 is transmitted to the controller 100, the controller 100 generates a command voltage vector for controlling the operation of the inverter switch unit 70 based on the received phase current information. (S310).

When the step S310 is completed, the control unit 100 determines whether the generated command voltage vector is located in the problem area (S320), and if it is located in the problem area, generates a modified SVPWM of the present invention, which will be described later to enable phase current detection. The SVPWM signal is generated according to the method (S330).

When the step S330 is completed, the control unit 100 transmits the generated SVPWM signal to the inverter driver 80 to control the load (S350).

On the other hand, if the command voltage vector is not located in the problem area in step S320, the control unit 100 generates an SVPWM signal according to the conventional method and returns to step S350 (S340).

After the operation S350 is completed, when the A / D converter of the phase current detector 90 transmits information on the currents of two different phases corresponding to the basic voltage vector to the controller 100 (S360), the controller 100 uses the same. By calculating the current of the remaining one phase, all information on the three-phase current is obtained (S370).

When the step S370 is completed, the control unit 100 determines whether the stop signal of the motor 110 is input, and if so, terminates the control and returns to step S310 if it is not input (S380).

Hereinafter, the modified SVPWM generation method of the present invention applied in step S330 will be described in the order of embodiment using FIGS. 6A to 7B.

FIG. 6A illustrates an SVPWM signal generated by the SVPWM generation method according to the first embodiment of the present invention. FIG. 6A illustrates an example of the SVPWM signal of FIG. 4A.

In order to increase the application time of V2, the B pulses corresponding to the control signal of the switching element Q3 are generated to be composed of two pulses symmetrical with respect to the median value of the SVPWM period (T _PWM ) and separated by ΔT.

As a result, as shown in Fig. 6A, the application time of the basic voltage vector V2 is increased to enable current sampling, while the application time of V1 is decreased and V6 is newly applied. At this time, the application time of V1, V2, and V6 are all greater than the current sampling time, so that currents of two different phases to be detected can be detected.

In the SVPWM signal generation method according to the present embodiment, even if the magnitude and direction of element vectors constituting two arbitrary vectors are different from each other, when the sum vector is the same, the two vectors are the same vector, and thus the generated SVPWM The widths of the A, B, and C pulses should be determined so that the sum of the fundamental voltage vectors applied by the signal is equal to the command voltage vector Vref.

In addition, it is preferable that ΔT is determined to be greater than or equal to the minimum time that the current signal can be detected. Of course, it can be configured differently.

Even if the SVPWM signal is generated in the manner according to the first embodiment, the voltage applied to the motor 110 is the same as the conventional method with Vref as shown in the vector diagram of FIG. It can be done.

In addition, since the pattern of the SVPWM signal generated by the present embodiment and the basic voltage vector applied thereto is symmetrical with respect to the median value of the SVPWM period (T _PWM ), the current pulsation is reduced as compared with the asymmetrical case, and as a result, the current Ripple, energy loss and noise can be reduced.

FIG. 7A illustrates an SVPWM signal generated by the SVPWM generation method according to the second embodiment of the present invention. A case in which the SVPWM signal of FIG.

In the present embodiment, the B pulses corresponding to the control signal of the Q3 switching element are composed of two pulses symmetrical to each other and ΔT separated from each other based on the median value of the SVPWM period (T _PWM ), and the two pulses are each SVPWM period Create so that it is in the ON state at the starting point and the ending point of (T _PWM ).

In this case, ΔT is preferably set to be equal to or greater than the width of the A pulse in order to prevent an area in which phase current is not detected, and if the width of the A pulse coincides with the width of the A pulse, the number of switching is reduced to reduce the loss due to the on / off switching element. There are advantages to it.

As a result, as shown in Fig. 7A, the basic voltage vector V2, which was impossible to sample current, is not applied, while the application time of V1 is increased and V3 and V6 are newly applied. At this time, the application time of V1, V3, and V6 are all larger than the current sampling time, so that currents of two different phases to be detected can be detected.

In the SVPWM signal generation method according to the present embodiment, even if the magnitude and direction of element vectors constituting two arbitrary vectors are different from each other, when the sum vector is the same, the two vectors are the same vector, and thus the generated SVPWM The widths of the A, B, and C pulses should be determined so that the sum of the fundamental voltage vectors applied by the signal is equal to the command voltage vector Vref.

In addition, the pulse widths of the A, B, and C control signals may be configured differently from the present embodiment under the condition that the sum vector of the basic voltage vectors is equal to the command voltage vector.

Even if the SVPWM signal is generated in the manner according to the second embodiment, the voltage applied to the motor 110 is the same as the conventional method with Vref as shown in the vector diagram of FIG. It can be done.

In addition, since the pattern of the SVPWM signal generated by the present embodiment and the basic voltage vector applied thereto is symmetrical with respect to the median value of the SVPWM period (T _PWM ), the current pulsation is reduced as compared with the asymmetrical case, and as a result, the current Ripple, energy loss and noise can be reduced.

As described in detail above, in the phase current detection method of the inverter circuit according to the present invention, when the command voltage vector is located in a problem region where the two-phase currents cannot be detected on the vector diagram of the reference voltage vector, a plurality of SVPWM At least one of the signals is composed of two pulses symmetrical to each other with respect to the median of the SVPWM period, and the plurality of effective voltage vectors applied to the switching circuit by the plurality of SVPWM signals have respective application times longer than the current sampling time. , By generating the SVPWM signal such that the sum of the vectors is equal to the command voltage vector, it is possible to detect currents of two different phases.

In addition, since the generated SVPWM signal and the pattern of the applied base voltage vector are symmetrical with respect to the median value of the SVPWM period, current pulsation is reduced as compared with asymmetric, resulting in current ripple and energy loss. And noise can be reduced.

Claims (6)

In an inverter circuit of a space vector pulse width modulation (SVPWM) control method, which converts a command voltage vector controlling a three-phase load into a plurality of effective voltage vectors and applies it to a switching circuit. A first step of determining whether the command voltage vector is located in a problem region that is a region in which currents of two phases different from each other in the vector diagram of the reference voltage vector are not detected; A second step of generating the plurality of SVPWM signals such that at least one of the plurality of SVPWM signals is divided into two pulses so as to detect different two-phase currents when the command voltage vector is located in the problem region in the first step; ; And And a third step of detecting two different phase currents applied to the load according to the plurality of SVPWM signals generated in the second step. The method of claim 1, And the problem area is a case where an application time of at least one of a plurality of effective voltage vectors is shorter than a current sampling time required for phase current detection. The method of claim 2, Phase current detection of an inverter circuit for generating a plurality of SVPWM signals such that a plurality of effective voltage vectors whose respective application time is longer than the current sampling time and whose sum of vectors is equal to the command voltage vector are applied to the switching circuit in the second step. Way. The method of claim 3, In the second step, the two pulses are symmetrical with respect to the intermediate value of the SVPWM period phase detection method of the inverter circuit. The method of claim 4, wherein In the second step, the two pulses are each turned on at the start point and the end point of the SVPWM cycle, and are in the off state when any one of the other SVPWM signals is on. The method of claim 5, The third step further includes the step of calculating the current of the remaining phase using the detected two-phase current, and generating a command voltage vector of the next cycle based on the current of the three phases.

Images