JP2002084760A - Output current detector for pwm inverter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an output current detector for a PWM inverter capable of contributing to reduction in the frequency of detecting DC bus-bar current. SOLUTION: A current detecting section 25 detects the current of a DC bus-bar in a PWM inverter. A PWM generating section 17 detects a three-phase voltage status indicating the switching timing of a switching element in the PWM inverter. A phase current computing section 27 determines the timing for fetching the detected current value of the DC bus-bar based on the three- phase voltage status, and computes phase current based on the fact that inner product of a phase current vector and a phase voltage vector is a DC bus-bar current value from the DC bus-bar current value and the three-phase voltage status.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an output current detecting device for a PWM inverter.

[0002]

2. Description of the Related Art Conventionally, as an output current detecting device of a PWM inverter, a device described in Japanese Patent Application Laid-Open No. 8-19263 has been reported.

This device, as shown in FIG. 5, comprises one current sensor for detecting a current (DC bus current) on the DC side of a main circuit of a PWM inverter, and immediately before and after switching of each phase switching element of the main circuit. A current change calculating unit for obtaining the change from the detection current of the current sensor, and distributing the change of the detection current for each phase according to the switching timing of each phase switching element to obtain a detection current for each phase. And a distribution unit for obtaining the same.

Here, the operation of a conventional output current detecting device for a PWM inverter will be briefly described with reference to a timing chart shown in FIG.

Generally, the phase voltage applied to the motor is 1P
All phase states are High → Low → H in the WM cycle
It changes with igh. When the voltage state of each phase changes from High to Low, the current flowing through the DC bus decreases by the phase current of the changing phase, and conversely, flows through the DC bus when the voltage state changes from Low to High. The current increases by the current of the corresponding phase.

Focusing on these points, the prior art detects the DC bus current before and after the phase voltage state changes, and calculates the phase current by obtaining the difference.

[0007]

As described above, the conventional P
The output current detection device of the WM inverter utilizes that the magnitude of the DC bus current that changes at the timing when the phase voltage state changes becomes a corresponding phase current value.

For this reason, the conventional output current detecting device for a PWM inverter has the following two problems.

(1) To calculate all three phase currents,
As shown in FIG. 6, it is necessary to detect the DC bus current at least four times in one PWM cycle.

However, the operation time of the controller for controlling the motor takes a long time (at least one cycle) in comparison with the case where a smaller number of current detections are required.

(2) As shown in FIG. 7, when the voltage command value is larger than the maximum outputtable voltage and the output voltage is saturated, unlike the case where the voltage is not saturated as shown in FIG. The state does not change (High → Low, Lo
w → High) phase voltage appears.

For this reason, the output current detecting device of the conventional PWM inverter cannot calculate the phase current.

The present invention has been made in view of the above,
An object of the present invention is to provide an output current detection device for a PWM inverter that can contribute to a reduction in the number of times a DC bus current is detected.

[0014]

According to the first aspect of the present invention,
In order to solve the above-mentioned problem, a PWM inverter that controls a motor using a value of a phase current of the motor is provided, and a current detection unit that detects a current of a DC bus of the PWM inverter;
A switching timing detecting means for detecting a three-phase voltage state indicating a switching timing of a switching element of the PWM inverter; and a timing for taking in a current value from the current detecting means based on the three-phase voltage state from the switching timing detecting means. A phase current is calculated from the current detection timing determining means and the DC bus current value and the three-phase voltage state at the current detection timing, based on the fact that the inner product of the phase current vector and the phase voltage vector is the DC bus current. And a phase current calculating means.

According to a second aspect of the present invention, in order to solve the above-mentioned problem, the current detection timing determining means includes one PWM.
In the cycle, two timings at which the three-phase voltage state becomes a non-zero voltage vector are determined, and the phase current calculating means determines the three-phase voltage state and the DC bus current at the two timings,
The gist is to calculate the three-phase current.

According to a third aspect of the present invention, in order to solve the above-mentioned problem, the phase current calculating means includes a phase current obtained from a DC bus current at the time of outputting two types of non-zero voltage vectors in the first half of a PWM cycle; The gist is that the average value of the phase current obtained from the DC bus current at the time of outputting the two types of non-zero voltage vectors in the latter half of the cycle is the final phase current value.

[0017]

According to the first aspect of the present invention, PWM is provided.
The current of the DC bus of the inverter is detected, the three-phase voltage state indicating the switching timing of the switching element of the PWM inverter is detected, and based on the three-phase voltage state,
Determine the timing of taking in the detected DC bus current value, and determine from the DC bus current value and the three-phase voltage state at the current detection timing that the inner product of the phase current vector and the phase voltage vector is the DC bus current. By calculating the phase current based on this, the phase current can be obtained from the current value of the DC bus when the PWM voltage command value is a non-zero voltage vector.

As a result, 2 which always exists in one PWM cycle
Since all the phase currents can be obtained at the time of outputting different kinds of non-zero voltage vectors, it is possible to contribute to a reduction in the number of times of detecting the DC bus current.

According to the present invention described in claim 2, 1
By determining two timings at which the three-phase voltage state becomes a non-zero voltage vector in the PWM cycle, and calculating the three-phase current based on the three-phase voltage state and the DC bus current at these two timings, the DC bus This can contribute to a reduction in the number of times of current detection.

According to the third aspect of the present invention, P
Average value of the phase current obtained from the DC bus current when two types of non-zero voltage vectors are output in the first half of the WM cycle and the phase current obtained from the DC bus current when two types of non-zero voltage vectors are output in the second half of the PWM cycle Is the final phase current value, it is possible to contribute to a reduction in the number of times of detection of the DC bus current.

[0021]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 1 is a diagram showing a system configuration to which an output current detecting device of a PWM inverter 11 according to a first embodiment of the present invention is applied.

The current control unit 15 calculates a voltage command value (first voltage command value) based on a current command value given from the outside and a detected value of a phase current of the motor 13 to perform PWM.
Output to the generation unit 17.

The PWM generator 17 generates a PWM pulse from the voltage command value from the current controller 15 and outputs the PWM pulse to the three-phase bridge circuit 19.

The battery 21 supplies DC power to both power supply terminals of the three-phase bridge circuit 19, and a capacitor 23 for stabilizing the DC voltage is connected in parallel with the battery 21. The three-phase bridge circuit 19 has a PW
PWM represented by ON / OFF signal from M generation unit 17
The power element is switched based on the pulse.

The current detector 25 is connected between the positive terminal of the battery 21 and the positive terminal of the three-phase bridge circuit 19, and detects the current of the DC bus.

The phase current calculation unit 27 determines the timing for taking in the detected DC bus current value based on the three-phase voltage state of the PWM signal from the PWM generation unit 17, and determines the DC bus current at the current detection timing. From the value and the three-phase voltage state, the phase current is calculated based on the fact that the inner product of the phase current vector and the phase voltage vector is the DC bus current.

Next, the relationship between the voltage vector and the value of the DC bus current will be described with reference to FIG.

In the three-phase PWM inverter 11,
Since the output voltage may be 0 or 1 for each phase, there are a total of 2 ³ = 8 combinations. All this 8
Output voltage combinations and the DC bus current I at that time
The relationship of dc is as shown in FIG.

Generally, two types of voltage vectors, V0 voltage vector and V
In the case of the seven-voltage vector, the DC bus current becomes 0, so that information on the phase current does not appear in the DC bus current in this state.

However, in the case of the remaining six voltage vectors, the DC bus current contains information on the phase current. For example, when the U-phase voltage is 1 and the voltages of the other phases are 0 as in the V1 vector, the DC bus current is the U-phase current i.
A current equal to u is flowing. The case of another voltage vector is as shown in FIG.

Next, an output voltage vector in one PWM cycle will be described with reference to a timing chart shown in FIG. The timing chart shown in FIG.
The relationship between the PWM pulse and the DC bus current in one PWM cycle is shown.

In the timing chart shown in FIG. 3, the output voltage vector is V7 → V2 → V1 → V0 → V1 →
Appears in the order of V2 → V7. Therefore, typical examples of output patterns of the output voltage vector in one PWM cycle are listed below.

[0034]

## EQU00001 ## Case 1: V7.fwdarw.V2.fwdarw.V1.fwdarw.V0.fwdarw.V2.fwdarw.V7 Case 2: V7.fwdarw.V4.fwdarw.V3.fwdarw.V0.fwdarw.V3.fwdarw.V4.fwdarw.V7 It can be seen that two types of voltage vectors that are not zero voltage vectors (hereinafter referred to as non-zero voltage vectors) are output in one PWM cycle.

The above example is a case where the output voltage is not saturated. However, even when the output voltage is saturated, only the zero voltage vector V0 or V7 is not output, and one PWM cycle is not performed. Always output two types of non-zero voltage vectors.

Corresponding to the representative examples of the above two output patterns, the current values appearing in the DC bus current Idc when outputting the non-zero voltage vector in each case are shown with reference to FIG.

## EQU2 ## Case 1 ... iu, iu + iv Case 2 ... iv, iv + iw

The sum of the three phase currents is iu + iv + iw
= 0.

Accordingly, in all cases, it can be seen that all three phase currents can be calculated from the DC bus current at the time of outputting the non-zero voltage vector in one PWM cycle.

Next, the phase current is expressed by an equation using the output voltage and the DC bus current.

Idc = Vu * iu + Vv * iv + Vw * iw (1) It can be seen that the relationship between the voltage vector and the value of the DC bus current shown in FIG. 2 is expressed by equation (1).

Next, the operation of the phase current calculator shown in FIG. 1 will be described with reference to the timing chart shown in FIG.

The current detection timing is when the three-phase voltage state is a High state or a state (non-zero voltage vector) other than the low state (zero voltage vector). Further, the phase current calculation unit 27 calculates the three-phase currents iu, iv, and iw based on the three-phase voltage state and the DC bus current at the timing when the non-zero voltage vector is reached.

[0042]

(Equation 4) Here, Vu, Vv, and Vw are U,
Indicates the voltage state of the V and W phases, and 1 if High and Low
Then, it is set to 0. Further, iu, iv, and iw represent U, V, and W phase currents of the motor 13 to be obtained. In addition, Idc
Is the current detection value of the DC bus. Further, t1 and t2 shown in parentheses of each symbol represent a certain time during which two types of non-zero voltage vectors existing in one PWM cycle are output.

Here, the output voltage is changed from the zero voltage vector V7 at time t1 to the first kind of non-zero voltage vector V2.
Changes to After changing to the non-zero voltage vector V2, the phase current calculation unit 27 reads the DC bus current (Idc1) from the current detection unit 25. Next, at time t2, the output voltage changes from the first non-zero voltage vector V2 to the second non-zero voltage vector V1. Non-zero voltage vector V1
After that, the phase current calculation unit 27
From the DC bus current (Idc2).

From the above voltage vector and the DC voltage detected at that time, Idc1 = iu + iv Idc2 = iu based on equation (1). Idc2, and iw becomes iw = -Idc1 from iw = -iu-iv.

As described above, all phase currents can be obtained based on the DC bus currents at the time of output of two types of non-zero voltage vectors that always exist in one PWM cycle. Therefore,
The DC bus current need only be detected twice in one PWM cycle. Further, even when the voltage is saturated, the phase current can be obtained without any problem.

Further, the current of the DC bus of the PWM inverter is detected, a three-phase voltage state indicating the switching timing of the switching element of the PWM inverter is detected, and the detected DC bus current value is determined based on the three-phase voltage state. The phase current is calculated from the DC bus current value and the three-phase voltage state at the current detection timing based on the fact that the inner product of the phase current vector and the phase voltage vector is the DC bus current. By doing, PW
The phase current can be obtained from the current value of the DC bus when the command value of the M voltage is a non-zero voltage vector.

Further, the phase current calculation unit 37 determines whether or not all the phase voltages are in the High state or the Low state (zero voltage vector) among the four types of phase voltage states in which the PWM voltage exists within one PWM cycle. Current detection value Idc in state (two non-zero voltage vectors existing in one PWM cycle)
(T1) and Idc (t2) are detected,

(Equation 5) Since the three-phase currents iu, iv, and iw are calculated based on the equation (2), twice (t1,
All phase voltages can be obtained only by detecting the DC bus current for t2).

That is, based on the correspondence between the three-phase voltage state and the magnitude of the phase current appearing in the DC bus current, the phase current is calculated from the three-phase voltage state in which the information on the phase current appears and the DC bus current at that time. As a result, it is possible to reduce the number of times of current detection as compared with the method of obtaining the voltage state change of each phase and the change amount of the DC bus current in the first and second embodiments.

(Second Embodiment) FIG. 4 is a diagram showing a system configuration to which an output current detection device for a PWM inverter 31 according to a second embodiment of the present invention is applied.

In the first embodiment, the PWM generator 17
The configuration is such that the phase voltage state is obtained from the PWM signal output from the. On the other hand, in the present embodiment, the voltage detection unit 35 that detects the actual phase voltage output from the three-phase bridge circuit 19 to the motor 13 is provided, and the detected value of the phase voltage detected by the voltage detection unit 35 The detection value of the DC bus current is input to the phase current calculation unit 37.

In this embodiment, as in the first embodiment, all the phase currents can be obtained from the DC bus currents at the time of outputting two types of non-zero voltage vectors that always exist in one PWM cycle.

As a result, as compared with the first embodiment, the actual phase voltage output from the three-phase bridge circuit 19 to the motor 13 is detected by the voltage detector 35, so that the three-phase voltage state is switched. Can be accurately detected, and the phase current can be more accurately obtained from the DC bus current.

As described above, the current of the DC bus of the PWM inverter is detected, the three-phase voltage state indicating the switching timing of the switching element of the PWM inverter is directly detected from the input terminal of the motor, and based on the three-phase voltage state. Then, the timing for taking in the detected DC bus current value is determined, and from the DC bus current value and the three-phase voltage state at the current detection timing, the inner product of the phase current vector and the phase voltage vector is the DC bus current. By calculating the phase current based on the above, the phase current can be obtained from the current value of the DC bus when the PWM voltage command value is a non-zero voltage vector.

(Third Embodiment) An output current detecting device for a PWM inverter according to a third embodiment of the present invention
It is applicable to the system configuration shown in FIG. 1 or FIG.

The feature of this embodiment is that the phase current calculation unit 2
7, 37 are phase currents Idc (t1) obtained from the DC bus currents at the time of outputting two types of non-zero voltage vectors in the first half of the PWM cycle.
And outputting the average value of the phase current Idc (t2) obtained from the DC bus current at the time of outputting the two types of non-zero voltage vectors in the latter half of the PWM cycle to the current control unit 15 as the final phase current value. .

That is, in the phase current calculation units 27 and 37,
Based on the phase current Idc (t1) and the phase current Idc (t2), the average value Iadc of the phase current values is

## EQU6 ## It is obtained from Iadc = {Idc (t1) + Idc (t2)} / 2. Then, the average value Iadc of the phase current value is output to the current control unit 15.

As described above, the phase current Idc (t1) obtained from the DC bus current when two types of non-zero voltage vectors are output in the first half of the PWM cycle, and the phase current Idc (t1) when two types of non-zero voltage vectors are output in the latter half of the PWM cycle. The phase current Idc (t
2) as the final phase current value and the current control unit 1
5 can contribute to a reduction in the number of times the DC bus current is detected.

[Brief description of the drawings]

FIG. 1 is a diagram showing a system configuration to which an output current detection device of a PWM inverter 11 according to a first embodiment of the present invention is applied.

FIG. 2 is a table showing a relationship between a voltage vector and a value of a DC bus current.

FIG. 3 is a timing chart for explaining an operation of the PWM inverter.

FIG. 4 is a diagram showing a system configuration to which an output current detection device of a PWM inverter 31 according to a second embodiment of the present invention is applied.

FIG. 5 is a diagram showing a conventional PWM inverter.

FIG. 6 is a timing chart for explaining a normal operation of a conventional PWM inverter.

FIG. 7 is a timing chart for explaining an operation of a conventional PWM inverter at the time of saturation.

[Explanation of symbols]

 13 Motor 15 Current control unit 17 PWM generation unit 19 Three-phase bridge circuit 21 Battery 23 Capacitor 25 Current detection unit 27 Phase current calculation unit

Claims (3)

[Claims] 1. A PWM inverter for controlling a motor by using a value of a phase current of the motor, wherein the current detecting means detects a current of a DC bus of the PWM inverter; and 3 represents a switching timing of a switching element of the PWM inverter. Switching timing detecting means for detecting a phase voltage state; current detecting timing determining means for determining a timing for taking in a current value from the current detecting means based on the three-phase voltage state from the switching timing detecting means; And a phase current calculating means for calculating a phase current based on the DC bus current value and the three-phase voltage state based on the fact that the inner product of the phase current vector and the phase voltage vector is the DC bus current. An output current detection device for a PWM inverter. 2. The current detection timing determination means determines two timings at which a three-phase voltage state becomes a non-zero voltage vector in one PWM cycle, and the phase current calculation means determines a three-phase voltage at these two timings. The output current detection device for a PWM inverter according to claim 1, wherein a three-phase current is calculated based on the state and the DC bus current. 3. The phase current calculating means includes: a phase current obtained from a DC bus current when two types of non-zero voltage vectors are output in the first half of a PWM cycle; and a phase current when two types of non-zero voltage vectors are output in the second half of a PWM cycle. 3. The output current detection device for a PWM inverter according to claim 1, wherein an average value of the phase current obtained from the DC bus current and a phase current is used as a final phase current value.