KR20080057922A - Liquid crystal display and driving method thereof - Google Patents

Abstract

An LCD(Liquid Crystal Display) device and a driving method thereof are provided to reduce power consumption of a data drive IC(Integrated Circuit) by minimizing flickers in vertical and horizontal directions. An LCD(Liquid Crystal Display) device includes an LCD panel(44), and data and gate drivers(42,43). The LCD panel includes data lines for supplying data voltages, gate lines for supplying scan pulses, liquid crystal cells defined by the data and gate lines, and TFTs(Thin Film Transistor) for supplying the data voltages to the liquid crystal cells in response to the scan pulses. The data driver supplies the data voltages to the data lines and maintains polarity of the data voltages during a frame period. The gate driver sequentially supplies the scan pulses to the scan lines. Polarities of voltages supplied to the liquid crystal cells are different from each other in vertical and horizontal directions of the LCD panel. An inverted interval of the polarity of data voltages in the vertical direction is larger than that of the data voltages in the horizontal direction.

Description

Liquid crystal display and its driving method {LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF}

1 is a view schematically showing the data polarity of a liquid crystal panel driven in a one dot inversion scheme.

2 is a diagram illustrating an end screen of an operating system.

FIG. 3 is a diagram illustrating data display of a background screen and its polarity in FIG. 2; FIG.

4 is a waveform diagram for explaining a flicker phenomenon.

5 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 6 is a diagram illustrating a polarity of a part of a pixel array and a data voltage supplied to a pixel array during an Nth frame period according to an exemplary embodiment of the present invention.

FIG. 7 is a diagram illustrating a polarity of a part of a pixel array and a data voltage supplied to a pixel array during an N + 1th frame period according to an exemplary embodiment of the present invention. FIG.

FIG. 8 is a waveform diagram illustrating a data voltage and a scan pulse supplied to the pixel array shown in FIGS. 6 and 7.

FIG. 9 is a view showing a data driving circuit and a polarity control signal shown in FIG. 5; FIG.

<Description of Symbols for Main Parts of Drawings>

41: timing controller 42: data drive circuit

43: gate driving circuit 44: liquid crystal display panel

101: shift register 102: latch

103: digital-to-analog converter 104: output circuit

106: register

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a driving method thereof for improving display quality and reducing power consumption and heat generation of a data drive integrated circuit.

The liquid crystal display device displays an image by adjusting light transmittance of liquid crystal cells according to a video signal. In an active matrix type liquid crystal display, switching elements are formed in each liquid crystal cell, which is advantageous for displaying a moving image. As the switching device, a thin film transistor (hereinafter referred to as "TFT") is mainly used.

The LCD is driven in an inversion manner to reduce flicker and afterimage by periodically inverting the polarity of data charged in the liquid crystal cell. The inversion method includes a line inversion method for inverting polarities of data between adjacent liquid crystal cells in a vertical line direction, a column inversion method for inverting polarities of data between adjacent liquid crystal cells in a horizontal line direction, a vertical line direction and a horizontal line direction. There is a 1 dot inversion scheme inverting the polarity of data between adjacent liquid crystal cells.

In the one-dot inversion method, as shown in FIG. 1, polarities of data supplied to adjacent liquid crystal cells in the vertical direction are opposite to each other, and polarities of data supplied to adjacent liquid crystal cells in the horizontal direction are opposite to each other. The polarity of the data is inverted every frame (Fn, Fn + 1). This one-dot inversion method is applied to almost all liquid crystal display devices commercially available as monitors or televisions because flicker is minimized in both vertical and horizontal directions.

This one dot inversion method has a problem that flicker may appear when the system displays large data in the vertical and horizontal directions. For example, when a liquid crystal display device driven by a dot inversion method is applied to a monitor of a personal computer, flicker is severely generated on the end screen of the operating system as shown in FIG. 2. In the "WINDOWS" exit screen as shown in FIG. 2, the active window has almost no flicker due to the inversion of polarities of adjacent liquid crystal cells in the vertical and horizontal directions as shown in FIG. (21) shows flicker as the data is processed with the shadow effect. In the background screen 21, data having a high gray level is supplied to only the liquid crystal cells charged with the positive voltage during the nth frame Fn, while data having a gray level of '0' is supplied to the liquid crystal cells charged with the negative voltage. Voltage is supplied. In the background screen 21, a high gradation data voltage is supplied only to the liquid crystal cells charged with the negative voltage during the n + 1 th frame Fn + 1, while gradation is applied to the liquid crystal cells charged with the positive voltage. A data voltage of '0' is supplied.

The cause of the flicker phenomenon is as follows. As shown in FIG. 4, the liquid crystal cells supplied with the positive voltage during the nth frame period Fn are charged with the positive data voltage Vdata (+) output from the data drive integrated circuit (D-IC). After that, the positive voltage Vp (+) whose absolute value is lower by ΔVp than the charging voltage is maintained due to the parasitic capacitance of the TFT. Here, Vp (+) = │Vdata (+)-Vcom│ On the other hand, the liquid crystal cells supplied with the negative voltage during the n + 1th frame period Fn + 1 have negative data output from the data drive integrated circuit. After charging by the voltage Vdata (−), the negative voltage Vp (−) whose absolute voltage is higher by ΔVp than the charging voltage is maintained by the parasitic capacitance of the signal wiring, the TFT capacitance, and the like. Here, even if the data voltage of the same gray level is supplied to the liquid crystal cell, the luminance of the liquid crystal cell is higher in the negative data voltage than in the positive data voltage.

Therefore, in the one dot inversion scheme, when only the positive data voltage is supplied to the liquid crystal cells during the nth frame period and the only negative data voltage is supplied during the n + 1th frame period, the luminance of the same gradation data is also framed. As a result, the observer may feel flickering of the screen periodically.

In addition, in the 1-dot inversion method, data voltages having polarities opposite to each other must be supplied to adjacent liquid crystal cells vertically and horizontally, so that the frequency of the control signal for controlling the polarity is high and the current consumption and heat generation amount of the data drive integrated circuit are increased. There is a high problem.

Accordingly, an object of the present invention is to provide a liquid crystal display device and a method of driving the same which improve display quality and reduce power consumption and heat generation of a data drive integrated circuit.

In order to achieve the above object, a liquid crystal display according to an exemplary embodiment of the present invention includes a plurality of data lines supplied with a data voltage, a plurality of gate lines intersecting the data lines and supplied with scan pulses, the data lines and the A liquid crystal display panel having a plurality of liquid crystal cells defined by gate lines and a plurality of TFTs supplying the data voltage to the liquid crystal cells in response to the scan pulse; A data driving circuit which supplies the data voltage to the data lines and maintains the polarity of the data voltage for one frame period; And a gate driving circuit sequentially supplying the scan pulses to the scan lines.

The polarity of the voltages supplied to the liquid crystal cells in the vertical and horizontal directions of the liquid crystal display panel is different and the interval at which the polarity of the data voltage is reversed in the horizontal direction of the liquid crystal display panel is the data voltage in the vertical direction of the liquid crystal display panel. The polarity of is greater than the inversion interval.

A method of driving a liquid crystal display according to an exemplary embodiment of the present invention includes supplying the data voltage to the data lines and maintaining the polarity of the data voltage for one frame period; And sequentially supplying the scan pulses to the scan lines.

Other objects and advantages of the present invention in addition to the above object will become apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 5 to 9.

5 shows a liquid crystal display device according to an embodiment of the present invention.

Referring to FIG. 5, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal display panel 44 in which m × n liquid crystal cells are arranged in a matrix type, and a data voltage whose polarity is inverted in a column inversion manner. Data driving circuit 42 for supplying the light beams D1 to Dm, a gate driving circuit 43 for supplying scan pulses to the gate lines G1 to Gn, a data driving circuit 42 and a gate driving circuit 43 Is provided with a timing controller 41 for controlling.

In the liquid crystal display panel 44, liquid crystal molecules are injected between two glass substrates. The m data lines D1 to Dm and the n gate lines G1 to Gn formed on the lower glass substrate of the liquid crystal display panel 44 cross each other. TFTs are connected to intersections of the data lines D1 to Dm and the gate lines G1 to Gn. Source electrodes of the TFTs are connected to the data lines D1 to Dm in a zigzag form between neighboring data lines D1 to Dm. Two TFTs for switching the data voltage supplied to each of the horizontally adjacent liquid crystal cells are turned on and off by scan pulses from different gate lines, respectively.

Storage capacitors are formed in each of the liquid crystal cells of the liquid crystal display panel 44. The storage capacitor is formed by the gate lines G1 to Gn and the pixel electrode overlapping each other with a dielectric interposed therebetween. This storage capacitor keeps the voltage of the liquid crystal cell constant.

A black matrix, a color filter, and a common electrode (not shown) are formed on the upper glass substrate of the liquid crystal display panel 44. On the other hand, the common electrode is formed on the upper glass substrate in the vertical electric field driving method such as twisted nematic (TN) mode and vertical alignment (VA) mode, such as IPS (In Plane Switching) mode and FFS (Fringe Field Switching) mode In the horizontal electric field driving method, the pixel electrode is formed on the lower glass substrate together with the pixel electrode.

On the upper glass substrate and the lower glass substrate of the liquid crystal display panel 44, a polarizing plate having an optical axis orthogonal to each other is attached, and an alignment layer for setting the pretilt angle of the liquid crystal is formed on the inner side of the liquid crystal display panel 44 in contact with the liquid crystal.

The polarities of the voltages supplied to the liquid crystal cells in the vertical and horizontal directions of the liquid crystal display panel 44 are different. The interval at which the polarity of the data voltage is reversed in the horizontal direction of the liquid crystal display panel 44 is greater than the interval at which the polarity of the data voltage is reversed in the vertical direction of the liquid crystal display panel 44.

The data drive circuit 42 is composed of a plurality of data drive integrated circuits each including a shift register, a latch, a digital-to-analog converter and an output buffer. The data driving circuit 42 latches digital video data under the control of the timing controller 41 and converts the digital video data into a positive / negative analog gamma compensation voltage to generate a positive / negative data voltage. The data driving circuit 42 supplies data voltages having the same polarity to the odd data lines D1, D3, D5, ... Dm-1 for one frame period. The data driving circuit 42 has excellent polarity of data voltages having the same polarity for one frame period and opposite polarities of the data voltages supplied to the odd data lines D1, D3, D5, ... Dm-1. Supply to the data lines D2, D4, D6, ... Dm. As a result, the data driving circuit 42 inverts the polarity of the data voltage in the column inversion scheme as shown in FIG. 11 under the control of the timing controller 41.

The gate driving circuit 43 includes a shift register, a level shifter for converting the output signal of the shift register into a swing width suitable for driving the liquid crystal cell, and an output buffer connected between the level shifter and the gate lines G1 to Gn, respectively. It consists of a plurality of gate drive integrated circuits. The gate driving circuit 43 sequentially outputs scan pulses in synchronization with the data voltages supplied to the data lines D1 to Dm. The scan pulses may be non-overlapping and may overlap with other scan pulses so that the data voltages are sufficiently charged in the liquid crystal cells Clc1 and Clc2.

The timing controller 41 receives a vertical / horizontal synchronization signal and a clock signal and receives a gate control signal GDC for controlling the gate driving circuit 43 and a data control signal DDC for controlling the data driving circuit 42. Occurs. The gate control signal GDC includes a gate start pulse (GSP), a gate shift clock signal (GSC) for driving a shift register, a gate output enable signal (GOE), and the like. . The data control signal (DDC) includes a source start pulse (GSP), a source shift clock (SSC), a source output signal (SOE), and a polarity control signal (POL). Include. The potential of the polarity control signal POL is inverted in units of one frame period.

In addition, the timing controller 41 samples the digital video data RGB and inserts dummy data X, which is not supplied to the liquid crystal cell, between the data voltages to be supplied to some data lines and supplies the data to the data driving circuit 42. do. The dummy data X is not displayed because it is not supplied to the liquid crystal cell.

The liquid crystal display according to the exemplary embodiment of the present invention maintains the same polarity of the data voltage supplied to each of the data lines for one frame period, thereby lowering the frequency of the polarity control signal POL for controlling the polarity of the data and driving the data drive. By reducing the current consumption of the integrated circuit it is possible to lower the power consumption and lower the heat generation of the data drive integrated circuit. In addition, the liquid crystal display panel 44 of the liquid crystal display according to the exemplary embodiment of the present invention has polarities reversed in units of two liquid crystal cells in the horizontal direction and polarities in units of one liquid crystal cell in the vertical direction as shown in FIGS. 9 and 10. Since the data voltage is charged in the inverted horizontal two-dot inversion method, flicker can be minimized in the horizontal and vertical directions. In particular, the liquid crystal display according to the exemplary embodiment of the present invention charges the data voltage in a horizontal two dot inversion method, and thus, even in a data pattern in which gray levels rapidly change in units of one liquid crystal cell in the horizontal and vertical directions as shown in FIGS. 2 and 3. Flicker can be minimized.

6 and 7 illustrate a portion of a pixel array of a liquid crystal display panel according to an exemplary embodiment of the present invention and polarities of data voltages supplied to the pixel array.

6 and 7, the pixel array of the present invention supplies liquid crystal cells that charge column inversion data voltages supplied from a data drive integrated circuit in a horizontal two dot inversion form, and supplies the liquid crystal cells to the liquid crystal cells. TFTs for switching the data voltage to be provided.

The liquid crystal cells are arranged on the horizontal horizontal lines HL1, HL3, ... HLn-1 and charge a data voltage from 4k (k is a positive integer less than m) + 1 data lines D1, D5. A plurality of second liquid crystals arranged in the first liquid crystal cell Clc11, the horizontal horizontal lines HL1, HL3, ... HLn-1, and charging data voltages from the 4k + 3 data lines D3 and D7 A plurality of third liquid crystal cells Clc13 disposed in the cell Clc12, the odd horizontal lines HL1, HL3, ... HLn-1 and charging data voltages from the fourth k + 4 data lines D4 and D8. And a plurality of fourth liquid crystal cells Clc14 disposed on the odd horizontal lines HL1, HL3, ... HLn-1 and charging data voltages from the fourth k + 4 data lines D4 and D8, and even horizontal lines. A plurality of fifth liquid crystal cells Clc21 and even horizontal lines HL2, HL4, arranged at (HL2, HL4, ... HLn) and charged with data voltages from the 4k + 2 data lines D2, D6. .. HLn) and from the 4k + 2 data lines D2, D6. The plurality of sixth liquid crystal cells Clc22 and the even horizontal lines HL2, HL4,... HLn charged with the terminating voltage and the data voltages charged from the 4k + 3 data lines D3 and D7 are charged. Data voltages from the fourth liquid crystal cell Clc23 and the fourth k + 1 data lines D5 and D9 disposed on the even horizontal lines HL2, HL4,... HLn except for the first data line D1. A plurality of eighth liquid crystal cell (Clc24) for charging the.

The TFTs include a plurality of first TFTs connected to the right side of the 4k + 1 data lines D1 and D5 and the pixel electrodes of the first liquid crystal cell Clc11 in the odd horizontal lines HL1, HL3, ... HLn-1. (TFT11) a plurality of agents connected to the left of the 4k + 3 data lines D3 and D7 and the pixel electrodes of the second liquid crystal cell Clc12 in the odd horizontal lines HL1, HL3, ... HLn-1. 2 TFTs connected to the left side of the 4k + 4 data lines D4 and D8 and the pixel electrodes of the third liquid crystal cell Clc13 in the odd horizontal lines HL1, HL3, ... HLn-1. Connected to the right side of the 4k + 4 data lines D4 and D8 and the pixel electrode of the fourth liquid crystal cell Clc14 in the third TFT TFT13 and the odd horizontal lines HL1, HL3, ... HLn-1 of FIG. A plurality of fourth TFTs TFT14 and even horizontal lines HL2, HL4, ... HLn to the left side of the 4k + 2 data lines D2 and D6 and the pixel electrodes of the fifth liquid crystal cell Clc21. The plurality of fifth TFTs TFT21 and even horizontal lines HL2, HL4, ... HLn to the right of the 4k + 2 data lines D2 and D6 and the pixel electrodes of the sixth liquid crystal cell Clc22. Done The number of sixth TFTs TFT22 and the even horizontal lines HL2, HL4, ... HLn are connected to the right side of the 4k + 3 data lines D3 and D7 and the pixel electrodes of the seventh liquid crystal cell Clc23. A plurality of seventh TFTs TFT23 and even horizontal lines HL2, HL4,... HLn, the left and eighth liquid crystals of the 4k + 1 data lines D5 and D9 excluding the first data line D1. A plurality of eighth TFTs TFT24 connected to the pixel electrodes of the cells Clc24 are included.

The first TFTs TFT11 are fourth k + 1 data in response to scan pulses from even gate lines G2, G4, ... Gn in odd horizontal lines HL1, HL3, ... HLn-1. The data voltages from the lines D1 and D5 are supplied to the first liquid crystal cells Clc11.

The second TFTs TFT12 are fourth k + 3 data in response to scan pulses from even gate lines G2, G4, ... Gn in odd horizontal lines HL1, HL3, ... HLn-1. The data voltages from the lines D3 and D7 are supplied to the second liquid crystal cells Clc12.

The third TFTs TFT13 are fourth k + in response to scan pulses from the odd gate lines G1, G3, ... Gn-1 at the odd horizontal lines HL1, HL3, ... HLn-1. The data voltages from the four data lines D4 and D8 are supplied to the third liquid crystal cells Clc13.

The fourth TFTs TFT14 are fourth k + 4 data in response to scan pulses from even gate lines G2, G4, ... Gn in odd horizontal lines HL1, HL3, ... HLn-1. The data voltages from the lines D4 and D8 are supplied to the fourth liquid crystal cells Clc14.

The fifth TFTs TFT21 are fourth k + 2 data lines in response to scan pulses from even gate lines G2, G4, ... Gn in even horizontal lines HL2, HL4, ... HLn. The data voltages from D2 and D6 are supplied to the fifth liquid crystal cells Clc21.

The sixth TFTs TFT22 scan from odd gate lines G3, G5, ... Gn-1 except the first gate line G1 in even horizontal lines HL2, HL4, ... HLn. In response to the pulse, the data voltages from the fourth k + 2 data lines D2 and D6 are supplied to the sixth liquid crystal cells Clc22.

The seventh TFTs TFT23 scan from odd gate lines G3, G5, ... Gn-1 except the first gate line G1 in even horizontal lines HL2, HL4, ... HLn. The data voltages from the fourth k + 3 data lines D3 and D7 are supplied to the seventh liquid crystal cells Clc23 in response to the pulse.

Eighth TFTs TFT24 scan from odd gate lines G3, G5, ... Gn-1 except for first gate line G1 in even horizontal lines HL2, HL4, ... HLn. In response to the pulse, data voltages from the 4k + 4 data lines D5 and D9 except for the first data line D1 are supplied to the eighth liquid crystal cells Clc24.

An example of the data voltages supplied to the data lines D1 to Dm is that the polarity is not changed in one frame period but is inverted in units of frame periods as shown in FIG. 8. Each of the data voltages is supplied to the data lines D1 to Dm in synchronization with the scan pulse. The polarities of the data voltages supplied to the odd data lines D1, D3, ... Dm-1 are opposite to the polarities of the data voltages supplied to the even data lines D2, D4, ... Dm. In FIG. 8, 'X' is a dummy data voltage that is not supplied to the liquid crystal cells.

The scan pulse SP may be sequentially supplied to each of the gate lines G1A to GnB in a non-overlapping manner in synchronization with the data voltage as shown in FIG. 8, and a portion of the scan pulse overlaps the preceding scan pulse to obtain a precharging effect. It may be sequentially supplied to the gate lines (G1 to Gn) in the form.

9 is a circuit diagram showing the data driving circuit 42.

Referring to FIG. 9, the data driving circuit 42 includes a plurality of data drive integrated circuits, each of which register 106 receives digital video data RGB from the timing controller 41, sequentially. A shift register 101 for generating a sampling signal, a latch 102 and a digital-to-analog converter (DAC), which are connected in a cascade between the register 106 and the data lines D1 to Dm. 103, and an output circuit 104.

The register 106 temporarily stores digital video data RGB inputted in series from the timing controller 41, and supplies the digital video data RGB to the latch 102 in parallel.

The shift register 101 shifts the source start pulse SSP from the timing controller 41 according to the source shift clock signal SSC to generate a sampling signal. In addition, the shift register 101 shifts the source start pulse SSP to transfer a carry signal to the integrated circuit of the next stage.

The latch 102 sequentially samples and latches the digital video data RGB according to the sampling signal input from the shift register 101, and then supplies the latched digital video data RGB to the DAC 104 simultaneously. .

The DAC 103 converts the digital video data RGB from the latch 102 into analog gamma compensation voltages. In addition, the DAC 103 inverts the polarity of the analog gamma compensation voltages supplied to the data lines D1 to Dm in units of one frame period in response to the polarity control signal POL from the timing controller 41.

As described above, the liquid crystal display device and the driving method thereof according to the present invention maintain the polarity of the data voltage supplied to the data lines for one frame and make the data voltage charged to the liquid crystal display panel in the form of horizontal two dot inversion. Adjust the arrangement of the TFT. As a result, the liquid crystal display device and the driving method thereof according to the present invention can minimize the flicker in the horizontal and vertical directions to improve the display quality, and also reduce the frequency of the polarity control signal and the power consumption and heat generation of the data drive integrated circuit. .

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (12)

A plurality of data lines supplied with a data voltage, a plurality of gate lines intersecting the data lines and supplied with scan pulses, a plurality of liquid crystal cells defined by the data lines and the gate lines, and responding to the scan pulses A liquid crystal display panel having a plurality of TFTs for supplying the data voltage to the liquid crystal cells; A data driving circuit which supplies the data voltage to the data lines and maintains the polarity of the data voltage for one frame period; A gate driving circuit which sequentially supplies the scan pulses to the scan lines; The polarity of the voltages supplied to the liquid crystal cells in the vertical and horizontal directions of the liquid crystal display panel is different and the interval at which the polarity of the data voltage is reversed in the horizontal direction of the liquid crystal display panel is the data voltage in the vertical direction of the liquid crystal display panel. The liquid crystal display device, characterized in that the polarity of the greater than the interval is inverted. The method of claim 1, In the horizontal direction of the liquid crystal display panel, the polarity of the data voltage is inverted by two liquid crystal cell units. The polarity of the data voltage in the vertical direction of the liquid crystal display panel is inverted by one liquid crystal cell unit. The method of claim 1, And a timing controller for supplying digital video data and dummy data not displayed on the liquid crystal display panel to the data driving circuit and controlling operation timings of the data driving circuit and the gate driving circuit. . The method of claim 3, wherein The data driving circuit, And converting the digital video data and the dummy data into an analog gamma compensation voltage to generate the data voltage and the dummy data voltage and supply the data voltage and the dummy data voltage to the data lines. The method of claim 4, wherein The data driving circuit, And inverting the polarity of the data voltage and the dummy data voltage at one frame period. The method of claim 1, The liquid crystal cells A plurality of first liquid crystal cells disposed on an odd horizontal line and charging data voltages from a 4k (k is positive integer) +1 data line; A plurality of second liquid crystal cells disposed on the odd horizontal lines and charged with data voltages from a 4k + 3 data line; A plurality of third liquid crystal cells disposed on the odd horizontal lines and charged with data voltages from a 4k + 4 data line; A plurality of fourth liquid crystal cells disposed on the odd horizontal lines and charging data voltages from the fourth k + 4 data lines; A plurality of fifth liquid crystal cells disposed on the even horizontal line and charged with data voltages from the 4k + 2 data lines; A plurality of sixth liquid crystal cells disposed on the even horizontal line and charged with data voltages from the fourth k + 2 data lines; A plurality of seventh liquid crystal cells disposed on the even horizontal line and charged with data voltages from the 4k + 3 data lines; And And a plurality of eighth liquid crystal cells disposed on the even horizontal line and charged with data voltages from the fourth k + 1 data lines except for the first data line. The method of claim 6, The TFTs, A plurality of first TFTs connected to the fourth k + 1 data lines and the pixel electrodes of the first liquid crystal cell in the odd horizontal lines; A plurality of second TFTs connected to the fourth k + 3 data lines and the pixel electrodes of the second liquid crystal cell in the odd horizontal lines; A plurality of third TFTs connected to the fourth k + 4 data lines and the pixel electrodes of the third liquid crystal cell in the odd horizontal lines; A plurality of fourth TFTs connected to the fourth k + 4 data lines and the pixel electrodes of the fourth liquid crystal cell in the odd horizontal lines; A plurality of fifth TFTs connected to the fourth k + 2 data lines and the pixel electrodes of the fifth liquid crystal cell in the even horizontal line; A plurality of sixth TFTs connected to the fourth k + 2 data lines and the pixel electrodes of the sixth liquid crystal cell in the even horizontal line; A plurality of seventh TFTs connected to the fourth k + 3 data lines and the pixel electrodes of the seventh liquid crystal cell in the even horizontal line; And And a plurality of eighth TFTs connected to the pixel electrode of the eighth liquid crystal cell and the fourth k + 1 data line except the first data line in the even horizontal line. The method of claim 7, wherein The first TFTs supply data voltages from the fourth k + 1 data lines to the first liquid crystal cells in response to a scan pulse from the even gate lines in the odd horizontal line; The second TFTs supply the data voltages from the 4k + 3 data lines to the second liquid crystal cells Clc12 in response to the scan pulses from the even gate lines at the odd horizontal lines; The third TFTs supply data voltages from the fourth k + 4 data lines to the third liquid crystal cells in response to the scan pulses from the odd gate lines in the odd horizontal lines; The fourth TFTs supply data voltages from the fourth k + 4 data lines to the fourth liquid crystal cells in response to a scan pulse from the even gate lines in the odd horizontal line; The fifth TFTs supply data voltages from the fourth k + 2 data lines to the fifth liquid crystal cells in response to a scan pulse from the even gate lines in the even horizontal line; The sixth TFTs supply the data voltages from the fourth k + 2 data lines to the sixth liquid crystal cells in response to a scan pulse from the odd gate lines except the first gate line in the even horizontal line. and; The seventh TFTs convert the data voltage from the fourth k + 3 data lines to the seventh liquid crystal cells in response to a scan pulse from the odd gate lines except the first gate line in the even horizontal line. Supplies to; The eighth TFTs receive data voltages from the fourth k + 4 data lines excluding the first data line in response to a scan pulse from the odd gate lines except the first gate line in the even horizontal line. And an eighth liquid crystal cell. A plurality of data lines supplied with a data voltage, a plurality of gate lines intersecting the data lines and supplied with scan pulses, a plurality of liquid crystal cells defined by the data lines and the gate lines, and responding to the scan pulses In the driving method of a liquid crystal display device including a liquid crystal display panel having a plurality of TFTs for supplying the data voltage to the liquid crystal cells Supplying the data voltage to the data lines and maintaining the polarity of the data voltage for one frame period; And Sequentially supplying the scan pulses to the scan lines; The polarity of the voltages supplied to the liquid crystal cells in the vertical and horizontal directions of the liquid crystal display panel is different and the interval at which the polarity of the data voltage is reversed in the horizontal direction of the liquid crystal display panel is the data voltage in the vertical direction of the liquid crystal display panel. A driving method of a liquid crystal display device, characterized in that the polarity of the larger than the interval in which the inversion. The method of claim 9, In the horizontal direction of the liquid crystal display panel, the polarity of the data voltage is inverted by two liquid crystal cell units. The polarity of the data voltage in the vertical direction of the liquid crystal display panel is inverted by one of the liquid crystal cell unit. The method of claim 9, And supplying dummy data voltages, which are not displayed on the liquid crystal display panel, to the data lines together with the data voltages. The method of claim 9, And inverting the polarity of the data voltage and the dummy data voltage at one frame period.

Images