KR20080047168A - Voltage generation circuit and liquid crystal display comprising the same - Google Patents

Abstract

A voltage generating circuit and an LCD(Liquid Crystal Display) including the same are provided to reduce the number of components and to reduce the device voltage outputted from a gate control signal regulating member by using the same chip. The first voltage generating member receives plural gate control signals, the control signal and input voltage from the outside and produces the common voltage. The second voltage generating member(730) receives plural gate control signals, the control signal and input voltage from the outside and produces the gate on voltage and gate off voltage compensated according to the change of temperature. The first voltage generating member includes a DC/DC converting member for receiving the input voltage and for producing the driving voltage and the reference voltage. A gate signal control member outputs plural gate control signals controlled according to the driving conditions. A common voltage generating member receives the control signals and generates the common voltage. A signal amplifying member amplifies the reference voltage and the common voltage.

Description

Voltage generation circuit and liquid crystal display comprising the same

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is a diagram illustrating pixels arranged in a matrix form according to an embodiment of the present invention.

3 is an internal block diagram of a first voltage generator according to an exemplary embodiment of the present invention.

4 is an internal block diagram of a second voltage generator according to an exemplary embodiment of the present invention.

5 is a circuit diagram of a temperature compensator of FIG. 4.

(Explanation of symbols for the main parts of the drawing)

300: liquid crystal panel 400L, 400R: gate driver

500: data driver 600: timing controller

700: voltage generator 710: first voltage generator

730: second voltage generator 800: gray voltage generator

The present invention relates to a voltage generation circuit and a liquid crystal display including the same, and more particularly, to a voltage generation circuit and a liquid crystal display including the same that can reduce the manufacturing cost and the variation of the output voltage.

In general, a liquid crystal display (Liquid Crystal Display) is a flat panel display device that displays an image using a liquid crystal (Liquid Crystal), is thinner and lighter than other display devices, has the advantage of low power consumption and low driving voltage There is this.

In the liquid crystal display (LCD), a liquid crystal layer is interposed between a color filter display panel on which a reference electrode and a color filter are formed, and a thin film transistor substrate on which a switching element and a pixel electrode are formed. By applying different potentials to the pixel electrode and the reference electrode, an electric field is formed to change the arrangement of the liquid crystal molecules, and thereby, the image is represented by adjusting the light transmittance.

In the liquid crystal display, a timing controller, which receives color signals or color data from a color signal source (for example, a computer or a TV), outputs a gate signal to a gate driver at a predetermined timing when supplying image data to each pixel electrode. The image data is output to the data driver. The gate driver sequentially turns on a switching element connected to the gate line by applying a gate-on voltage corresponding to the high period of the gate signal to the gate line, and at the same time, the data driving unit turns a color on the pixel row where the turned-on switching element is located. The data voltage corresponding to the data is supplied to the corresponding data line. The data voltage supplied to the data line is applied to the corresponding pixel through the turned-on switching element.

Recently, in order to reduce the number of data drivers, R, G, and B pixels are arranged in the vertical direction, and gate drivers are disposed on both sides of the liquid crystal panel. When the R, G, and B pixels are arranged in the vertical direction, the number of data wires is reduced to 1/3.

The liquid crystal display having the above structure includes a timing controller, a DC / DC converter, a common voltage generator, a gate control signal controller, a gate driver, a data driver, and a liquid crystal panel. Here, the DC / DC converter uses expensive components to compensate for the gate-on voltage Von due to temperature change, and the circuit is complicated because there are many components. In order to solve this problem, the DC / DC converter, the common voltage generator, and the gate control signal controller are configured in one chip, but external amplifiers and gate control signal controllers are required. Since the gate driver is located on both sides of the liquid crystal panel, each gate control signal adjusting unit for applying a control signal to each gate driver is required.

However, an output deviation may occur between the gate clock signal CKV1 output from the one chip and the gate clock signal CKV2 output from the gate control signal controller disposed separately from the outside, thereby causing a horizontal line defect in the liquid crystal panel. In addition, the driving voltage AVDD output from the one chip must be compensated according to the temperature change.

It is an object of the present invention to provide a voltage generation circuit that can reduce manufacturing cost and reduce variations in output voltage.

It is an object of the present invention to provide a liquid crystal display device which can reduce manufacturing cost and reduce output voltage deviation.

The technical problems of the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

The voltage generation circuit according to an embodiment of the present invention for achieving the above technical problem, the first voltage generator for generating a common voltage by receiving a plurality of gate control signals, control signals and input voltage from the outside and a plurality of from the outside And a second voltage generator configured to receive a gate control signal, a control signal, and an input voltage to generate a gate on voltage and a gate off voltage compensated according to a temperature change.

According to an exemplary embodiment of the present invention, a liquid crystal panel includes a plurality of unit pixels defined in an area where a plurality of gate lines and data lines intersect, and drives the liquid crystal panel. A timing controller configured to generate a plurality of control signals, a first voltage generator configured to receive a plurality of gate control signals and control signals from the timing controller, and receive an input voltage from an external source to generate a common voltage and the plurality of gate controls A voltage generation circuit comprising a second voltage generator configured to receive a signal, the control signal, and the input voltage to generate a gate-on voltage and a gate-off voltage compensated according to a temperature change, and receive the gate-on voltage to the gate line; The gate driver and the data line of the liquid crystal panel are sequentially applied. And a data driver for applying a voltage.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be embodied in various forms, and the present embodiments are merely provided to make the disclosure of the present invention complete and the general knowledge in the art to which the present invention belongs. It is provided to fully inform the person having the scope of the invention, the invention is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention;

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, in the liquid crystal display according to the exemplary embodiment, a gray scale connected to the liquid crystal panel 300 and the gate drivers 400L and 400R, the data driver 500, and the data driver 500 connected thereto. The voltage generator 800 includes a timing controller 600, a first voltage generator 710, and a second voltage generator 730.

The liquid crystal panel 300 is connected to a plurality of display signal lines G1-Gn and D1 -Dm as an equivalent circuit, and includes a plurality of unit pixels Px arranged in a matrix form.

Here, the display signal lines G1-Gn and D1-Dm include a plurality of gate lines G1-Gn transferring gate signals and data lines D1-Dm transferring data signals. The gate lines G1-Gn extend in the row direction and are substantially parallel to each other, and the data lines D1-Dm extend in the column direction and are substantially parallel to each other.

Although not shown, each unit pixel Px includes a switching element connected to the display signal lines G1-Gn and D1-Dm, a liquid crystal capacitor, and a storage capacitor connected thereto. The holding capacitor can be omitted as necessary.

The switching element is provided in the first display panel (not shown), and the control terminal and the input terminal thereof are connected to the gate lines G1-Gn and the data lines D1-Dm, respectively, and the output terminal is It is connected to the liquid crystal capacitor and the holding capacitor.

The liquid crystal capacitor uses the pixel electrode of the first display panel and the common electrode of the second display panel (not shown) as two terminals, and the liquid crystal layer between the two electrodes functions as a dielectric. The pixel electrode is connected to the switching element, and the common electrode is formed on the front surface of the second display panel and receives the common voltage Vcom. In addition, a common electrode may be provided in the first display panel, and both electrodes may be made in a linear or bar shape.

The storage capacitor is formed by overlapping a separate signal line (not shown) and a pixel electrode included in the first display panel, and a predetermined voltage such as a common voltage Vcom is applied to the separate signal line (independent wiring method). However, the sustain capacitor may be formed such that the pixel electrode overlaps the front end gate line directly above the insulator (shear gate method).

On the other hand, in order to implement color display, each unit pixel should be able to display color, which is possible by providing a color filter of red, green, or blue in a region corresponding to the pixel electrode. In addition, although the color filter is formed in a corresponding region of the second display panel, the color filter may be formed above or below the pixel electrode of the first display panel.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the first display panel and the second display panel of the liquid crystal panel 300.

The gray voltage generator 800 may generate two sets of gray voltages related to transmittance of a unit pixel. That is, one of the two sets is the positive voltage, and the other is the negative voltage. The positive voltage and the negative voltage mean voltages whose polarities of the data voltages are opposite to the common voltage Vcom, and are alternately provided to the liquid crystal panel during inversion driving.

The gate drivers 400L and 400R are disposed on the left and right sides of the liquid crystal panel 300, are connected to the respective gate lines G1 -Gn, and a combination of the gate on voltage Von and the gate off voltage Voff. The first and second gate clock signals CKV1 and CKV2 may be applied to the gate lines G1 to Gn. At this time, the odd-numbered gate lines G1, ..., Gn-1 are connected to the gate driver 400L, and the even-numbered gate lines G2, ..., Gn are connected to the gate driver 400R. It is preferable that there is, but is not limited thereto.

The data driver 500 is connected to the data lines D1-Dm of the liquid crystal panel 300, generates a plurality of gray voltages based on voltages provided from the gray voltage generator 800, and generates the generated gray voltages. It is selected and applied to a unit pixel as a data signal, and is usually composed of a plurality of integrated circuits.

The timing controller 600 generates control signals for controlling operations of the gate drivers 400L and 400R, the data driver 500, and the like, and outputs the corresponding control signals to the first and second voltage generators 710 and 730. And the data driver 500.

The first and second voltage generators 710 and 730 generate a plurality of driving voltages. For example, to drive the first and second gate clock signals CKV1 and CKV2, the common voltage Vcom, and the data driver 500 formed by a combination of the gate-on voltage Von and the gate-off voltage Voff. The driving voltage AVDD is generated. Here, the first and second gate clock signals CKV1 and CKV2 are the gate-on voltage Von at a high level to drive the switching element, and the gate-off voltage Voff at a low level. do. Detailed description thereof will be described with reference to FIG. 3.

Hereinafter, the display operation of the liquid crystal display will be described in more detail.

The timing controller 600 controls an RGB image signal R, G, and B and an input control signal, for example, a vertical sync signal Vsync and a horizontal sync signal, from an external graphic controller (not shown). Hsync), main clock MCLK, and data enable signal DE are provided. The timing controller 600 generates a gate control signal CONT1, a data control signal CONT2, and the like based on the input control signal and appropriately adjusts the image signals R, G, and B according to the operating conditions of the liquid crystal panel 300. After processing, the gate control signal CONT1 is provided to the first and second voltage generators 710 and 730, and the data control signal CONT2 and the processed image signals R ', G', and B 'are data. It is provided to the driver 500.

The gate control signal CONT1 may include a vertical synchronization start signal STV indicating the start of output of the gate-on voltage Von, an output enable signal OE defining a width of the gate-on voltage Von, and the like. Include.

The data control signal CONT2 is a horizontal load start signal STH indicating the start of input of the image data R ', G', and B 'and a data load signal for applying a corresponding data voltage to the data lines D1-Dm. (TP), an inversion signal (RVS) and a data clock signal that inverts the polarity of the data voltage with respect to the common voltage (Vcom) (hereinafter referred to as 'polarity of the data voltage by reducing the polarity of the data voltage for the common voltage'). (HCLK) and the like.

The data driver 500 sequentially receives the image data R ′, G ′, and B ′ corresponding to one row of unit pixels according to the data control signal CONT2 from the timing controller 600. By selecting the gray scale voltages corresponding to the image data R ', G', and B ', the image data R', G ', and B' are converted into the corresponding data voltages.

The gate drivers 400L and 400R are connected to the gate lines G1-Gn by applying the gate-on voltage Von to the gate lines G1-Gn according to the signals provided from the second voltage generator 730. Turn on the switching device.

While the gate-on voltage Von is applied to one gate line G1-Gn, and a row of switching elements connected thereto is turned on (this period is referred to as '1H' or '1 horizontal period'). ], The data driver 500 supplies each data voltage to the corresponding data lines D1-Dm. The data voltage supplied to the data lines D1-Dm is applied to the corresponding unit pixel through the turned-on switching element.

The liquid crystal molecules change their arrangement according to the electric field generated by the pixel electrode and the common electrode, and thus the polarization of light passing through the liquid crystal layer changes. This change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the first display panel and the second display panel.

In this manner, the gate-on voltages Von are sequentially applied to all the gate lines G1 -Gn during one frame to apply data voltages to all the unit pixels. When one frame ends, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each unit pixel is opposite to that of the previous frame ('frame' reversal'). In this case, the polarity of the data voltage flowing through one data line may be changed ('line inversion') or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the inversion signal RVS within one frame ( 'Dot reversal').

2 is a diagram illustrating pixels arranged in a matrix form according to an embodiment of the present invention.

Referring to FIG. 2, the pixels 310 of the liquid crystal panel 300 according to the exemplary embodiment of the present invention are arranged in a matrix form, and R pixels having the same color are arranged in the first direction of the matrix. R, G, and B pixels are repeatedly arranged in two directions. In this case, the gate lines G1 to G9 are connected to the pixels in the first direction, and the data lines D1 to D7 are connected to the pixels in the second direction. In this case, the first direction and the second direction represent a row direction and a column direction, respectively.

3 is an internal block diagram of a first voltage generator according to an embodiment of the present invention, FIG. 4 is an internal block diagram of a second voltage generator according to an embodiment of the present invention, and FIG. 5 is a temperature compensation diagram of FIG. 4. It is a negative circuit diagram.

Referring to FIG. 3, the first voltage generator 710 according to an embodiment of the present invention may include a gate control signal CONT1 provided from the timing controller 600, an input voltage Vin and a control signal provided from the outside. A plurality of voltages are output using the CTL, and include a DC / DC converter 714, a gate control signal controller 714, a common voltage generator 716, and a signal amplifier 718.

The DC / DC converter 714 generates the driving voltage AVDD and the reference voltage Vref used in the liquid crystal panel using the input voltage Vin applied from the outside. Here, the driving voltage AVDD is a supply voltage of the data driver 500, and the reference voltage Vref is a voltage required for the digital / analog converter of the data driver 500.

The gate control signal controller 714 is a gate control signal CONT1 provided from the timing controller 600, that is, the first gate clock signal CKV1, the inverted first gate clock signal CKVB1, and the gate-on voltage Von. The vertical synchronization start signal STV1 indicating the start of output of the section is adjusted and output according to the driving condition of the gate driver 400L.

The common voltage generator 716 includes a memory (not shown) and a digital / analog converter (not shown), in which an intermediate data value of n bits of data is stored in advance. The common voltage generator 716 receives the driving voltage AVDD and the control signal CTL from the outside, reads the intermediate data value stored in the memory according to the control signal CTL, and then reads the intermediate data value. Convert to the corresponding analog voltage value. Next, the analog voltage value amplified by the signal amplifier 718 is output. At this time, the amplified analog voltage value represents the common voltage Vcom.

The signal amplifier 718 amplifies the reference voltage Vref output from the DC / DC converter 714 and the common voltage Vcom output from the common voltage generator 716.

4 and 5, the second voltage generator 710 according to an embodiment of the present invention may include a gate control signal CONT1 provided from the timing controller 600 and an input voltage Vin provided from the outside. And outputs a plurality of voltages using the control signal CTL, and includes a DC / DC converter 732, a gate control signal controller 734, a common voltage generator 736, and a signal amplifier 738. do.

The DC / DC converter 732 includes a temperature compensator 742 for compensating the driving voltage AVDD according to the temperature change and provides a first feedback signal V _FB1 .

In the liquid crystal display device used in the liquid crystal display device, when the temperature of the surrounding environment increases, the efficiency of the DC / DC converter 732 increases, resulting in an increase in the driving voltage AVDD. Rising has the opposite characteristic that low driving voltage is required.

In addition, when the temperature decreases, the efficiency of the DC / DC converter 732 is lowered, thereby lowering the output driving voltage AVDD, whereas the liquid crystal itself has a characteristic that a high driving voltage is required when the temperature drops. Therefore, in the present invention, the temperature compensator 742 compensates for the driving voltage AVDD required according to the temperature characteristic of the liquid crystal. The first feedback signal V _FB1 provided to the DC / DC converter 732 is compensated for, and a second feedback signal V _FB2 is generated and provided to the DC / DC converter 732. The temperature compensator 742 has two diodes D1 and D2 connected in series as shown in FIG. 4, but is not limited thereto.

The DC / DC converter 732 receives the driving voltage AVDD compensated according to the temperature and generates a gate-on voltage Von and a gate-off voltage Voff boosted to a predetermined level. At this time, the gate off voltage Voff is a voltage shifted to a predetermined level. Here, the gate on voltage Von is a voltage for turning on the thin film transistor for driving the liquid crystal panel, and the gate off voltage Voff is a voltage for turning off the thin film transistor.

The gate control signal controller 734 is a gate control signal CONT1 provided from the timing controller 600, that is, the second gate clock signal CKV2, the inverted second gate clock signal CKVB2, and the gate on voltage Von. The vertical synchronization start signal STV2 indicating the start of output of the section is adjusted and output according to the driving condition of the gate driver 400R. For example, the gate-on voltage Von of the second gate clock signal CKV2 formed by the combination of the gate-on voltage Von and the gate-off voltage Voff is 23V, and the gate-off voltage Voff is -7V. Adjust the output.

The common voltage generator 736 includes a memory (not shown) and a digital / analog converter (not shown), in which an intermediate data value of n bits of data is stored in advance. The common voltage generator 736 receives the driving voltage AVDD and the control signal CTL from the outside, reads the intermediate data value stored in the memory according to the control signal CTL, and then reads the intermediate data value. Convert to an analog voltage value corresponding to Next, an analog voltage value amplified by the signal amplifier 738 is output. At this time, the amplified analog voltage value represents the common voltage Vcom.

The signal amplifier 738 amplifies the common voltage Vcom output from the common voltage generator 736.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, the embodiments described above are to be understood in all respects as illustrative and not restrictive.

The voltage generation circuit and the liquid crystal display including the same according to the present invention as described above can reduce the manufacturing cost by reducing the number of parts, and the variation of the output voltage output from the gate control signal controller using the same chip Can be reduced.

Claims (16)

A first voltage generator configured to receive a plurality of gate control signals, control signals, and input voltages from the outside to generate a common voltage; And And a second voltage generator configured to receive a plurality of gate control signals, control signals, and input voltages from an external source, and generate a gate on voltage and a gate off voltage compensated according to a temperature change. The method of claim 1, The first voltage generator, A DC / DC converter configured to receive the input voltage and generate a driving voltage for operating the data driver and a reference voltage for digital / analog conversion of the data driver; A gate control signal controller configured to receive the plurality of gate control signals and output a plurality of gate control signals adjusted according to driving conditions of a gate driver; A common voltage generator receiving the control signal and generating a common voltage; And And a signal amplifier configured to amplify the reference voltage and the common voltage. The method of claim 2, And the adjusted plurality of gate control signals includes a first gate clock signal, an inverted first gate clock signal, and a first vertical synchronization start signal. The method of claim 1, The second voltage generator, A DC / DC converter configured to generate a driving voltage by receiving the input voltage, and generate a gate on voltage and a gate off voltage for turning on and off a gate driver by compensating the driving voltage according to a temperature change; A gate control signal controller configured to receive the plurality of gate control signals and output a plurality of gate control signals adjusted according to driving conditions of a gate driver; A common voltage generator receiving the control signal and generating a common voltage; And And a signal amplifier configured to amplify the common voltage. The method of claim 4, wherein The DC / DC converter comprises a temperature compensation unit for compensating the driving voltage according to the temperature change. The method of claim 5, wherein The temperature compensator is a voltage generation circuit in which a plurality of diodes are connected in series. The method of claim 5, wherein And the temperature compensator is disposed outside the DC / DC converter. The method of claim 4, wherein And the adjusted plurality of gate control signals includes a second gate clock signal, an inverted second gate clock signal, and a second vertical synchronization start signal. A liquid crystal panel including a plurality of unit pixels defined in an area where a plurality of gate lines and data lines intersect; A timing controller generating a plurality of control signals for driving the liquid crystal panel; A first voltage generator configured to receive a plurality of gate control signals and control signals from the timing controller, and receive an input voltage from an external source to generate a common voltage, and provide the plurality of gate control signals, the control signal, and the input voltage A voltage generation circuit including a second voltage generator configured to receive a gate on voltage and a gate off voltage compensated according to a temperature change; A gate driver sequentially receiving the gate-on voltage and applying the gate-on voltage to the gate line; And And a data driver for applying a data voltage to a data line of the liquid crystal panel. The method of claim 9, The first voltage generator, A DC / DC converter configured to receive the input voltage and generate a driving voltage for operating a data driver and a reference voltage for digital / analog conversion of the data driver; A gate control signal controller configured to receive the plurality of gate control signals and output a plurality of gate control signals adjusted according to driving conditions of a gate driver; A common voltage generator receiving the control signal and generating a common voltage; And And a signal amplifier configured to amplify the reference voltage and the common voltage. The method of claim 10, The adjusted plurality of gate control signals include a first gate clock signal, an inverted first gate clock signal, and a first vertical synchronization start signal. The method of claim 9, The second voltage generator, A DC / DC converter configured to receive the input voltage to generate a driving voltage, and generate a gate on voltage and a gate off voltage for turning on and off a gate driver by compensating the driving voltage according to a temperature change; A gate control signal controller configured to receive the plurality of gate control signals and output a plurality of gate control signals adjusted according to driving conditions of a gate driver; A common voltage generator receiving the control signal and generating a common voltage; And And a signal amplifier configured to amplify the common voltage. The method of claim 12, The DC / DC converter includes a temperature compensator for compensating the driving voltage according to a temperature change. The method of claim 13, And a plurality of diodes connected in series. The method of claim 13, The temperature compensator is disposed outside the DC / DC converter. The method of claim 12, The adjusted plurality of gate control signals include a second gate clock signal, an inverted second gate clock signal, and a second vertical synchronization start signal.

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