KR20080035341A - Confirmation panel for liquid crystal display - Google Patents

Abstract

A verification panel for an LCD(Liquid Crystal Display) is provided to connect repairing lines with data lines in all areas, thereby verifying all areas only through one verification panel. A verification panel for an LCD includes plural data driving IC(Integrated Circuit) areas(540A) simultaneously applied with test signals from predetermined test equipment. Each of the data driving IC areas includes first and second repairing pads(RP1,RP2) and a data pad(DP) applied with the test signal. Each data driving IC area further comprises data lines(DL) connected to the data pad, and first and second repairing lines(RL1,RL2) which are respectively connected to the first and second repairing pads and cross the data lines.

Description

Verification panel for liquid crystal display {CONFIRMATION PANEL FOR LIQUID CRYSTAL DISPLAY}

With reference to the accompanying drawings will be described in detail the embodiments of the present invention to make the present invention clear.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 3 is a schematic block diagram of the liquid crystal display shown in FIG. 1.

FIG. 4 is an enlarged view of a data driver IC region in the liquid crystal display shown in FIG. 3.

FIG. 5 is a diagram illustrating a state in which inspection equipment used for an inspection performed in a manufacturing process of a liquid crystal display and a liquid crystal display are connected.

FIG. 6 is a view showing a front portion of the inspection equipment shown in FIG. 5.

FIG. 7 is a diagram illustrating a connection state of a repair line in a verification panel for a liquid crystal display according to an exemplary embodiment of the present invention. FIG.

8 is a view showing a connection state of a repair line in a verification panel for a liquid crystal display according to the prior art.

<Description of Drawing>

3: liquid crystal layer 100: lower display panel

191: pixel electrode 200: upper display panel

230: color filter 270: common electrode

300: liquid crystal panel assembly 400: gate driver

500: data driver 600: signal controller

700: inspection equipment 705: probe

800: gray voltage generator

R, G, B: Input image data DE: Data enable signal

MCLK: Main Clock Hsync: Horizontal Sync Signal

Vsync: Vertical Sync Signal CONT1: Gate Control Signal

CONT2: data control signal DAT: digital video signal

Clc: Liquid Crystal Capacitor Cst: Keeping Capacitor

Q: switching device

The present invention relates to a verification panel for a liquid crystal display device.

A typical liquid crystal display (LCD) includes two display panels provided with pixel electrodes and a common electrode, and a liquid crystal layer having dielectric anisotropy interposed therebetween. The pixel electrodes are arranged in a matrix and connected to switching elements such as thin film transistors (TFTs) to receive data voltages one by one in sequence. The common electrode is formed over the entire surface of the display panel and receives a common voltage. The pixel electrode, the common electrode, and the liquid crystal layer therebetween form a liquid crystal capacitor, and the liquid crystal capacitor becomes a basic unit that forms a pixel together with a switching element connected thereto.

In such a liquid crystal display, a voltage is applied to two electrodes to generate an electric field in the liquid crystal layer, and the intensity of the electric field is adjusted to adjust the transmittance of light passing through the liquid crystal layer to obtain a desired image. In this case, in order to prevent degradation caused by an electric field applied to the liquid crystal layer for a long time, the polarity of the data voltage with respect to the common voltage is inverted frame by frame, row by pixel, or pixel by pixel.

On the other hand, in the process of manufacturing such a liquid crystal display device, if there is a disconnection, short circuit, or pixel defect in a signal line such as a gate line or a data line, these are filtered out in advance through a predetermined inspection. These types of inspections include array tests, visual inspection (VI) tests, gross tests, and module tests.

The array test is a test that applies a constant voltage before separating into individual cells and checks whether the display signal line is disconnected through the presence or absence of an output voltage. The VI test separates into individual cells and then applies a constant voltage. It is a test to check whether the signal line is disconnected while looking at the human eye. The gross test is a test that checks the quality and disconnection of the display signal line through the display state of the screen by combining the upper display panel and the lower display panel and applying the same voltage as the actual driving voltage before mounting the driving circuit. After the circuit is installed, the final test is to check the proper operation of the driving circuit.

At this time, if a defect such as disconnection or short circuit occurs, the disconnected part is connected through the repair and the shorted part is cut off.

On the other hand, the gross test is performed by applying the test signal by contacting the test equipment having the needle of the probe with the pad of the region where the data driver IC is located (hereinafter referred to as the data driver IC region).

In particular, when the gross test is performed after repairing the disconnection defect, the verification panel is prepared in advance to check whether the probe of the inspection equipment properly contacts the pad. This verification panel is a panel that repairs by arbitrarily disconnecting up to two data lines in each data driver IC area.

However, these verification panels produce at least three to five according to the number of data driving IC regions. This not only takes longer to inspect, but also increases the cost of manufacturing verification panels.

Accordingly, the technical problem to be achieved by the present invention is to provide a verification panel for a liquid crystal display device capable of performing a gross test with only one verification panel.

According to an exemplary embodiment of the present invention, a verification panel for a liquid crystal display device including a plurality of data driving IC regions receives a test signal from a predetermined inspection equipment at the same time. And a data pad to which the test signal is applied and first and second repair pads.

Each of the data driving IC regions may further include a data line connected to the data pad, and first and second repair lines respectively connected to the first and second repair pads and intersect the data line. Can be.

In addition, the first and second data lines of the data lines may be connected to the first and second repair lines, respectively, and may be disconnected from the data pads connected to the first and second data lines.

Meanwhile, the first and second repair pads may be located at both edges of the data pad, respectively.

In addition, the inspection equipment may include a printed circuit board, an inspection signal generation circuit mounted on the printed circuit board, a connection portion connected to the inspection signal generation circuit, and a plurality of contacts in contact with the first and second pads and the data pad. Contains a probe of,

The verification panel may verify whether the first and second repair pads are in contact with the probe.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily practice the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a portion of a layer, film, region, plate, etc. is said to be "on top" of another part, this includes not only when the other part is "right on" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

First, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 1 and 2.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel in the liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, and a data driver 500. And a gray voltage generator 800 and a signal controller 600.

Referring to FIG. 1, the liquid crystal panel assembly 300 is connected to a plurality of signal lines G ₁ -G _n , D ₁ -D _m in an equivalent circuit and arranged in a substantially matrix form. A plurality of pixels PX is included. On the other hand, in the structure shown in FIG. 2, the liquid crystal panel assembly 300 includes lower and upper panels 100 and 200 facing each other and a liquid crystal layer 3 interposed therebetween.

The signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a plurality of data lines for transmitting a data voltage ( D ₁ -D _m ). The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Pixels connected to each pixel PX, for example, the i-th (i = 1, 2,, n) gate line G _i and the j-th (j = 1, 2,, m) data line D _j ( PX includes a switching element Q connected to the signal lines G _i and D _j , a liquid crystal capacitor Clc and a storage capacitor Cst connected thereto. Holding capacitor Cst can be omitted as needed.

The switching element Q is a three-terminal element of a thin film transistor or the like provided in the lower panel 100, the control terminal of which is connected to the gate line G _i , and the input terminal of which is connected to the data line D _j . The output terminal is connected to the liquid crystal capacitor Clc and the storage capacitor Cst.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 191 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 191 and 270 is a dielectric material. Function as. The pixel electrode 191 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives the common voltage Vcom. Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, at least one of the two electrodes 191 and 270 may be formed in a linear or bar shape.

The storage capacitor Cst, which serves as an auxiliary part of the liquid crystal capacitor Clc, is formed by overlapping a separate signal line (not shown) and the pixel electrode 191 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage Vcom is applied to the separate signal line. However, the storage capacitor Cst may be formed such that the pixel electrode 191 overlaps the front gate line G _i-1 directly above the insulator.

On the other hand, in order to implement color display, each pixel PX uniquely displays one of the primary colors (spatial division) or each pixel PX alternately displays the primary colors over time (time division). The desired color is recognized by the spatial and temporal sum of these primary colors. Examples of the primary colors include three primary colors such as red, green, and blue. FIG. 2 illustrates that each pixel PX includes a color filter 230 representing one of the primary colors in an area of the upper panel 200 corresponding to the pixel electrode 191 as an example of spatial division. Unlike in FIG. 2, the color filter 230 may be disposed above or below the pixel electrode 191 of the lower panel 100.

The liquid crystal panel assembly 300 is provided with at least one polarizer (not shown).

Referring back to FIG. 1, the gray voltage generator 800 generates an entire gray voltage related to the transmittance of the pixel PX or a limited number of gray voltages (hereinafter referred to as a reference gray voltage). The reference gray level voltage may include a positive value and a negative value with respect to the common voltage Vcom.

A gate driver 400, a gate line (G ₁ -G _n) and is connected to the gate turn-on voltage (Von), and a gate signal consisting of a combination of a gate-off voltage (Voff), a gate line (G ₁ of the liquid crystal panel assembly 300 -G _n ).

Data driver 500 is connected with the data lines (D ₁ -D _m) of the liquid crystal panel assembly 300, select a gray voltage from the gray voltage generator 800 and the data lines do this as a data voltage (D ₁ -D _m ). However, when the gray voltage generator 800 does not provide all the gray voltages but provides only a limited number of reference gray voltages, the data driver 500 divides the reference gray voltages to generate a desired data voltage.

The signal controller 600 controls the gate driver 400, the data driver 500, and the like.

Each of the driving devices 400, 500, 600, and 800 may be mounted directly on the liquid crystal panel assembly 300 in the form of at least one integrated circuit chip, or may be a flexible printed circuit film (not shown). It may be mounted on the liquid crystal panel assembly 300 in the form of a tape carrier package (TCP) or mounted on a separate printed circuit board (not shown). Alternatively, these driving devices 400, 500, 600, and 800 are integrated in the liquid crystal panel assembly 300 together with the signal lines G ₁ -G _n , D ₁ -D _m and the thin film transistor switching element Q. May be In addition, the driving devices 400, 500, 600, and 800 may be integrated into a single chip, in which case at least one of them or at least one circuit element constituting them may be outside the single chip.

Next, the operation of the liquid crystal display will be described in detail.

The signal controller 600 receives input image signals R, G, and B and an input control signal for controlling the display thereof from an external graphic controller (not shown). The input image signals R, G, and B contain luminance information of each pixel PX, and the luminance is a predetermined number, for example, 1024 (= 2 ¹⁰ ), 256 (= 2 ⁸ ), or 64 (= 2 ⁶ ) It has gray. Examples of the input control signal include a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock signal MCLK, and a data enable signal DE.

The signal controller 600 properly processes the input image signals R, G, and B according to operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and controls the gate. After generating the signal CONT1 and the data control signal CONT2, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are transmitted to the data driver 500. Export to).

The gate control signal CONT1 includes a scan start signal STV indicating a scan start and at least one clock signal controlling an output period of the gate-on voltage Von. The gate control signal CONT1 may also further include an output enable signal OE that defines the duration of the gate-on voltage Von.

The data control signal CONT2 is analog data to the horizontal synchronization start signal STH and the data line D ₁ -D _m indicating the start of the transmission of the digital image signal DAT to the pixels PX of one row (bundling). The load signal LOAD and the data clock signal HCLK to apply a voltage are included. The data control signal CONT2 also inverts the signal RVS which inverts the polarity of the data voltage with respect to the common voltage Vcom (hereinafter referred to as "polarity of the data voltage" by reducing the "polarity of the data voltage with respect to the common voltage"). It may further include.

According to the data control signal CONT2 from the signal controller 600, the data driver 500 receives the digital image signal DAT for the pixels PX in one row (bundling), and each digital image signal DAT. By converting the digital image signal DAT into an analog data voltage by selecting the gray scale voltage corresponding to), it is applied to the corresponding data lines D ₁ -D _m .

The gate driver 400 applies the gate-on voltage Von to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n . Turn on the switching element (Q) connected to. Then, the data voltage applied to the data lines D ₁ -D _m is applied to the pixel PX through the turned-on switching element Q.

The difference between the data voltage applied to the pixel PX and the common voltage Vcom is shown as the charging voltage of the liquid crystal capacitor Clc, that is, the pixel voltage. The arrangement of the liquid crystal molecules varies depending on the magnitude of the pixel voltage, thereby changing the polarization of light passing through the liquid crystal layer 3. This change in polarization is represented by a change in the transmittance of light by the polarizer, through which the pixel PX displays the luminance represented by the gray level of the image signal DAT.

This process is repeated in units of one horizontal period (also referred to as "1H" and equal to one period of the horizontal sync signal Hsync and the data enable signal DE), thereby all the gate lines G ₁ -G _n. ), The gate-on voltage Von is sequentially applied, and the data voltage is applied to all the pixels PX to display an image of one frame.

When one frame ends, the state of the inversion signal RVS applied to the data driver 500 is controlled so that the next frame starts and the polarity of the data voltage applied to each pixel PX is opposite to the polarity of the previous frame. "Invert frame"). At this time, even in one frame, the polarity of the data voltage flowing through one data line is periodically changed according to the characteristics of the inversion signal RVS (eg, row inversion and point inversion) or polarity of the data voltage applied to one pixel row. They can be different (eg invert columns, invert points).

Next, a verification panel for a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 3 to 8.

FIG. 3 is a schematic block diagram of the liquid crystal display shown in FIG. 1, and FIG. 4 is an enlarged view of a data driving IC region in the liquid crystal display shown in FIG. 3. FIG. 5 is a view showing a state in which a test equipment used for an inspection performed in a manufacturing process of a liquid crystal display device and a liquid crystal display device are connected, and FIG. 6 is a view showing a front portion of the test equipment shown in FIG. 5. FIG. 7 is a diagram illustrating a connection state of a repair line in a verification panel for a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 8 is a diagram illustrating a connection state of a repair line in a verification panel for a liquid crystal display according to the related art. .

Referring to FIG. 3, the liquid crystal display shown in FIG. 1 includes most of the signal lines G1 -Gn and D1 -Dm, and includes a display area DA that forms a screen and a peripheral area PA outside thereof. The liquid crystal panel assembly 300, and a printed circuit board 550 positioned outside the liquid crystal panel assembly 300.

In the peripheral area PA of the liquid crystal panel assembly 300, a plurality of data driver ICs 540 constituting the data driver 500 and gate driver ICs 440 constituting the gate driver 400 are disposed on the upper side and the left side, respectively. have. In FIG. 3, eight data driving ICs are shown.

In addition, two pairs of repair lines RL1, RL2, RL3, and RL4 are disposed on the liquid crystal panel assembly 300 and the printed circuit board 550, which are separated from each other and connected from below. That is, the repair lines RL1 and RL2 and the repair lines RL3 and RL4 are separated from each other at the upper side, but at the bottom, the repair line RL1 is connected to the repair line RL3 and the repair line RL2 is repaired. Is connected to (RL4).

At this time, as shown in FIG. 4, when the data driver IC region 540A positioned in the liquid crystal panel assembly 300 is enlarged, each region 540A is connected to the data pads D1 -Dm and DL. DP and two repair line pads RP1 and RP2 positioned one by one, respectively, are arranged, and a pair of dummy pads DUP1 and DUP2 are arranged on the left edge. Although not shown, a symmetrical structure is also disposed in the data driver IC region 540A located on the right side.

Here, the repair lines RL1, RL2, RL3 and RL4 positioned on the printed circuit board 550 may include the repair lines RL1, RL2, RL3 and RL4 and the repair pads RP1 and RP2 located on the liquid crystal panel assembly 300. The dummy pads DUP1 and DUP2 are connected to each other.

5 and 6 schematically show the inspection equipment used in the gross test.

The inspection equipment 700 includes a printed circuit board 701, an inspection signal generation circuit 702 mounted thereon, a connecting portion 703, a support portion 704, and a probe 705 connected thereto.

The inspection equipment 700 has a connection portion 703 in one printed circuit board 701 as many as the number of data driving IC regions 540A, so that the inspection equipment 700 is in contact with each region 540A and performs inspection.

The inspection signal generating device 702 mounted on the printed circuit board 701 is similar to the data driving IC 540 and allows inspection to be performed in substantially the same environment before mounting the data driving IC 540.

The probe 705 is attached to the support 704, and each probe 705 contacts the remaining pads DP, RP1, and RP2 except for the dummy pads DUP1 and DUP2, from the test signal generation circuit 701. The test signal is transmitted to the repair lines RL1, RL2, RL3, and RL4 and the data lines D ₁ -D _m .

FIG. 7 illustrates a connection state of repair lines of a verification panel for a liquid crystal display according to an exemplary embodiment of the present invention.

Here, the leftmost region of the plurality of data driving IC regions is shown as an example, and the remaining data driving IC regions are arranged in the same connection state.

The verification panel is a panel for verifying contact between the probe 705 of the inspection equipment 700 and the repair pads RP1 and RP2 described above. In particular, the verification panel RP1 is performed before the inspection of the general panel in which the repair is performed. , RP2) is a panel for checking in advance that the inspection equipment 700 is in proper contact. For this purpose, any data line belonging to each area 540A is disconnected and repaired.

In FIG. 7, for example, the first data line D ₁ and the (k-1) th data line D _k-1 are shown as disconnected.

At this time, the first data line D ₁ is short-circuited as shown by the repair line RL1 and a dot (·), and disconnected from the pad DP1 connected thereto as indicated by X (×). Accordingly, the test signal TS is applied through the repair pad RP1, the repair line RL1 and the first data line D ₁ as indicated by the arrow.

Similarly, the (k-1) th data line D _k-1 is connected to the repair line RL2 and is disconnected from the pad DP (k-1) connected thereto. Accordingly, the test signal TS is applied through the repair pad RP2, the repair line RL2 and the data line D _k-1 as indicated by the arrow.

In this case, when black data is applied for verification, the entire screen is black.

If the contact is made properly, the disconnected data lines D ₁ and D _k-1 appear as white vertical stripes because the test signal TS is not transmitted below the disconnected portion. On the contrary, in the case of poor contact, the disconnected data lines D ₁ and D _k-1 appear as white vertical stripes.

In this manner, only one verification panel may be manufactured to easily determine whether the inspection apparatus 700 is in contact with the verification panel.

Conventionally, a verification panel corresponding to half of the total number of data driving ICs has to be manufactured. This will be described with reference to FIG. 8.

Figure 8 shows the connection of the repair line of the verification panel in a conventional manner.

8, the repair line RL1 and the data line D ₁ are connected, and the repair line RL2 and the data line D _k-1 are connected, so that the test signal TS is applied as shown by the arrow. do.

Here, the repair lines RL1 and RL2 are connected to each other again through the repair lines 711 and 712 formed on the printed circuit board 700 shown in FIG. This is a repair line disposed in the liquid crystal panel assembly 300 through the inspection equipment 700 shown in FIGS. 5 and 6 since the printed circuit board 550 shown in FIG. 3 is not yet attached during the gross test. (RL1, RL2) are connected to each other.

However, since there are only one pair of repair lines on the left and right sides, when two repair lines are used in one region 540A, the repair line may no longer be used in another region. Therefore, in the case of the eight data driving IC regions 540A described above, if one repair line is used at the same time for each region, four verification panels must be manufactured to verify all the regions. That is, the number of verification panels corresponding to half of the number of data driving ICs must be manufactured.

However, according to the exemplary embodiment of the present invention, since the test signal TS is applied through the repair pads RP1 and RP2, there is no need to use two repair lines. Therefore, the repair lines RL1, RL2, RL3, and RL4 as shown in FIG. 7 can be connected to the data lines D ₁ -D _m in all regions 540A, so that only one verification panel is manufactured. Suffice.

In this way, using only one verification panel can reduce the cost of manufacturing the verification panel, while reducing the verification time by the reduced verification panel, thereby improving overall yield.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (5)

A verification panel for a liquid crystal display device comprising a plurality of data driving IC regions, The plurality of data driver IC regions simultaneously receive a test signal from a predetermined test equipment, Each data driving IC area includes a data pad to which the test signal is applied and first and second repair pads. Verification panel for liquid crystal display. In claim 1, Each data driving IC region is A data line connected to the data pad, and First and second repair lines respectively connected to the first and second repair pads and intersecting the data lines; Containing more Verification panel for liquid crystal display. In claim 2, First and second data lines of the data lines are connected to the first and second repair lines, respectively. The connection to the data pads connected to the first and second data lines is blocked. Verification panel for liquid crystal display. In claim 3, And a first repair pad and a second repair pad respectively positioned at both edges of the data pad. In claim 1, The inspection equipment Printed circuit board, An inspection signal generation circuit mounted on the printed circuit board, A connection part connected to the test signal generation circuit, and A plurality of probes in contact with the first and second pads and the data pad Including, The verification panel verifies whether the first and second repair pads are in contact with the probe. Verification panel for liquid crystal display.

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