KR20080032321A - Driving method for plasma display panel - Google Patents

Abstract

A method for driving a plasma display panel is provided to simplify the configuration of circuits by removing a voltage source for generating a set up voltage. A second voltage with a negative polarity is applied to a sustain electrode(Z) while a rising voltage(Ramp-up) increased from a ground voltage(GND) to a first voltage(Vsetup) is supplied to a scan electrode(Y). A falling voltage(Ramp-down), which is decreased from the ground voltage to a third voltage(Vy), is supplied to the scan electrode and the ground voltage is supplied to the sustain electrode. The ground voltage is supplied to the scan electrode and the voltage of a sustain pulse waveform which is composed of voltages with the same magnitude as the second voltage and opposite polarities repeatedly, is applied to the sustain electrode.

Description

Driving Method for Plasma Display Panel {Driving Method for Plasma Display Panel}

1 is an exploded perspective view showing the structure of a conventional three-electrode AC surface discharge type plasma display panel.

2 is a diagram illustrating a gray scale implementation method of a representative ADS driving method of the PDP driving method of the prior art.

3 is a diagram illustrating an example of a driving waveform according to the PDP driving method illustrated in FIG. 2.

FIG. 4 is a diagram showing an overall configuration of a drive device for supplying a drive waveform as shown in FIG. 3 to each electrode.

5 illustrates an example of a driving waveform for driving a plasma display panel according to a preferred embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for driving a plasma display panel, and more particularly, to a method for driving a plasma display panel, which has a high driving efficiency and makes it possible to simply configure a circuit of an entire driving device.

Plasma Display Pane (hereinafter, also referred to as 'PDP') is a display device using a phenomenon in which visible light is generated when ultraviolet rays generated by gas discharge excite phosphors. PDP has the advantages of being thinner and lighter than the cathode ray tube (CRT) and capable of realizing a high definition large screen. In general, the PDP is composed of a plurality of discharge cells arranged in a matrix form, one discharge cell corresponds to one subpixel of the screen.

1 is an exploded perspective view showing the structure of a conventional three-electrode AC surface discharge type plasma display panel. Referring to FIG. 1, each discharge cell has a scan electrode Y formed on the upper substrate 1, a sustain electrode Z, and an address electrode X formed on the lower substrate 9. The scan electrode (Y) and the sustain electrode (Z) are usually made of transparent indium-tin oxide (hereinafter referred to as 'ITO'), and in order to reduce the voltage drop due to their high resistance characteristics, Bus electrodes 3 made of at least one of metals such as Ag, Cu, Cr, and the like are respectively formed thereon.

The upper dielectric layer 4 and the passivation layer 5 are stacked on the upper substrate 1 having the scan electrode Y and the sustain electrode Z side by side. The protective film 5 is usually made of magnesium oxide (MgO) in order to prevent damage to the upper dielectric layer 4 by sputtering generated during plasma discharge and to improve emission efficiency of secondary electrons.

The lower dielectric layer 8 and the partition wall 6 are formed on the lower substrate 9 on which the address electrode X is formed, and the red (R), green (G), and blue surfaces of the lower dielectric layer 8 and the partition wall 6 are formed. Phosphor 7 such as color B is applied. The address electrode X is formed in a direction crossing the scan electrode Y and the sustain electrode Z, and the partition wall 6 is formed in a direction parallel to the address electrode X to generate ultraviolet and visible light generated by discharge. This prevents leakage to adjacent discharge cells. The phosphor 7 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red (R), green (G), and blue (B). In the discharge space provided by the upper substrate 1, the lower substrate 9, and the partition wall 6, Ne + Xe, a penning gas, and the like for gas discharge are sealed.

In the PDP having the above-described structure, the discharge cell is selected by the counter discharge between the address electrode X and the scan electrode Y, and then the discharge of the selected discharge cell is maintained by the surface discharge between the scan electrode Y and the sustain electrode Z. To be. In such a discharge cell, visible light is emitted to the outside of the cell by emitting the phosphor 7 by ultraviolet rays generated during the sustain discharge. As a result, the discharge cells adjust the period during which the discharge is maintained to implement gray scale, and the PDP in which the discharge cells are arranged in a matrix form can display an image.

2 is a diagram illustrating a gray scale implementation method of a representative ADS driving method of the PDP driving method of the prior art. Referring to FIG. 2, in the ADS driving method, it is preferable to have a plurality of subfields SF having different brightnesses, that is, different lengths of emission periods, for one TV field (typically 16.67 ms) representing an image for gradation. In general, for example, in the case of having 8 subfields as shown in FIG. 2, each subfield has a weight of 2 ⁰ , 2 ¹ , 2 ² , 2 ³ , 2 ⁴ , 2 ⁵ , 2 ⁶ , 2 ⁷ The sustain discharge section has a length corresponding to, and the combination of these subfields enables the expression of 256 (= 2 ⁸ ) gray scales. Each subfield includes a reset section for uniformly generating a discharge, an address section for selecting a discharge cell, and a sustain discharge section for implementing gray scale according to the number of discharges.

3 is a diagram illustrating an example of a driving waveform according to the PDP driving method illustrated in FIG. 2.

Referring to FIG. 3, in the setup period SU of the reset period, all of the scan electrodes Y have a voltage of a rising ramp waveform Ramp-up that has a predetermined slope and rises from a predetermined voltage having a positive polarity to the setup voltage Vsetup. Are supplied at the same time. At the same time, the ground voltage GND is supplied to the sustain electrode Z and the address electrode X. Due to the voltage of the rising ramp waveform Ramp-up, a setup discharge occurs in a weak discharge between the scan electrode Y, the sustain electrode Z, and the address electrode X in the discharge cells of the full screen. Due to the discharge, positive wall charges are accumulated on the address electrode X and the sustain electrode Z, and negative wall charges are accumulated on the scan electrode Y.

In the set-down period SD of the reset period, the voltage of the falling ramp waveform Ramp-down, which drops from the setup voltage Vsetup to the predetermined voltage of positive polarity and then falls to the negative set-down voltage Vsetdown with a predetermined slope, It is supplied to the scan electrodes Y. While the voltage of the falling ramp waveform Ramp-down is supplied, the predetermined bias voltage Vds and the ground voltage GND are supplied to the sustain electrode Z and the address electrode X, respectively. Due to the voltage of the falling ramp waveform (Ramp-down), the set-down discharge is generated between the scan electrode (Y), the sustain electrode (Z) and the address electrode (X) by a weak discharge, which is formed during the set-up discharge by the set-down discharge Of the wall charges, excessive wall charges unnecessary for the address discharge are erased. Looking at the change in the wall charge in the set down period SD, there is almost no change in the wall charge on the address electrode X, and the negative wall charges on the scan electrode Y formed during the set-up discharge are partially due to the set down discharge. On the other hand, the negative charge is accumulated on the sustain electrode Z by this decrease.

In the address period, a negative scan pulse voltage Vy is supplied for a predetermined period while a predetermined base voltage Vdsc is supplied, thereby having a magnitude Vsc equal to the difference between the base voltage Vdsc and the scan pulse voltage Vy. The voltage of the scan pulse waveform is supplied line-by-line to the scan electrodes (Y). Although the magnitude of the scan pulse voltage Vy is the same as the magnitude of the setdown voltage Vsetdown, the present invention is not limited thereto. In synchronization with the supply of the scan pulse voltage Vy, a positive data pulse voltage Va is supplied to the address electrode X. As the voltage difference between the scan pulse voltage Vy and the data pulse voltage Va and the wall voltage generated in the reset period are added, an address discharge is generated in the cell to which the data pulse voltage Va is applied. In the cells selected by the address discharge, wall charges are formed such that sustain discharge can occur when a sustain pulse is supplied in the sustain discharge period. The bias voltage Vds is continuously supplied to the sustain electrode Z during the address period.

In the sustain discharge period, the voltage of the sustain pulse waveform is alternately supplied between the scan electrode Y and the sustain electrode Z. Each time the sustain pulse is applied, the cells selected by the address discharge have a sustain discharge, that is, a display discharge, between the scan electrode Y and the sustain electrode Z as the wall voltage and the sustain pulse voltage Vs in the cell are added. Is generated. Here, the first sustain pulse among the sustain pulses applied to the scan electrode may use a pulse wider than the width of the other sustain pulses so that the sustain discharge can be stably started.

FIG. 4 is a diagram showing an overall configuration of a drive device for supplying a drive waveform as shown in FIG. 3 to each electrode.

Referring to FIG. 4, in the conventional apparatus for driving a three-electrode AC surface discharge PDP, m × n discharge cells 40 include scan electrode lines Y1 to Ym, sustain electrode lines Z1 to Zm, and an address. A PDP 41 arranged in a matrix so as to be connected to the electrode lines X1 to Xn, a scan driving device 42 for supplying the scan driving waveform as described above to the scan electrode lines Y1 to Ym; And a sustain drive device 43 for simultaneously supplying the sustain drive waveforms as described above to the sustain electrode lines Z1 to Zm, and the address drive waveforms as described above to the address electrode lines X1 to Xn. Control for supplying control signals to the respective drive devices based on the address drive device 44 and external display data D, the horizontal synchronizing signal H, the vertical synchronizing signal V, the clock signal, and the like. The circuit part 45 is comprised. As described above, the voltages of the ramp waveforms Ramp-up and Ramp-down and the sustain pulse waveform are simultaneously applied to all the scan electrode lines Y1 to Ym in the reset period and the sustain discharge period. The voltage of the address pulse waveform is controlled to be sequentially supplied from the first line Y1 to the last line Ym.

In addition, the conventional three-electrode AC surface discharge PDP driving apparatus includes a power supply unit 46 for applying various voltages for supplying driving waveforms as shown in FIG. 3 to each electrode. By the power supply unit 46, a setup voltage Vsetup, a setdown voltage Vsetdown, a sustain pulse voltage Vs, an address pulse voltage Va, a scan pulse voltage Vy, and a scan pulse magnitude voltage Vsc. A plurality of stable DC voltages having different magnitudes, such as, etc., are not shown in detail, but are supplied to each driving device using an AC / DC converter and a plurality of DC / DC converters. In addition, other voltages for use, such as FET gate driving voltages for driving transistors in a PDP logic block or a circuit of a PDP driver, may be supplied.

However, according to the driving method of the conventional plasma display panel as described above, in particular, in order to apply voltages of different magnitudes such as setup voltage Vsetup, setdown voltage Vsetdown, sustain pulse voltage Vs, etc. to the scan electrodes. Since several DC-DC converter power stages must be included in the power supply, a circuit in the driving device becomes complicated and inefficient in terms of cost.

In addition, in order to apply a sustain pulse to the scan electrode, a detailed illustration thereof is omitted in FIG. 4, but a scan IC included in the scan driver must pass through the scan IC, thereby causing an energy loss, thereby reducing the driving efficiency of the scan driver. There is a problem in that the volume of the entire driving apparatus becomes large because circuits for applying sustain pulses must be separately formed in the apparatus and the sustain driving apparatus.

SUMMARY OF THE INVENTION The present invention has been made to solve the problems described above, and can reduce the type of voltage to be applied to the scan electrode, and can include the sustain pulse drive circuit portion for the scan electrode in the sustain pulse drive circuit portion for the sustain electrode. It is to provide a driving method of.

In the method of driving the plasma display panel according to the present invention for achieving the above object, while maintaining the voltage of the waveform rising from the base voltage to the first voltage to the scan electrode is maintained at the second negative voltage of the sustain electrode A first step of applying a voltage of a waveform; A second step of applying a voltage having a waveform falling from a base voltage to a third voltage to the scan electrode and at the same time applying a base voltage to the sustain electrode; And a third step of applying a voltage of a sustain pulse waveform formed by repeatedly applying voltages having the same magnitude as that of the second voltage and having opposite polarities to the sustain electrode while simultaneously applying a base voltage to the scan electrode. It features.

The driving method may further include applying a fifth voltage smaller than the fourth voltage for a predetermined period of time while the fourth voltage greater than the third voltage is supplied to the scan electrode after the second step. .,

The sixth voltage of the positive polarity may be applied to the address electrode in synchronization with the period in which the fifth voltage is applied.

In addition, the difference between the magnitude of the fourth voltage and the fifth voltage is preferably equal to the magnitude of the first voltage, and the fifth voltage preferably has the same value as the third voltage.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

5 illustrates an example of a driving waveform for driving a plasma display panel according to a preferred embodiment of the present invention.

Referring to FIG. 5, the setup period SU of the reset period of the driving method of the plasma display panel according to the preferred embodiment of the present invention has a predetermined slope, and the scan pulse magnitude voltage Vsc and the magnitude are equal to each other at the base voltage GND. The voltage of the rising ramp waveform Ramp-up rising up to the same setup voltage Vsetup is supplied to all the scan electrodes Y simultaneously. At this time, the sustain electrode Z is supplied with the same voltage as the sustain pulse voltage Vs and has a negative voltage (-Vs), and the base electrode GND is supplied to the address electrode X. The scan electrode within the discharge cells of the full screen by the voltage of the rising ramp waveform Ramp-up supplied to the scan electrode Y and the negative sustain pulse voltage (-Vs) supplied to the sustain electrode Z. A setup discharge occurs between (Y) and the sustain electrode Z and the address electrode X with a weak discharge, and positive wall charges are accumulated on the address electrode X and the sustain electrode Z by this setup discharge. Negative wall charges are accumulated on the scan electrode (Y).

In the set-down period SD of the reset period, the voltage of the falling ramp waveform Ramp-down that descends to the negative set-down voltage Vsetdown with a predetermined slope after descending from the setup voltage Vsetup to the base voltage is a scan electrode. Supplied to (Y). While the voltage of the falling ramp waveform Ramp-down is supplied, the ground voltage is supplied to the sustain electrode Z and the address electrode X. Due to the voltage of the falling ramp waveform (Ramp-down), the setdown discharge is generated between the scan electrode (Y), the sustain electrode (Z), and the address electrode (X) by weak discharge, and the wall formed during the set-up discharge by the setdown discharge. Of the charges, excessive wall charges unnecessary for the address discharge are erased. Looking at the change in the wall charge in the set down period SD, there is almost no change in the wall charge on the address electrode X, but the negative wall charges on the scan electrode Y formed during the set-up discharge are partially due to the set down discharge. On the other hand, the negative charge is accumulated on the sustain electrode Z by this decrease.

In the address period, while a predetermined negative base voltage Vdsc is supplied, a scan pulse voltage Vy is sequentially supplied to the scan electrodes Y for a predetermined period of time, and is synchronized with the application of the scan pulse voltage Vy. The data pulse voltage Va of the positive polarity is generally supplied to the address electrode X. FIG. In this case, the scan pulse voltage Vy and the bias voltage Vdsc are preferably set such that the difference is equal to the scan pulse magnitude voltage Vsc. As the voltage difference between the scan pulse voltage Vy and the data pulse voltage Va and the wall voltage generated in the reset period are added, an address discharge is generated in the cell to which the data pulse voltage Va is applied. In the cells selected by the address discharge, wall charges are formed such that sustain discharge can occur when a sustain pulse is supplied in the sustain discharge period. The ground voltage GND is continuously supplied to the sustain electrode Z during the address period.

In the sustain discharge section, a full sustain waveform (full) in which the ground voltage GND is continuously supplied to the scan electrode Y and the positive and negative sustain pulse voltages Vs and -Vs are repeatedly applied to the sustain electrode Z. a sustain waveform voltage is supplied. Each time the sustain pulse is applied, the cells selected by the address discharge are added with the wall voltage and the sustain pulse voltage Vs in the cell, and a sustain discharge, that is, a display discharge occurs between the scan electrode Y and the sustain electrode Z. do.

Although preferred embodiments of the present invention have been described above, the plasma display panel, the driving device and the driving method thereof according to the present invention can be modified and applied in various forms within the scope of the technical idea of the present invention. For example, although the setdown voltage Vsetdown and the scan pulse voltage Vy are shown to be the same in the embodiment shown in FIG. 5, the discharge cells may have the stable address discharge and / or the sustain discharge. The setdown voltage Vsetdown and the scan pulse voltage Vy may have different values. After all, the embodiments and drawings are merely for the purpose of describing the details of the invention, and are not intended to limit the scope of the technical idea of the invention, the scope of the present invention is not limited to the claims to be described later and It should be judged to include an even range.

According to the present invention as described above, in order to supply a voltage of the rising ramp waveform for initializing the wall charge of the discharge cell to the scan electrode, a DC-DC converter power stage for generating a setup voltage (Vsetup) is required separately. According to the present invention, the sustain pulse voltage (Vs) used to supply the sustain pulse waveform is used to maintain the sustain electrode at a voltage of -Vs, and to supply a scan pulse magnitude voltage (Vsc) required for scan driving. Since the voltages of the rising ramp waveforms can be supplied to the scan electrodes in common, the power supply stage for generating the setup voltage Vsetup can be removed, thereby simplifying the circuit configuration.

According to the present invention, since the sustain electrode is supplied with a voltage of a full sustain waveform having the magnitudes of the positive and negative sustain pulse voltages (Vs, -Vs), the scan electrode has a sustain pulse voltage. There is no need to supply. Therefore, when the sustain pulse voltage is supplied to the conventional scan electrode, energy loss caused by the scan IC generated due to the scan IC in the scan driver is prevented, thereby improving the driving efficiency of the scan driver. have.

Further, according to the present invention, since the sustain pulse voltages are supplied only to the sustain electrode, the volume of the entire drive device becomes smaller than in the case where circuits for applying the sustain pulses are formed in the conventional scan drive device and the sustain drive device, respectively. Has an effect.

Claims (5)

A first step of applying a waveform of the waveform maintained at the second negative voltage to the sustain electrode while applying the waveform of the waveform rising from the base voltage to the first voltage to the scan electrode; A second step of applying a voltage having a waveform falling from a base voltage to a third voltage to the scan electrode and at the same time applying a base voltage to the sustain electrode; And And applying a voltage of a sustain pulse waveform formed by repeating voltages having the same magnitude as that of the second voltage and having opposite polarities to the sustain electrode while simultaneously applying a base voltage to the scan electrode. A drive method of a plasma display panel. The method of claim 1, And applying a fifth voltage less than the fourth voltage for a predetermined period of time while the fourth voltage greater than the third voltage is supplied to the scan electrode after the second step. Method of driving. The method of claim 2, And driving a positive sixth voltage to the address electrode in synchronization with the period during which the fifth voltage is applied. The method of claim 2, And the difference between the magnitude of the fourth voltage and the fifth voltage is equal to the magnitude of the first voltage. The method of claim 2, And the fifth voltage has the same value as the third voltage.

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