KR20080020760A - Flat panel display device and method of manufacturing the same - Google Patents

Abstract

A flat panel display and a method of manufacturing the flat panel display are provided to form an interconnection line located in a sealing region by using a transparent conductive material to prevent the adhesion of a substrate and an opposite substrate from being decreased due to under-hardening of a sealing member. A flat panel display includes a substrate, a first metal line(110), a second metal line(120), a transparent conductive member(130) and a sealing member(300). The substrate includes a pixel region for displaying images, a peripheral region surrounding the pixel region and a sealing region interposed between the pixel region and the peripheral region. The first metal line is arranged in the pixel region. The second metal line is arranged in the peripheral region and corresponds to the first metal line. The transparent conductive member electrically connects the first metal line and the second metal line. The sealing member is located on the transparent conductive member arranged on the sealing region and includes a photocurable material cured by light which passes through the transparent conductive member.

Description

Flat panel display device and method of manufacturing the same

1A is a plan view illustrating a plane of a flat panel display device according to a first embodiment of the present invention.

FIG. 1B is an enlarged view illustrating an enlarged portion A of FIG. 1A.

FIG. 1C is a cross-sectional view taken along the line II ′ of FIG. 1B.

2 is a cross-sectional view of a flat panel display device according to a second exemplary embodiment of the present invention.

3A to 3D are cross-sectional views illustrating a method of manufacturing a flat panel display device according to a third embodiment of the present invention.

 (Explanation of symbols for the main parts of the drawing)

        100 substrate 105 gate insulating film

        115: protective film 110: first metal wiring

        120: second metal wiring 130: transparent conductive member

        200: opposing substrate 300: sealing member

The present invention relates to a flat panel display. In particular, the present invention relates to a flat panel display device and a manufacturing method thereof capable of preventing defects that may occur during the bonding process of two substrates.

Today, attention is being paid to flat panel displays that can meet the needs of miniaturization and thinning of display devices.

The flat panel display includes a liquid crystal display (LCD), an organic light-emitting display device (OLED), and the like.

The flat panel display includes a lower substrate and an upper substrate disposed to face each other. The lower substrate has a plurality of wirings and a thin film transistor. In particular, when the flat panel display device is a liquid crystal display device, the upper substrate may have a color filter pattern for realizing color while light transmitted from the outside is transmitted.

Here, the lower substrate and the upper substrate are bonded to each other by a failure turn formed at an outer portion of the lower substrate or the upper substrate. The failure turn mainly uses a photocurable resin that can be cured at low temperatures. That is, by irradiating a predetermined light on the failure turn interposed between the lower substrate and the upper substrate, and curing the failure turn, the lower substrate and the upper substrate are completely bonded to each other, and the two substrates are separated from the outside air. Block it.

In this case, a black matrix is formed on the outer portion of the upper substrate to block light, thereby providing light to the failure turn through the lower substrate. However, the failure turn is formed by passing through the wiring formed on the outer portion of the lower substrate. For this reason, light is not transmitted to the failing turn by the wiring, so that the failing turn may be uncured.

As the failure turn is not hardened, adhesion between the lower substrate and the upper substrate may not be properly performed, which may cause various problems. For example, the space between the lower substrate and the upper substrate may be contaminated to degrade image quality. In addition, when the flat panel display device is an organic light emitting display device, the lifespan may be reduced due to the characteristics of a device that is easily degraded by external moisture and oxygen. In addition, when the flat panel display device is a liquid crystal display device, the liquid crystal interposed between the lower substrate and the upper substrate may leak out.

An object of the present invention is to provide a flat panel display device and a method of manufacturing the same, by forming a wiring disposed in a region where a sealing member is to be formed of a transparent conductive material, thereby preventing the sealing member from being uncured by the wiring. have.

In order to achieve the above technical problem, an aspect of the present invention provides a flat panel display device. The flat panel display includes a substrate having a pixel region in which an image is displayed, a peripheral region formed around the pixel region, and a sealing region interposed between the pixel region and the peripheral region, and a first metal wiring disposed in the pixel region. A transparent conductive member disposed in the peripheral region, the second metal wiring portion corresponding to the first metal wiring portion, and the first and second metal wiring portions electrically connected to each other; And a sealing member disposed on the transparent conductive member disposed on the sealing region, the sealing member including a photocurable material cured by light passing through the transparent conductive member.

In order to achieve the above technical problem, another aspect of the present invention provides a method of manufacturing a flat panel display device. The manufacturing method includes providing a substrate having a pixel region in which an image is displayed, a peripheral region formed around the pixel region, and a sealing region interposed between the pixel region and the peripheral region; Forming a second metal wiring part located in the first metal wiring part and the peripheral area and corresponding to the first metal wiring part and spaced apart from the first metal wiring part, and the first and second metal wiring parts Forming a transparent conductive member for electrically connecting the conductive material, and forming a sealing member including a photocurable material cured by light passing through the transparent conductive member on the light transmitting conductive member corresponding to the sealing region. It includes a step.

Hereinafter, with reference to the drawings of the flat panel display device according to the present invention will be described in detail. The following embodiments are provided as examples to sufficiently convey the spirit of the present invention to those skilled in the art. Accordingly, the invention is not limited to the embodiments described below and may be embodied in other forms. In the drawings, the size and thickness of the device may be exaggerated for convenience. Like numbers refer to like elements throughout.

1A to 1C are diagrams for describing a flat panel display device according to a first embodiment of the present invention.

FIG. 1A is a plan view illustrating a plane of a flat panel display device according to a first exemplary embodiment of the present invention, FIG. 1B is an enlarged view of portion A of FIG. 1A, and FIG. 1C is a line II ′ of FIG. It is a cross-sectional view cut along the line.

1A to 1C, the flat panel display includes a substrate 100, a plurality of wiring portions formed on the substrate 100, and a sealing member 300 formed on a portion of the wiring portion.

In detail, the substrate 100 has a pixel region 100a, a peripheral region 100b formed around the pixel region 100a, and a sealing region 100c interposed between the pixel region 100a and the peripheral region 100b. .

In the pixel region 100a, a plurality of pixels p for displaying an image are formed. Although not shown in the drawings, each pixel P may include a thin film transistor and a pixel electrode electrically connected to the thin film transistor. The peripheral area 100b is electrically connected to a printed circuit board (not shown in the drawing), which is an external circuit part, and the pad part 102 is formed to output the external circuit part rotor signal. The pad portion 102 extends from the first metal wiring portion 110. That is, the pad unit 102 receives a signal from an external circuit unit and provides the signal to the pixel region 100a.

The sealing member 300 is formed in the sealing region 100c to bond the opposing substrate 200 facing the substrate 100.

The wiring portion may include a first metal wiring portion 110 disposed in the pixel region 100a, a second metal wiring portion 120 disposed in the peripheral area 100b and corresponding to the first metal wiring portion 110. And a transparent conductive member 130 electrically connecting the first and second metal wiring portions to each other.

That is, the first metal wiring unit 110 and the second metal wiring unit 120 are separated from each other at a predetermined interval, and the first metal wiring unit 110 and the second metal wiring unit 120 are transparent conductive members. Are electrically connected to each other by 130.

The first metal wire part 110 may be a gate wire that provides a scan signal to the pixel P. That is, the first metal wiring unit 110 may be connected to the gate electrode of the thin film transistor. Alternatively, the first metal wire unit 110 may be a data wire that provides a data signal to the pixel P. In this case, the first metal wire 110 may be connected to the source electrode of the thin film transistor.

The second metal wire part 120 is formed of the same conductive material as the first metal wire part 110. One end of the second metal wiring part 120 is electrically connected to the pad part to receive a signal from an external circuit part.

The transparent conductive member 130 electrically connects the first metal wire part 110 and the second metal wire part 120 to receive a signal supplied through the second metal wire part 120. 110). The transparent conductive member 130 is formed of a conductive material that can transmit light. For example, the conductive material constituting the transparent conductive member 130 may be indium tin oxide (ITO) or indium zinc oxide (IZO).

The sealing member 300 is disposed on the substrate 100 corresponding to the sealing region 100c. At this time, the sealing member 300 is also formed on the transparent conductive member 130 disposed in the sealing region (100c). The sealing member 300 includes a photocurable material that reacts to light, so that curing occurs at a low temperature. This is because, in the high temperature curing process, the element formed on the substrate 100 may be affected and the characteristics may be degraded, or the substrate 100 may be deformed.

Since the sealing member 300 is cured by the light passing through the substrate 100 and the transparent conductive member 130, the substrate 100 and the opposing substrate 200 are completely bonded to each other. That is, by replacing the wiring corresponding to the region where the sealing member 300 is formed with the transparent conductive member 130, it is possible to prevent the sealing member 300 from being uncured by the wiring.

The first metal wire 110 may be a gate wire or a data wire.

In this case, when the first metal wiring 110 is a gate wiring, the gate insulating layer pattern 105 and the passivation layer pattern 115 are formed on the substrate 100 including the first metal wiring 110 and the second metal wiring 120. This may be arranged sequentially. The gate insulating layer pattern 105 includes a first opening C1 exposing portions of the first metal wiring 110 and the second metal wiring 120, respectively. In the passivation layer pattern 115, a second opening C2 corresponding to the first opening C1 is formed. That is, one ends of the first metal wiring 110 and the second metal wiring 120 are formed by the first and second openings C1 and C2 provided in the gate insulating film pattern 105 and the passivation film pattern 115, respectively. Are exposed respectively. In this case, the transparent conductive member 130 is connected to the first metal wiring 110 and the second metal wiring 120 exposed by the first and second openings C1 and C2, and thus, the first metal wiring 110. ) And the second metal wire 120 are electrically connected to each other.

That is, the gate insulating film pattern 105 and the protective film pattern 115 are interposed between the first metal wiring 110 and the transparent conductive member 130.

In contrast, when the first metal wire 110 is a data wire, the passivation layer pattern 115 may be disposed on the substrate 100 including the first metal wire 110 and the second metal wire 120. . The passivation layer pattern 115 has openings that expose the first metal wiring 110 and the second metal wiring 120, respectively, and the first metal wiring 110 and the second metal wiring (exposed through the opening) are formed. 120 may be electrically connected to each other using the transparent conductive member 130. That is, the protective film pattern 115 is interposed between the first metal wiring 110 and the transparent conductive member 130.

On the other hand, when the flat panel display device is a liquid crystal display device, the counter substrate 200 may include a color filter pattern for transmitting light to implement color and a black matrix for preventing light from leaking. In addition, a liquid crystal may be interposed between the substrate 100 and the counter substrate 200.

In contrast, when the flat panel display device is an organic light emitting display device, the counter substrate 200 is electrically connected to a thin film transistor formed on the substrate 100, and includes an anode, an organic light emitting layer, and a cathode. It may include. Alternatively, the counter substrate 200 may include an absorbent for removing oxygen and moisture, and the organic light emitting layer may be deteriorated by moisture or oxygen, thereby preventing the life of the device from decreasing.

2 is a diagram illustrating a flat panel display device according to a second exemplary embodiment of the present invention.

The flat panel display device according to the second embodiment of the present invention except that the first metal wire 110 and the second metal wire 120 are exposed through one opening. It includes the same components as. As such, the same components will be denoted by the same reference numerals and will be omitted and repeated.

Referring to FIG. 2, the flat panel display includes a pixel area 100a, a peripheral area 100b formed around the pixel area 100a, and an encapsulation area 100c interposed between the pixel area 100a and the peripheral area 100b. And a substrate 100 having (). The first metal member 110 is disposed in the pixel region 100a, and the second metal member corresponding to and spaced apart from the first metal member 110 is disposed in the peripheral region 100b. In addition, a transparent conductive member 130 for electrically connecting the first metal member 110 and the second metal member to each other is disposed in the sealing region 100c.

When the first metal wire 110 is a gate wire, the gate insulating layer pattern 105 ′ and the passivation layer pattern 115 ′ are formed on the substrate 100 including the first metal wire 110 and the second metal wire 120. Is formed. The gate insulating layer pattern 105 ′ and the passivation layer pattern 115 ′ have an opening C3 that simultaneously exposes the first metal line 110 and the second metal line 120. That is, the opening C3 exposes a portion of the first metal member 110 and the second metal member 120 and the substrate 100 corresponding to the sealing region 100c.

In this case, the transparent conductive member 130 is disposed on the substrate 100 exposed to the opening C3, the first metal member 110, and the second metal member 120, whereby the first metal member 110 and The second metal member 120 is electrically connected.

In contrast, when the first metal wire 110 is a data wire, the passivation layer pattern 115 ′ is disposed on the substrate 100 including the first metal wire 110 and the second metal wire 120. In addition, a gate insulating film pattern is interposed between the substrate 100 and the first metal wiring 110. In this case, the passivation layer pattern 115 ′ has an opening C3 exposing the first metal wire 110 and the second metal wire 120 at the same time. That is, the opening C3 exposes portions of the first metal member 110 and the second metal member 120 and the gate insulating layer pattern corresponding to the sealing region 100c.

In this case, the transparent conductive member 130 is disposed on the gate insulating layer pattern exposed to the opening C3, on the first metal member 110 and the second metal member 120, thereby providing the first metal member 110 and The second metal member 120 is electrically connected.

Thus, as the openings exposing the first metal member 110 and the second metal member 120 are disposed at the same time, the transparent conductive member 130 may be formed of the first metal member 110 and the second metal member 120. The area in contact with each other is increased to prevent the contact resistance from increasing.

3A to 3D are flowcharts illustrating a method of manufacturing a flat panel display device according to a third embodiment of the present invention.

Referring to FIG. 3A, a substrate 100 is provided. The substrate 100 includes a pixel region 100a in which an image is displayed, a peripheral region 100b formed around the pixel region 100a, and a sealing region 100c interposed between the pixel region 100a and the peripheral region 100b. Has

The metal is deposited on the substrate 100 and patterned to form the first metal wiring 110 and the second metal wiring 120 separated from each other. In this case, the first metal wiring part 110 is located in the pixel area 100a and the second metal wiring part 120 is located in the peripheral area 100b. In this case, the first metal wiring unit 110 corresponds to the second metal wiring unit 120 and is formed to be spaced at a predetermined interval.

Referring to FIG. 3B, when the first metal wire part 110 is a gate wire, the first and second metal wire parts (eg, on the substrate 100 including the first and second metal wire parts 110 and 120) may be formed. The gate insulating layer pattern 105 and the passivation layer pattern 115 having the openings C partially exposing the portions 110 and 120, respectively, are formed. In this case, as shown in the drawing, the openings C may be formed at end portions of the first and second metal wiring portions 110 and 120, respectively, but are not limited thereto. The first and second metal wires 110 and 120 may be formed to expose end portions, respectively.

Here, the gate insulating layer pattern 105 may be formed by depositing a silicon nitride film or a silicon oxide film and then patterning the same. In addition, the protective film pattern 115 may be formed by depositing a silicon nitride film or a silicon oxide film and patterning the same. Alternatively, the protective film pattern 115 may be formed by applying a photosensitive resin film and then performing exposure and development processes.

Referring to FIG. 3C, a transparent conductive layer is deposited on the entire surface of the substrate 100 including the passivation layer pattern 115, and then patterned to form a transparent conductive layer to electrically connect the first and second metal interconnections 110 and 120. The member 130 is formed. The transparent conductive film may be formed by depositing indium tin oxide or indium zinc oxide by sputtering. In this case, the transparent conductive member 130 is formed corresponding to the sealing region 100c.

Referring to FIG. 3D, an opposing substrate 200 for attaching to the substrate 100 is provided.

After forming the sealing member 300 including the photocurable material in the outer portion of the substrate 100 or the opposing substrate 200, that is, the sealing region 100c, the opposing substrate 200 is aligned with the substrate 100. Let's do it. In this case, the sealing member 300 is also formed on the transparent conductive member 130 that electrically connects the first metal wiring 110 and the second metal wiring 120.

A light source device (not shown) is provided to provide light for curing the sealing member 300 to the rear surface of the substrate 100.

The light source device provides light to the sealing member 300 to cure the sealing member 300 so that the substrate 100 and the opposite substrate 200 are brought into close contact with each other. In this case, the light passes through the transparent conductive member 130 formed in the substrate 100 and the sealing region 100c and irradiates the sealing member 300 to cure the sealing member 300.

That is, by replacing the wiring formed in the region through which light is transmitted with the transparent conductive member through which light can be transmitted, the sealing member 300 is not completely cured by the wiring through which light is not conventionally transmitted. And defects caused by poor adhesion between the counter substrate 200 can be prevented.

As described above, the flat panel display device and the manufacturing method thereof according to the present invention replace the wiring disposed in the formation region of the sealing member with a transparent conductive member through which light can pass, thereby preventing the substrate from being opposed to the substrate by the uncured sealing member. The adhesiveness of liver was prevented from falling.

Further, due to the increase in adhesion between the substrate and the counter substrate, the interior between the substrate and the counter substrate can be completely blocked from the outside air, thereby protecting the substrate or the element formed on the counter substrate from the outside air.

Although described above with reference to embodiments of the present invention, those skilled in the art can variously modify and change the present invention without departing from the spirit and scope of the invention described in the claims below. I can understand that.

Claims (11)

A substrate having a pixel region in which an image is displayed, a peripheral region formed around the pixel region, and a sealing region interposed between the pixel region and the peripheral region; A first metal wiring part disposed in the pixel area; A second metal wiring part disposed in the peripheral area and corresponding to the first metal wiring part; A transparent conductive member electrically connecting the first and second metal wiring portions; And And a sealing member disposed on the transparent conductive member disposed on the sealing region, the sealing member including a photocurable material cured by light passing through the transparent conductive member. The method of claim 1, And the transparent conductive member includes indium tin oxide or indium zinc oxide. The method of claim 1, And the first metal wiring is a gate wiring for supplying a scanning signal to the pixel region. The method of claim 1, And the first metal wiring is a data wiring for supplying a data signal to the pixel region. The method of claim 1, And a passivation layer pattern interposed between the first metal interconnection and the transparent conductive member and having an opening exposing a portion of the first metal interconnection. The method of claim 1, A gate insulating layer pattern interposed between the first metal wiring and the transparent conductive member and having a first opening exposing a portion of the first metal wiring and a protective film pattern having a second opening corresponding to the first opening. Flat panel display device further comprising. Providing a substrate having a pixel region in which an image is displayed, a peripheral region formed around the pixel region, and a sealing region interposed between the pixel region and the peripheral region; Forming a first metal wiring part positioned in the pixel area and a second metal wiring part located in the peripheral area and corresponding to the first metal wiring part and spaced apart from the first metal wiring part; Forming a transparent conductive member electrically connecting the first and second metal interconnections; And And forming a sealing member comprising a photocurable material cured by the light passing through the transparent conductive member on the light transmitting conductive member corresponding to the sealing region. The method of claim 7, wherein And the transparent conductive member is formed of indium tin oxide or indium zinc oxide. The method of claim 7, wherein Between forming the first and second metal wires and forming the transparent conductive member, respectively, And forming a passivation pattern having an opening exposing a portion of the first metal wiring on a substrate including the first metal wiring. The method of claim 7, wherein Between forming the first and second metal wires and forming the transparent conductive member, respectively, Forming a gate insulating layer pattern having a first opening exposing a portion of the first metal wiring on a substrate including the first metal wiring; And And forming a passivation layer pattern having a second opening corresponding to the first opening on the gate insulating layer pattern. The method of claim 7, wherein Providing an opposing substrate disposed to face the substrate; And And bonding the substrate to the counter substrate with the sealing member.

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