CN110797351A - Array substrate, detection method thereof, display panel and display device - Google Patents
Array substrate, detection method thereof, display panel and display device Download PDFInfo
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- CN110797351A CN110797351A CN201911087102.0A CN201911087102A CN110797351A CN 110797351 A CN110797351 A CN 110797351A CN 201911087102 A CN201911087102 A CN 201911087102A CN 110797351 A CN110797351 A CN 110797351A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/805—Electrodes
- H10K50/81—Anodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
Abstract
The invention discloses an array substrate, a detection method thereof, a display panel and a display device, when particles are generated in the technical processes of a buffer layer, an active layer, ITO and the like in any pixel unit to cause bad short, the first extension part in the normal pixel unit adjacent to the abnormal pixel unit with short defect and with the same light-emitting color can be electrically connected with the second extension part in the abnormal pixel unit by laser melting, even if the anode electrode in the abnormal pixel unit is electrically connected with the anode electrode in the normal pixel unit, so that the abnormal pixel unit is driven by the normal pixel unit to normally emit light, the bright point pixel units and the dark point pixel units can be maintained as normal pixel units, the display effect of the picture is improved, in addition, the invention only needs to change the composition process of the shading part and the anode, does not need to add other processes and film layers, and realizes simpler process of maintaining the abnormal pixel unit.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a detection method thereof, a display panel and a display device.
Background
Organic Light Emitting Diodes (OLEDs) are one of the hot spots in the research field of flat panel displays, and compared with Liquid Crystal Displays (LCDs), OLED displays have the advantages of low energy consumption, low production cost, self-luminescence, wide viewing angle, fast response speed, and the like. Currently, in the display fields of mobile phones, tablet computers, digital cameras, and the like, OLED displays have begun to replace traditional LCD displays.
Disclosure of Invention
The embodiment of the invention provides an array substrate, a detection method thereof, a display panel and a display device, which are used for solving the problems that in the prior art, pixels are poor in short caused by Particle foreign matters, so that bright spots or dark spots displayed on a lighting picture are poor, and the picture quality is seriously influenced.
Therefore, an embodiment of the present invention provides an array substrate, including a plurality of pixel units distributed in an array, where each pixel unit includes a light shielding portion, a thin film transistor, and an anode electrically connected to the light shielding portion, the light shielding portion being located on a substrate in a stacked manner; wherein the content of the first and second substances,
in any one of the pixel units, the light shielding portion has a first extending portion extending in a direction of one of the adjacent pixel units having the same emission color, and the anode has a second extending portion extending in a direction of the other one of the adjacent pixel units having the same emission color;
in two adjacent pixel units with the same light emitting color, orthographic projections of the first extension part in one pixel unit and the second extension part in the other pixel unit on the substrate have an overlapping area, and the first extension part and the second extension part are insulated from each other.
Optionally, in a specific implementation, in the array substrate provided in an embodiment of the present invention, the array substrate further includes: a passivation layer between the thin film transistor and the anode electrode, and a planarization layer between the passivation layer and the anode electrode; the second extension contacts the passivation layer through a first via that extends through the planarization layer.
Optionally, in a specific implementation, in the array substrate provided in an embodiment of the present invention, the array substrate further includes: a color resist layer between the passivation layer and the planarization layer, the color resist layer not overlapping the overlap region.
Optionally, in a specific implementation, in the array substrate provided in an embodiment of the present invention, the array substrate further includes: a buffer layer between the light shielding portion and the thin film transistor, an interlayer insulating layer between the buffer layer and the passivation layer, and a lap joint portion between the passivation layer and the first extension portion;
the lap joint part is electrically connected with the first extension part through a second through hole penetrating through the buffer layer and the interlayer insulating layer, and orthographic projections of the lap joint part and the second extension part on the substrate base plate have an overlapping area.
Optionally, in a specific implementation, in the array substrate provided in the embodiment of the present invention, the overlapping portion and the drain electrode of the thin film transistor are disposed in the same layer.
Optionally, in a specific implementation manner, in the array substrate provided in an embodiment of the present invention, in each pixel unit, the anode is electrically connected to the drain of the thin film transistor through a third via penetrating through the passivation layer, and the drain of the thin film transistor is electrically connected to the light shielding portion through a fourth via penetrating through the interlayer insulating layer and the buffer layer.
Correspondingly, the embodiment of the invention also provides a display panel which comprises any one of the array substrates provided by the embodiment of the invention.
Correspondingly, the embodiment of the invention also provides a display device which comprises the display panel provided by the embodiment of the invention.
Correspondingly, the embodiment of the invention also provides a detection method of the array substrate, which comprises the following steps:
in the lighting test stage, if an abnormal pixel unit exists, a first extension part in a normal pixel unit which is adjacent to the abnormal pixel unit and has the same light-emitting color is electrically connected with a second extension part in the abnormal pixel unit through a laser melting mode, so that an anode in the normal pixel unit is conducted with an anode in the abnormal pixel unit.
Optionally, in specific implementation, in the detection method provided in this embodiment of the present invention, before melting the passivation layer corresponding to the overlap region with laser light, the method further includes:
and melting the active layer of the thin film transistor by using laser to disconnect the thin film transistor.
The embodiment of the invention has the beneficial effects that:
in any pixel unit, the light shielding part is provided with a first extending part which extends towards one adjacent pixel unit with the same light emitting color, and the anode is provided with a second extending part which extends towards the other adjacent pixel unit with the same light emitting color; in two adjacent pixel units with the same light emitting color, orthographic projections of the first extension part in one pixel unit and the second extension part in the other pixel unit on the substrate have an overlapping area, and the first extension part and the second extension part are insulated from each other. Therefore, when short is caused by Particle generated in the process of a buffer layer, an active layer, ITO and the like in any pixel unit, the first extension part in the normal pixel unit which is adjacent to the abnormal pixel unit with the short defect and has the same light-emitting color can be electrically connected with the second extension part in the abnormal pixel unit in a laser melting mode, even if the anode in the abnormal pixel unit is electrically connected with the anode in the normal pixel unit, the abnormal pixel unit is driven to normally emit light by the normal pixel unit, the bright point pixel unit and the dark point pixel unit can be maintained to be the normal pixel unit, the display effect of a picture is improved, in addition, only the composition process of the shading part and the anode needs to be changed, other processes and film layers do not need to be added, and the process for maintaining the abnormal pixel unit is simpler.
Drawings
Fig. 1 is a schematic top view of an array substrate in the related art;
FIG. 2 is a schematic diagram of an abnormal pixel emission of the array substrate shown in FIG. 1;
fig. 3 is a schematic cross-sectional view of an array substrate according to an embodiment of the invention;
fig. 4 is a schematic top view of the array substrate shown in fig. 3;
fig. 5 is a second schematic cross-sectional view illustrating an array substrate according to an embodiment of the invention;
fig. 6A to 6D are schematic cross-sectional views illustrating a manufacturing method of an array substrate according to an embodiment of the invention after each step is performed;
fig. 7 is a schematic diagram of a capacitor structure of each pixel unit in the array substrate according to the embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, specific embodiments of an array substrate, a manufacturing method thereof, a display panel and a display device according to an embodiment of the present invention are described in detail below with reference to the accompanying drawings.
The thicknesses and shapes of the films in the drawings do not reflect the actual scale of the array substrate, and are only intended to illustrate the present invention.
In the related art, as shown in fig. 1, an Array substrate of an OLED includes a light-shielding portion 01, a Buffer layer 02, a Gate layer 03, an active layer 04, a source drain electrode layer 05, and an anode layer 06 on a substrate, and in the process of preparing the above film layers in the Array process, short defects between IGZO-Gate/SD or ITO-EL electrodes are easily caused due to Particle-like foreign matters in the processes of Buffer (Buffer layer 01), IGZO (active layer 04), ITO (anode layer 06), and the like, such as at black dot positions in fig. 1; in the lighting test, as shown in fig. 2, the lighting screen displays a bright spot or a dark spot, which results in a serious influence on the screen quality. In the process of repairing the Array and the panel, at present, only visible line defects and bright spot defects can be subjected to dark spot treatment, and the panel cannot be maintained in an OK state; when there are many line defects and bright dot defects, even if the repair is possible, the display effect of the picture is affected (panel scrap standard: dark dots >10, bright dots >0, and lines > 0), resulting in panel scrap processing.
In view of this, as shown in fig. 3 and fig. 4, fig. 3 is a schematic cross-sectional structure diagram of an array substrate according to an embodiment of the present invention, fig. 4 is a schematic top-view structure diagram of the array substrate shown in fig. 3, which includes a plurality of pixel units distributed in an array, each pixel unit includes a light shielding portion 2, a thin film transistor 3 and an anode 4 electrically connected to the light shielding portion 2, which are stacked on a substrate 1; wherein the content of the first and second substances,
in any one pixel unit, the light shielding portion 2 has a first extension portion 21 extending in a direction of one of adjacent pixel units having the same emission color, and the anode 4 has a second extension portion 41 extending in a direction of the other one of adjacent pixel units having the same emission color;
in two adjacent pixel units with the same light emitting color, orthographic projections of the first extension part 21 in one pixel unit and the second extension part 41 in the other pixel unit on the substrate 1 have an overlapping area, and the first extension part 21 and the second extension part 41 are insulated from each other; fig. 3 illustrates only a partial structure of two adjacent pixel units having the same emission color, wherein the left pixel unit only illustrates that the light shielding portion 2 of the left pixel unit has the first extending portion 21 extending toward the right pixel unit, the second extending portion 41 extending toward the left of the anode 4 of the left pixel unit is not illustrated, the right pixel unit only illustrates the second extending portion 41 extending toward the left pixel unit of the anode 4 of the right pixel unit, and the first extending portion 21 extending toward the right pixel unit of the light shielding portion 2 of the right pixel unit is not illustrated, and fig. 3 is only for schematically explaining the present invention.
In the array substrate provided by the embodiment of the present invention, in any one pixel unit, the light shielding portion 2 is provided with the first extending portion 21 extending to one of the adjacent pixel units with the same emission color, and the anode 4 is provided with the second extending portion 41 extending to the other adjacent pixel unit with the same emission color; in two adjacent pixel units with the same light emitting color, orthographic projections of the first extension part 21 in one pixel unit and the second extension part 41 in the other pixel unit on the substrate 1 have an overlapping area, and the first extension part 21 and the second extension part 41 are insulated from each other. When short defect is caused by Particle generated in the process of buffer layer, active layer, ITO and the like in any pixel unit, the first extension portion 21 in the normal pixel unit (e.g. the left pixel unit in fig. 3) adjacent to the abnormal pixel unit (e.g. the right pixel unit in fig. 3) with the short defect and having the same light emission color can be electrically connected to the second extension portion 41 in the abnormal pixel unit by laser melting, even if the anode electrode 4 in the abnormal pixel unit is electrically connected to the anode electrode 4 in the normal pixel unit, so that the abnormal pixel unit is driven by the normal pixel unit to emit light normally, the bright point pixel units and the dark point pixel units can be maintained as normal pixel units, the display effect of the picture is improved, in addition, the invention only needs to change the composition process of the shading part and the anode, does not need to add other processes and film layers, and realizes simpler process of maintaining the abnormal pixel unit.
The first extension portion and the second extension portion are insulated from each other, which means that when the pixel unit normally emits light, the first extension portion and the second extension portion are provided with an insulating layer therebetween without electrical connection, and only when the pixel unit is abnormal (a lighting picture displays a bright spot or a dark spot), the insulating layer between the first extension portion and the second extension portion is melted by laser, so that when the pixel unit normally emits light, the first extension portion and the second extension portion do not affect the normal display function.
Optionally, in a specific implementation, as shown in fig. 3, the array substrate provided in the embodiment of the present invention further includes: a passivation layer 5 between the thin film transistor 3 and the anode electrode 4, and a planarization layer 6 between the passivation layer 5 and the anode electrode 4; since the film thickness of the anode 4 is thin, in order to ensure that the second extension portion 41 and the first extension portion 21 can be successfully electrically connected when the insulating layer between the second extension portion 41 and the first extension portion 21 is melted by laser, without the risk of wire breakage, it is necessary to reduce the thickness of the insulating layer between the second extension portion 41 and the first extension portion 21 as much as possible when normal display is not affected, so that the second extension portion 41 is in contact with the passivation layer 5 through the first via hole 01 penetrating through the planarization layer 6, so that the planarization layer 6 can be reduced between the second extension portion 41 and the first extension portion 21, and the probability of successful electrical connection between the second extension portion 41 and the first extension portion 21 through laser melting can be increased.
In a specific implementation, the material of the planarization layer may be a resin material, and the planarization layer of the resin material may improve adhesion between the anode and the substrate.
Optionally, in a specific implementation, as shown in fig. 3, the array substrate provided in the embodiment of the present invention further includes: and the color resistance layer 7 is positioned between the passivation layer 5 and the planarization layer 6, and the color resistance layer 7 does not overlap with the overlapping area. Specifically, the present invention provides that by disposing the color resist layer 7 between the passivation layer 5 and the planarization layer 6, that is, by using bottom emission type light emission, the color resist layer may include color resists of different colors, such as a red (R) color resist, a green (G) color resist, and a blue (B) color resist, and may further include other colors, such as a yellow color resist, and the like, and the color resist layer 7 does not overlap the overlapping region, so that when an abnormal pixel unit occurs, and the insulating layer of the overlapping region is melted by means of laser melting to electrically connect the second extension portion 41 and the first extension portion 21, the laser melting does not damage the color resist of the color resist layer 7 because the color resist layer 7 does not overlap the overlapping region.
Optionally, in a specific implementation, as shown in fig. 3, the array substrate provided in the embodiment of the present invention further includes: the buffer layer 8 is located between the light shielding portion 2 and the thin film transistor 3, and the interlayer insulating layer 9 is located between the buffer layer 8 and the passivation layer 5, because the passivation layer 5, the interlayer insulating layer 9 and the buffer layer 8 are located between the second extending portion 41 and the first extending portion 21 in fig. 3, the distance between the second extending portion 41 and the first extending portion 21 is relatively long, and because the anode 4 is relatively thin, when an abnormal pixel occurs and laser melting is required to electrically connect the second extending portion 41 and the first extending portion 21, the risk that the lap joint of the second extending portion 41 and the first extending portion 21 is unsuccessful is likely to occur; therefore, in order to ensure that the second extension portion 41 and the first extension portion 21 can be successfully lapped, as shown in fig. 5, the array substrate provided in the embodiment of the present invention further includes a lapping portion 10 located between the passivation layer 5 and the first extension portion 21;
the bridging portion 10 is electrically connected with the first extension portion 21 through a second via hole 02 penetrating through the buffer layer 8 and the interlayer insulating layer 9, and the orthographic projections of the bridging portion 10 and the second extension portion 41 on the substrate base plate 1 have an overlapping region, so that only the passivation layer 5 is arranged between the bridging portion 10 and the second extension portion 41 by presetting the bridging portion 10 electrically connected with the first extension portion 21, and the distance of the bridging between the first extension portion 21 and the second extension portion 41 is further reduced, therefore, when the first extension portion 21 and the second extension portion 41 need to be lapped by laser melting, only the passivation layer 5 needs to be melted, the second extension portion 41 and the bridging portion 10 can be ensured to be successfully electrically connected, so that the first extension portion 21 and the second extension portion 41 can be successfully electrically connected, and the probability of successful electrical connection of the second extension portion 41 and the first extension portion 21 through laser melting is further improved.
In specific implementation, in the array substrate provided in the embodiment of the present invention, as shown in fig. 3 and 5, the thin film transistor 3 includes an active layer 31, a gate insulating layer 32, a gate 33, and source and drain electrodes (a source electrode 34 and a drain electrode 35) that are sequentially stacked on the buffer layer 8.
Alternatively, in practical implementation, in the array substrate provided in the embodiment of the present invention, as shown in fig. 5, the overlapping portion 10 and the drain 35 of the thin film transistor 3 are disposed in the same layer. Thus, the patterns of the overlapping part 10 and the drain electrode 35 can be formed by one-time composition process only by changing the original composition pattern when the drain electrode 35 of the thin film transistor 3 is formed, the process for independently preparing the overlapping part 10 is not needed, the preparation process flow can be simplified, the production cost is saved, and the production efficiency is improved.
Alternatively, in specific implementation, in the array substrate provided by the embodiment of the invention, as shown in fig. 3 and 5, in each pixel unit, the anode 4 is electrically connected to the drain electrode 35 of the thin film transistor 3 through a third via 03 penetrating through the passivation layer 5, and the drain electrode 35 of the thin film transistor 3 is electrically connected to the light shielding portion 2 through a fourth via 04 penetrating through the interlayer insulating layer 9 and the buffer layer 8. That is, the anode 4 of the pixel unit in the embodiment of the present invention is electrically connected to the light shielding portion 2 through the drain 35, so that the anode voltage and current can be directly supplied to the abnormal pixel unit through the normal pixel unit.
Based on the same inventive concept, the embodiment of the invention also provides a detection method of the array substrate, which comprises the following steps:
in the lighting test stage, if an abnormal pixel unit exists, the first extension part in the normal pixel unit adjacent to the abnormal pixel unit and having the same light emitting color is electrically connected with the second extension part in the abnormal pixel unit through a laser melting mode, so that the anode in the normal pixel unit is conducted with the anode in the abnormal pixel unit.
According to the detection method of the array substrate provided by the embodiment of the invention, when short defect is caused by Particle generated in the process of buffer layer, active layer, ITO and the like in any pixel unit, the first extension part in the normal pixel unit which is adjacent to the abnormal pixel unit with the short defect and has the same light-emitting color can be electrically connected with the second extension part in the abnormal pixel unit in a laser melting mode, even if the anode in the abnormal pixel unit is electrically connected with the anode in the normal pixel unit, so that the abnormal pixel unit is driven to normally emit light through the normal pixel unit, and the picture display quality is improved.
Specifically, as shown in fig. 5, in the lighting test stage, if there is an abnormal pixel unit (e.g., the right pixel unit in fig. 5), the passivation layer 5 between the first extension portion 21 and the second extension portion 41 is melted by laser melting, so that the second extension portion 41 of the abnormal pixel unit is electrically connected to the bridging portion 10, and thus the first extension portion 21 in the normal pixel unit (the left pixel unit in fig. 5) adjacent to the abnormal pixel unit and having the same light emission color is electrically connected to the second extension portion 41 (the right pixel unit in fig. 5) in the abnormal pixel unit, even if the anode 4 in the normal pixel unit is electrically connected to the anode 4 in the abnormal pixel unit.
Optionally, in a specific implementation, before melting the passivation layer corresponding to the overlap region with laser, the array substrate provided in the embodiment of the present invention further includes:
the laser is used to melt the active layer of the thin film transistor to turn off the thin film transistor.
Specifically, as shown in fig. 5, in the lighting test stage, if there is an abnormal pixel unit (for example, the pixel unit on the left side in fig. 5), before the passivation layer 5 corresponding to the overlap region is melted by the laser, the active layer 31 of the thin film transistor 3 is melted by the laser melting method to turn off the thin film transistor 3.
The following describes the manufacturing method of the array substrate shown in fig. 5 in detail by using an embodiment.
(1) Depositing the light shielding portion 2 on the substrate, and the light shielding portion 2 in each pixel unit has a first extension portion 21 extending to an adjacent pixel unit having the same emission color, as shown in fig. 6A;
(2) depositing a buffer layer on the substrate with the light shielding part 2, subsequently depositing a metal oxide film such as IGZO material, forming an active layer 31 pattern by a patterning process, depositing a gate insulating layer (the material may be SiO2), depositing a gate metal layer, the metal material may be Cu or Al, forming a gate electrode 33 by glue coating, exposing, developing, etching, and stripping photoresist, wherein after the gate electrode 33 is etched, the gate insulating layer not covered by the gate electrode 33 is stripped, and the active layer 31 is conducted with a conductor, as shown in fig. 6B, fig. 6B only shows the active layer 31 and the gate electrode 33 pattern;
(3) depositing an interlayer insulating layer (the material may be SiO2) on the substrate on which the gate electrode 33 is formed, forming a fourth via hole 04 in the interlayer insulating layer and the buffer layer by an etching process in a region corresponding to the anode electrode 4, and forming a second via hole 02 in the interlayer insulating layer and the buffer layer by an etching process in a region corresponding to the first extension portion 21, as shown in fig. 6C;
(4) depositing a metal layer which can be made of Cu or Al over the interlayer insulating layer, retaining the metal layer over the first extension portion 21 through a patterning process to form a landing part 10, forming source and drain electrodes (source electrode 34 and drain electrode 35) through etching-stripping and other processes, electrically connecting the drain electrode with the light shielding part 2 through the fourth via hole 04, depositing a passivation layer (which can be made of SiO2) over the source and drain electrodes (source electrode 34 and drain electrode 35), and forming a third via hole in a region of the passivation layer corresponding to the drain electrode 35, as shown in fig. 6D;
(5) depositing a color resistance layer on the passivation layer, depositing a planarization layer on the color resistance layer, forming a first via hole in the planarization layer at a region corresponding to the first extension portion 21, then depositing an ITO electrode layer on the planarization layer, forming an anode 4 through a series of processes of glue coating, exposure, etching and stripping, and the anode having a second extension portion 41 extending toward another adjacent pixel unit with the same light emission color, as shown in fig. 4; the anode 4 and the light shielding portion 2 are electrically connected to the drain 35 through a third via hole, as in the capacitive structure shown in fig. 7, so that an anode voltage and a current can be directly supplied to the abnormal pixel through the normal pixel.
The detection panel shown in fig. 5 provided by the embodiment of the present invention can be obtained through the steps (1) to (5) of the first embodiment.
Based on the same inventive concept, the embodiment of the invention further provides a display panel, which comprises any one of the array substrates provided by the embodiment of the invention. The principle of the display panel to solve the problem is similar to the array substrate, so the implementation of the display panel can be referred to the implementation of the array substrate, and repeated details are not repeated herein.
Based on the same inventive concept, the embodiment of the invention further provides a display device, which comprises the display panel provided by the embodiment of the invention. The principle of the display device to solve the problem is similar to the display panel, so the implementation of the display device can be referred to the implementation of the display panel, and repeated details are not repeated herein.
In any pixel unit, the light shielding part is provided with a first extending part which extends towards one adjacent pixel unit with the same light emitting color, and the anode is provided with a second extending part which extends towards the other adjacent pixel unit with the same light emitting color; in two adjacent pixel units with the same light emitting color, orthographic projections of the first extension part in one pixel unit and the second extension part in the other pixel unit on the substrate have an overlapping area, and the first extension part and the second extension part are insulated from each other. Therefore, when short is caused by Particle generated in the process of a buffer layer, an active layer, ITO and the like in any pixel unit, the first extension part in the normal pixel unit which is adjacent to the abnormal pixel unit with the short defect and has the same light-emitting color can be electrically connected with the second extension part in the abnormal pixel unit in a laser melting mode, even if the anode in the abnormal pixel unit is electrically connected with the anode in the normal pixel unit, the abnormal pixel unit is driven to normally emit light by the normal pixel unit, the bright point pixel unit and the dark point pixel unit can be maintained to be the normal pixel unit, the display effect of a picture is improved, in addition, only the composition process of the shading part and the anode needs to be changed, other processes and film layers do not need to be added, and the process for maintaining the abnormal pixel unit is simpler.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. An array substrate is characterized by comprising a plurality of pixel units distributed in an array mode, wherein each pixel unit comprises a shading part, a thin film transistor and an anode, wherein the shading part, the thin film transistor and the anode are positioned on a substrate in a stacked mode; wherein the content of the first and second substances,
in any one of the pixel units, the light shielding portion has a first extending portion extending in a direction of one of the adjacent pixel units having the same emission color, and the anode has a second extending portion extending in a direction of the other one of the adjacent pixel units having the same emission color;
in two adjacent pixel units with the same light emitting color, orthographic projections of the first extension part in one pixel unit and the second extension part in the other pixel unit on the substrate have an overlapping area, and the first extension part and the second extension part are insulated from each other.
2. The array substrate of claim 1, further comprising: a passivation layer between the thin film transistor and the anode electrode, and a planarization layer between the passivation layer and the anode electrode; the second extension contacts the passivation layer through a first via that extends through the planarization layer.
3. The array substrate of claim 2, further comprising: a color resist layer between the passivation layer and the planarization layer, the color resist layer not overlapping the overlap region.
4. The array substrate of claim 2, further comprising: a buffer layer between the light shielding portion and the thin film transistor, an interlayer insulating layer between the buffer layer and the passivation layer, and a lap joint portion between the passivation layer and the first extension portion;
the lap joint part is electrically connected with the first extension part through a second through hole penetrating through the buffer layer and the interlayer insulating layer, and orthographic projections of the lap joint part and the second extension part on the substrate base plate have an overlapping area.
5. The array substrate of claim 4, wherein the landing part is disposed on the same layer as a drain electrode of the thin film transistor.
6. The array substrate of claim 4, wherein in each of the pixel units, the anode is electrically connected to the drain electrode of the thin film transistor through a third via hole penetrating the passivation layer, and the drain electrode of the thin film transistor is electrically connected to the light shielding portion through a fourth via hole penetrating the interlayer insulating layer and the buffer layer.
7. A display panel comprising the array substrate according to any one of claims 1 to 6.
8. A display device characterized by comprising the display panel according to claim 7.
9. An inspection method of the array substrate according to any one of claims 1 to 6, comprising:
in the lighting test stage, if an abnormal pixel unit exists, a first extension part in a normal pixel unit which is adjacent to the abnormal pixel unit and has the same light-emitting color is electrically connected with a second extension part in the abnormal pixel unit through a laser melting mode, so that an anode in the normal pixel unit is conducted with an anode in the abnormal pixel unit.
10. The inspection method of claim 9, further comprising, before laser melting the passivation layer corresponding to the overlap region:
and melting the active layer of the thin film transistor by using laser to disconnect the thin film transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911087102.0A CN110797351B (en) | 2019-11-08 | 2019-11-08 | Array substrate, detection method thereof, display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911087102.0A CN110797351B (en) | 2019-11-08 | 2019-11-08 | Array substrate, detection method thereof, display panel and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110797351A true CN110797351A (en) | 2020-02-14 |
| CN110797351B CN110797351B (en) | 2022-05-20 |
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| WO2021227062A1 (en) * | 2020-05-15 | 2021-11-18 | 京东方科技集团股份有限公司 | Display panel and electronic apparatus |
| CN113764490A (en) * | 2021-09-06 | 2021-12-07 | 深圳市华星光电半导体显示技术有限公司 | OLED display panel |
| WO2023206618A1 (en) * | 2022-04-27 | 2023-11-02 | 深圳市华星光电半导体显示技术有限公司 | Display panel and method for repairing display panel |
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