KR101616927B1 - Method for fabricating liquid crystal display device - Google Patents

Abstract

The present invention discloses a method of manufacturing a liquid crystal display device. According to another aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, including: forming a common electrode and a first device electrode on a substrate; Sequentially forming a gate insulating layer, an amorphous silicon layer and an amorphous silicon layer on the substrate on which the gate electrode is formed, and then forming an active layer on the gate electrode; Forming a source / drain metal film on the substrate on which the active layer is formed, and then forming a source / drain electrode and a second device electrode in the seal region; Forming a protective layer on the substrate on which the source / drain electrode is formed, and exposing a portion of the drain electrode, the common line, the first device electrode, and the second device electrode; And a transparent conductive material layer and an insulating layer are sequentially formed on the substrate having the protective layer formed thereon, and then sequentially subjected to a first dry etching process, a wet etching process, and a second dry etching process to sequentially form a pixel electrode, A contact pattern connecting the first and second device electrodes, and forming a capping layer on the connection pattern.

Description

TECHNICAL FIELD [0001] The present invention relates to a method for fabricating a liquid crystal display device,

The present invention relates to a method for manufacturing a liquid crystal display device.

An ordinary liquid crystal display device displays an image by adjusting the light transmittance of a liquid crystal having dielectric anisotropy using an electric field. To this end, a liquid crystal display device includes a liquid crystal display panel in which pixel regions are arranged in a matrix form and a driving circuit for driving the liquid crystal display panel.

In the liquid crystal display panel, a TFT (Thin Film Transistor) substrate and a color filter substrate are bonded together with a liquid crystal layer interposed therebetween. Accordingly, in order to drive the liquid crystal layer for each pixel, a plurality of gate lines and a plurality of data lines are arranged on the TFT substrate to define a pixel region. A pixel electrode is formed in each pixel region, and a TFT is formed in a portion where each gate line and the data line cross each other. And the TFT is turned on according to a scan signal of each gate line to apply a data signal of the data line to each pixel electrode.

The color filter substrate may further include a color filter layer formed on each pixel region for implementing red (R), green (G), and blue (B) colors for blocking light at a portion excluding the pixel region, And a common electrode corresponding to the pixel electrode and forming an electric field for driving the liquid crystal layer.

A gate driver for sequentially supplying a scan pulse to each gate line and a data driver for supplying a data signal to each data line are provided.

Conventionally, the gate driver has a separate gate driver IC in which a shift register is incorporated, and connected to a gate line pad of a liquid crystal display panel by using a TCP (Taped Carrier Package) process or the like.

In recent years, however, gate in panel (GIP) technology has been developed for directly mounting a gate driver on a liquid crystal display panel in order to reduce material costs, reduce process water, and shorten the process time.

However, in a liquid crystal display device having a GIP structure, a plurality of signal lines and circuits are formed in a gate pad region, and a bezel width is increased because a seal line is formed at an outer periphery thereof.

When a conductive sealant is used to electrically connect the common line of the TFT substrate and the common electrode of the color filter substrate, a short circuit occurs when a conductive sealant is applied to the GIP region.

If an insulating sealant is applied and a separate Ag dotting process is performed, the process becomes complicated.

Therefore, in order to simplify the process while reducing the width of the bezel, it is necessary to apply the conductive sealant to the GIP region, and to perform the adhesion process and the connection process of the common line and the common electrode at the same time.

An object of the present invention is to provide a method of manufacturing a liquid crystal display device in which a bezel region is reduced by applying a conductive sealant to a GIP region and a signal line region to adhere the TFT substrate and the color filter substrate.

The present invention relates to a liquid crystal display device capable of connecting a common line and a common electrode while preventing a short circuit of the circuit elements by forming a capping layer on a connection pattern connecting the circuit elements of the GIP region and the signal line region to which the conductive sealant is applied There are other purposes in providing the method.

According to another aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, including: forming a gate electrode and a common electrode and a first device electrode in a seal region on a substrate; Sequentially forming a gate insulating film, an amorphous silicon film and an amorphous silicon film on the substrate on which the gate electrode is formed, and then forming an active layer on the gate electrode; Forming a source / drain metal film on the substrate on which the active layer is formed, and then forming a source / drain electrode and a second device electrode in the seal region; Forming a protective layer on the substrate on which the source / drain electrode is formed, and exposing a portion of the drain electrode, the common line, the first device electrode, and the second device electrode; And a transparent conductive material layer and an insulating layer are sequentially formed on the substrate having the protective layer formed thereon, and then sequentially subjected to a first dry etching process, a wet etching process, and a second dry etching process to sequentially form a pixel electrode, A contact pattern connecting the first and second device electrodes, and forming a capping layer on the connection pattern.

The method of manufacturing a liquid crystal display device of the present invention has an effect that a common line and a common electrode can be connected together with a laminating process without short circuit failure in a region where a conductive sealant is formed.

The method of manufacturing a liquid crystal display device of the present invention has an effect of simplifying a manufacturing process by forming a capping layer on a connection pattern of a GIP region when a pixel electrode is formed.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The following embodiments are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the size and thickness of the device may be exaggerated for convenience. Like reference numerals designate like elements throughout the specification.

1 schematically shows a structure of a liquid crystal display device according to the present invention.

Referring to Fig. 1, in the liquid crystal display device of the present invention, the color filter substrate 102 and the TFT substrate 100 are bonded together by the conductive sealant 50. Fig. A / A is an area where an image is displayed as an active area.

On the TFT substrate 100, a plurality of gate lines and a plurality of data lines are arranged in an intersecting manner, and a pixel region is located in a region where gate lines and data lines intersect with each other. In each of the pixel regions, pixel electrodes for forming an electric field are formed.

On the color filter substrate 102, a black matrix and red (R), green (G), and blue (B) color filter layers and a common electrode are formed.

Further, the TFT substrate 100 of the present invention includes a GIP region 33 on which circuit elements of a gate driver are formed. A plurality of signal lines 25 are formed in a region adjacent to the GIP region 33.

A data driver 27 is formed on the other side of the TFT substrate 100. [ Signal lines 25 for supplying signals to the circuit elements of the GIP region 33 are electrically connected to link lines (not shown) drawn from one of the data drivers 27. That is, the signal lines 25 are supplied with signals from the system via any one of the data drivers 27.

The conductive sealant 50 includes a plurality of conductive balls and electrically connects the common line of the signal lines 25 and the common electrode of the color filter substrate 102 to the color filter substrate 102 and the TFT substrate 102. [ (100).

In the present invention, the conductive sealant 50 is applied to the signal lines 25 and the GIP region 33 to reduce the bezel region. Although not shown in the drawing, a capping layer formed of an insulating material may be formed on the connection patterns exposed to the outside in the GIP region 33, so that the common line of the TFT substrate 100 and the color filter substrate And the common electrode of the pixel electrode 102 was electrically connected.

2 is an enlarged cross-sectional view of a signal line region and a GIP region coated with a conductive sealant in the liquid crystal display device of the present invention.

2, the TFT substrate of the liquid crystal display of the present invention has a common line 15 and a first device electrode 16 of a GIP region formed on a first substrate 10, and the common line 15 And the first device electrode 16, a gate insulating film 12 is formed. A second device electrode 21 is formed on the gate insulating film 12 of the GIP region.

A protective film 19 is formed on the first substrate 10 on which the second device electrodes 21 are formed.

The common line 15 has the protective film 19 and the gate insulating film 12 removed for electrical contact with the common electrode 80 of the color filter substrate. A contact electrode 45 is formed in a region where the common line 15 is exposed.

The first device electrode 16 and the second device electrode 21 are connected to each other by a connection pattern 46 in the GIP region and a capping layer 48 made of an insulating material is formed on the connection pattern 46 have.

The color filter substrate includes a black matrix 21 and a color filter layer 23 formed on a second substrate 20 and a common electrode 80 is formed on the black matrix 21 and the color filter layer 23 .

The common line 15 of the TFT substrate and the common electrode 80 of the color filter substrate are electrically connected by the conductive balls 300 included in the conductive sealant 50.

The capping layer 48 is formed on the connection pattern 46 exposed to the GIP region so that the elements of the GIP region and the common electrode 80 are formed on the connection pattern 46 even when the conductive ball 300 is positioned on the connection pattern 46. [ It is not electrically short-circuited.

Therefore, in the present invention, the conductive sealant can be applied to the signal lines and the GIP region, thereby reducing the bezel area.

Further, due to the conductive sealant, the circuit elements of the GIP region are not short-circuited or signal failure occurs.

3A to 3E illustrate a manufacturing process of a liquid crystal display device according to the present invention.

3A to 3E, a metal film is formed on a first substrate 10, a first mask process is performed to form a gate electrode 11 in a TFT region, and a common line (15) and the first device electrode (16) are formed.

The metal film may be formed of a single metal layer such as copper (Cu), aluminum (Al), molybdenum (Mo), or Cr having high conductivity, and at least one of them may be formed in a laminate or alloy form .

When the gate electrode 11 is formed on the first substrate 10 as described above, the gate insulating film 12, the amorphous silicon film, and the P + or N + type are formed on the first substrate 10, Doped amorphous silicon film are sequentially formed.

Then, a second mask process is performed to form an active layer 14 made of an amorphous silicon film and an amorphous silicon film doped on the gate electrode 11.

At this time, the amorphous silicon film formed in the seal region and the doped amorphous silicon film are removed. However, the active layer 14 is formed in the TFT region of the GIP region (not shown).

When the active layer 14 is formed on the first substrate 10 as described above, a source / drain metal film is formed as shown in FIG. 3C, and then a third mask process is performed to form the source / drain electrodes 17a , 17b. And the second device electrode 21 is formed in the seal region.

When the source / drain electrodes 17a and 17b are formed on the first substrate 10, a protective film 19 is formed as shown in FIG. 3D, and then a fourth mask process is performed to form the drain electrodes 17b ). At this time, the common line 15, the first device electrode 16, and the protective film 19 on the second device electrode 21 are also removed and exposed.

Then, as shown in FIG. 3E, a transparent conductive material layer and an insulating layer are sequentially formed on the first substrate 10, and then a fifth mask process is performed to form the pixel electrode 39. Next, as shown in FIG. A contact pattern 45 connecting the exposed common line 15 and a connection pattern 48 connecting the first device electrode 16 and the second device electrode 21 are formed in the seal region.

At this time, since the insulating film is formed on the transparent conductive material film, the insulating film is etched by the first dry etching process, and the wet conductive process is performed to etch the transparent conductive material film. The pixel electrode 39, the first device electrode 16, and the second device electrode 21 are formed by etching the transparent conductive material film.

At this time, since an insulating film is formed on the pixel electrode 39, the contact electrode 45 and the connection pattern 48, the second and subsequent dry etching processes are performed to form the pixel electrode 39 and the contact electrode 45 Is removed. The remaining insulating film on the connecting pattern 48 is not removed but becomes the capping layer 48. [

Therefore, even if the conductive sealant is applied, elements in the GIP region are not short-circuited, and the common line 15 is electrically connected to the common electrode of the color filter substrate through the conductive balls included in the conductive sealant.

As described above, the present invention can conduct the common line and the common electrode while applying the conductive sealant to the signal lines and the GIP region, thereby simplifying the manufacturing process.

1 schematically shows a structure of a liquid crystal display device according to the present invention.

2 is an enlarged cross-sectional view of a signal line region and a GIP region coated with a conductive sealant in the liquid crystal display device of the present invention.

3A to 3E illustrate a manufacturing process of a liquid crystal display device according to the present invention.

 (Description of Reference Numbers to Main Parts of the Drawings)

10: first substrate 15: common line

16: first device electrode 12: gate insulating film

19: protective film 45: contact electrode

46: connection pattern 48: capping layer

300: Challenge Ball

Claims (4)

Forming a common line and a first device electrode on a gate electrode and a seal region on a substrate; Sequentially forming a gate insulating layer, an amorphous silicon layer and an amorphous silicon layer on the substrate on which the gate electrode is formed, and then forming an active layer on the gate electrode; Forming a source / drain metal film on the substrate on which the active layer is formed, and then forming a source / drain electrode and a second device electrode in the seal region; Forming a protective layer on the substrate on which the source / drain electrodes are formed, and exposing a portion of the drain electrode, the common line, the first device electrode, and the second device electrode; And Sequentially forming a transparent conductive material layer and an insulating layer on the substrate having the protective layer formed thereon and then sequentially performing a first dry etching process, a wet etching process, and a second dry etching process to sequentially form pixel electrodes, which are in contact with the drain electrodes, A contact electrode connected to the common line, a connection pattern connecting the first and second device electrodes, and a capping layer on the connection pattern. The method of claim 1, wherein the capping layer is formed as an insulating layer on a transparent conductive material layer. The method according to claim 1, wherein a conductive sealant is formed on the seal region. The method of claim 1, wherein in the second dry etching process, the insulating film formed on the contact electrode of the pixel electrode and the common line is removed, and the insulating film formed on the connecting pattern is not removed.

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