KR20080012674A - Lcd and drive method thereof - Google Patents

Abstract

An LCD and a driving method thereof are provided to minimize a crosstalk by compensating for a gamma voltage in proportion to a swing width of a common voltage signal. A data driving circuit(120) supplies display data to an LCD(Liquid Crystal Display) panel(110). A common voltage generator(150) generates a common voltage which is supplied to the LCD panel. A gamma voltage generator(180) generates gamma voltages which are supplied to the data driving circuit. A timing controller(140) generates different amplification factor control signals according to a position of display data of the LCD panel. A gamma voltage compensator(160) generates a gamma swing voltage whose magnitude is varied according to the position of the display data on the LCD panel, by using a feedback common voltage which is fed back from the LCD panel and the common voltage in response to the amplification ratio control signal. The gamma voltage compensator compensates for the gamma voltage according to the magnitude and phase of the gamma swing voltage.

Description

Liquid crystal display and driving method thereof

1 is a view schematically showing a liquid crystal display device in a general IPS mode.

2 is a diagram showing the structure of common voltage signal wiring;

3A is a view showing a specific pattern displayed by the dot inversion driving method.

FIG. 3B is a drive waveform diagram for the specific pattern shown in FIG. 3A. FIG.

4 is a waveform diagram illustrating that the common voltage is shaken in the positive direction or the negative direction in units of a horizontal period (H).

5 and 6 are views for explaining crosstalk in a peripheral screen extending in a horizontal direction by a specific pattern in a liquid crystal panel driven by a dot inversion method.

7 is a waveform diagram illustrating that the distortion of the common voltage is intensified toward the lower side of the liquid crystal panel.

8 is a configuration diagram of a liquid crystal display device according to the present invention.

9 is a circuit diagram illustrating a gamma voltage compensator of a liquid crystal display according to a first embodiment of the present invention.

10 is a circuit diagram illustrating a gamma voltage compensator of a liquid crystal display according to a second exemplary embodiment of the present invention.

11 is a block diagram illustrating a gamma voltage compensator of a liquid crystal display according to a third exemplary embodiment of the present invention.

FIG. 12 is a waveform diagram illustrating a gamma voltage compensated for a common voltage whose swing width increases as display data is positioned at a lower end of a liquid crystal panel. FIG.

13 and 14 illustrate changes in amplification ratios of gamma swing voltages according to positions of liquid crystal panels of display data.

<Description of Symbols for Main Parts of Drawings>

110: liquid crystal panel 120: data driving circuit

130: gate driving circuit 140: timing controller

150: common voltage generator 160: gamma voltage compensator

162, 262, 362: gamma swing voltage generation unit 164, 264, 364: gamma voltage compensation unit

170: common voltage signal wiring 180: gamma voltage generator

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display and a driving method thereof. In particular, crosstalk can be reduced by adjusting the non-inverting amplification factor of the feedback common voltage differently according to the position of the display data in the liquid crystal panel and using the same to compensate the gamma voltage. The present invention relates to a liquid crystal display and a driving method thereof.

Conventional liquid crystal display devices display an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, the liquid crystal display device includes a liquid crystal panel in which liquid crystal cells are arranged in a matrix, and a driving circuit for driving the liquid crystal panel.

In the liquid crystal panel, gate lines and data lines are arranged to cross each other, and liquid crystal cells are positioned at intersections of the gate lines and the data lines. Each of the liquid crystal cells is provided with pixel electrodes and a common electrode for applying an electric field. Each of the pixel electrodes is connected to one of the data lines via a thin film transistor which is a switching element. The gate terminal of the thin film transistor is connected to any one of the gate lines through which the pixel voltage signal is applied to the pixel electrodes of one line. As a result, the liquid crystal array between the pixel electrode and the common electrode is changed according to the pixel voltage signal for each liquid crystal cell, thereby adjusting the light transmittance, thereby displaying an image.

The driving circuit includes a gate driving circuit for driving the gate lines, a data driving circuit for driving the data lines, and a common voltage generator for driving the common electrode. The gate driving circuit sequentially supplies the scanning signal, that is, the gate signal to the gate lines, to sequentially drive the liquid crystal cells on the liquid crystal panel by one line. The data driving circuit supplies a pixel voltage signal to each of the data lines whenever a gate signal is supplied to any one of the gate lines. The common voltage generator supplies a common voltage signal to the common electrode.

Such liquid crystal display devices are roughly classified into twisted nematic (TN) mode in which a vertical electric field is applied and in plane switch (IPS) mode in which a horizontal electric field is applied according to the direction of the electric field driving the liquid crystal.

The TN mode is a mode in which a liquid crystal is driven by a vertical electric field between a pixel electrode and a common electrode disposed to face the upper and lower substrates, and has a large aperture ratio but a narrow viewing angle. The IPS mode is a mode in which a liquid crystal is driven by a horizontal electric field between a pixel electrode and a common electrode arranged side by side on the lower substrate, and has a large viewing angle, but a small aperture ratio.

FIG. 1 is a diagram schematically showing a liquid crystal display device in a general IPS mode, and FIG. 2 is a diagram illustrating a structure of a common voltage signal line.

The liquid crystal display of the IPS mode shown in FIG. 1 includes a thin film transistor TFT formed at each intersection of a plurality of data lines DLm and gate lines GLn, a thin film transistor TFT, and a common voltage line VcomLn. And a liquid crystal cell connected between each other.

The gate lines GLn and the data lines DLm cross each other. The plurality of common voltage lines VcomL1 to VcomLn are arranged side by side alternately with the gate lines GL0 to GLn-1 (not shown). The gate lines GLn supply a scan signal, and the data lines DLm supply a data signal. The common voltage lines VcomLn supply a reference voltage to each liquid crystal cell. To this end, the common voltage lines VcomLn are commonly connected to the common voltage signal wiring 20 formed on the left and right sides of the liquid crystal panel 40 as shown in FIG. 2. The thin film transistor TFT causes the liquid crystal cell to charge a data signal from any one of the data lines DLm in response to a scan signal from any one of the gate lines GLn. The liquid crystal cell Clc includes a liquid crystal capacitor including a pixel electrode Ep and a common electrode Ec formed side by side on the lower substrate. The pixel electrode Ep is connected to the thin film transistor TFT, and the common electrode Ec is connected to any one of the common voltage lines VcomLn. The liquid crystal cell includes a storage capacitor Cst formed at an overlapping portion of the pixel electrode Ep and the previous gate line with an insulating layer therebetween. The storage capacitor Cst maintains the data signal charged in the liquid crystal capacitor for one frame. The liquid crystal cell implements gradation by controlling the light transmittance by varying the arrangement state of the liquid crystal having dielectric anisotropy according to the charged data signal.

The liquid crystal display device is driven in an inversion method in which the polarity of the data signal is inverted at regular intervals to prevent deterioration and afterimage of the liquid crystal cell. Inversion methods include a dot inversion method, a line inversion method, and a frame inversion method.

The frame inversion scheme reverses the polarity of the data signal supplied to the liquid crystal cells whenever the frame is changed. The line inversion method inverts the polarities of the data signals supplied to the liquid crystal cells in line (low line or column line) units and inverts them in frame units. The dot inversion method inverts the data signals supplied to the liquid crystal cells in dot units and inverts them in frame units. Among them, the dot inversion method has an advantage of providing an image of excellent image quality compared to other methods. However, the dot inversion driving method has a disadvantage in that a crosstalk phenomenon occurs when the specific pattern shown in FIG. 3A is displayed, thereby degrading the image quality.

3A is a view showing a specific pattern displayed by the dot inversion driving method, and FIG. 3B is a driving waveform diagram for the specific pattern shown in FIG. 3A.

Each of the liquid crystal cells illustrated in FIG. 3A corresponds to each of the red, green, and blue liquid crystal cells (R, G, and B). The red, green, and blue liquid crystal cells R, G, and B are arranged side by side in a stripe shape. As the liquid crystal cells R, G, and B are driven in a dot inversion method, polarities of data signals between adjacent liquid cells in a horizontal direction and a vertical direction are reversed. In particular, the liquid crystal cells R, G, and B display a specific pattern, that is, a vertical stripe pattern in which white gray (for example, 255 gray) and black gray alternate in a column line unit in a normal black mode.

To this end, as illustrated in FIG. 3B, the i-th horizontal line Hi has the polarity of the data signal Vd_255 corresponding to 255 gray and the data signal Vd_0 corresponding to black gray based on the common voltage Vcom. Alternately supplied. In addition, as shown in FIG. 3B, the i + 1 th horizontal line Hi + 1 also has a data signal Vd_255 corresponding to 255 gray and a data signal Vd_0 corresponding to black gray as shown in FIG. 3B. Are alternately supplied with different polarities. Here, the data signal Vd supplied to the i + 1 th horizontal line Hi + 1 has a polarity opposite to that of the data signal Vd supplied to the i th horizontal line Hi.

In this case, since the average level of the data signal supplied to the i-th horizontal line Hi is larger in the positive polarity than in the negative polarity based on the common voltage Vcom, the common voltage Vcom signal is shown in FIG. 4. Is swinged in the positive direction by a capacitor coupling effect with the positive data signal. In addition, since the average level of the data signal supplied to the i + 1th horizontal line Hi + 1 is larger in the negative polarity than in the positive polarity based on the common voltage Vcom, the common voltage ( The Vcom) signal is swinged in the negative direction by a capacitor coupling effect with the negative data signal. When the data signal for displaying a specific pattern is supplied in a horizontal unit, the common voltage Vcom is in the positive direction or the negative direction in units of the horizontal period H as shown in FIG. 4 according to the average level of the data signal. Ripple phenomenon will occur. The common voltage Vcom ripple also affects the peripheral screen extending in the horizontal direction as shown in FIG. 5 to generate crosstalk in the peripheral screen.

FIG. 5 is a diagram illustrating crosstalk in a peripheral screen extending in a horizontal direction by a specific pattern in a liquid crystal panel driven by a dot inversion method.

Referring to FIG. 5, when a window B displaying a vertical stripe pattern, which is a specific pattern, is displayed on a portion of the liquid crystal panel image display unit 60, a crosstalk pattern having a vertical stripe pattern is formed in the peripheral screen C extending in the horizontal direction of the window B. It can be seen that this occurs. This is because the common voltage fluctuates toward the positive or negative polarity according to the average level of the data signal in units of horizontal periods even in the peripheral screen due to the vertical stripe pattern displayed in the window B. FIG.

For example, when the average level of the data signal in the i-th horizontal line Hi is large due to the vertical stripe pattern displayed in the window B, the common voltage swings toward the positive polarity. This ripple phenomenon of the common voltage level affects the i-th horizontal line Hi extending to the outside area of the window B as shown in FIG. 6. In FIG. 6, the voltage difference between the positive data signal Vdo and the common voltage Vcom is relatively relatively due to the common voltage Vcom swinging toward the positive polarity in the odd-numbered liquid crystal cell in which the positive data signal Vdo is charged. As it shrinks, it looks darker in normal black mode. In contrast, in the even-numbered liquid crystal cell in which the negative data signal Vde is charged, the voltage difference between the negative data signal Vde and the common voltage Vcom is relatively increased by the common voltage Vcom swinging toward the positive polarity. It will look brighter.

In addition, when the average level of the data signal is negative in the i + 1th horizontal line Hi + 1 due to the vertical stripe pattern displayed in the window B, the common voltage swings toward the negative polarity. This ripple of the common voltage level is affected as shown in FIG. 6 in the i + 1th horizontal line Hi + 1 extending to the outside area of the window B. FIG. In FIG. 6, the voltage difference between the negative data signal Vdo and the common voltage Vcom is relatively high in the odd-numbered liquid crystal cell in which the negative data signal Vdo is charged due to the common voltage Vcom swinging toward the negative polarity. As it shrinks, it looks darker in normal black mode. In contrast, in the even-numbered liquid crystal cell in which the positive data signal Vde is charged, the voltage difference between the positive data signal Vde and the common voltage Vcom is relatively increased by the common voltage Vcom swinging toward the negative polarity. As it gets brighter.

As a result, even when data signals of the same gray level are applied to the regions A and C except for the window B, the common voltage ripple due to the vertical stripe pattern displayed on the window B affects the peripheral region C in the horizontal direction of the window B. As described above, the luminance difference occurs between the odd-numbered liquid crystal cell and the even-numbered liquid crystal cell in the "C" region. As a result, as shown in FIG. 5, crosstalk patterns such as vertical stripes are generated in the peripheral region C of the window B, thereby degrading image quality.

In addition, as shown in FIG. 2, the crosstalk phenomenon occurs more severely due to an increase in the line resistance of the common voltage signal wiring 20 as the display data is positioned in the "D" direction (the lower direction of the liquid crystal panel). This is because the current component of the common voltage signal decreases in proportion to the increased line resistance, so that the common voltage signal swings by a larger width according to the average level of the data signal.

Accordingly, an object of the present invention is to provide a liquid crystal display device and a driving method thereof capable of minimizing crosstalk by compensating gamma voltage in proportion to a swing width of a common voltage signal that varies in accordance with a position of display data in a liquid crystal panel. will be.

In order to achieve the above object, the liquid crystal display device according to the present invention comprises a liquid crystal panel; A data driver circuit for supplying display data to the liquid crystal panel; A common voltage generator for generating a common voltage supplied to the liquid crystal panel; A gamma voltage generator for generating gamma voltages supplied to the data driving circuit; A timing controller for generating a different amplification rate control signal according to the position of the display data in the liquid crystal panel; And a gamma swing voltage having an amplitude varying according to a position of display data on the liquid crystal panel using the common voltage and a feedback common voltage fed back from the liquid crystal panel in response to the amplification rate control signal. And a gamma voltage compensator for compensating gamma voltages from the gamma voltage generator according to the amplitude and phase of the gamma voltage generator.

The amplitude of the gamma swing voltage increases as the position of the display data in the liquid crystal panel moves away from the data driving circuit which supplies a data signal to the liquid crystal panel.

The gamma voltage compensator may include a gamma swing voltage generator configured to generate a gamma swing voltage by converting a non-inverting amplification factor of the feedback common voltage based on the common voltage; And a gamma voltage compensator for compensating the gamma voltages by swinging the gamma voltages from the gamma voltage generator in proportion to an amplitude of the gamma swing voltage and in phase with the gamma swing voltage.

The gamma swing voltage generator includes: a first differential amplifier for inverting and amplifying the feedback common voltage based on the common voltage; And a gamma swing voltage whose amplitude is changed according to the up and down positions of the display data on the liquid crystal panel by reinverting and reinverting the feedback common voltage inverted and amplified by the first differential amplifier based on the common voltage. And a second differential amplifier for generating.

The gamma voltage compensator includes n capacitors connected one-to-one to gamma voltage output lines for supplying the gamma voltages to the data driving circuit, and one end of the n capacitors is connected to an output terminal of the second differential amplifier. A common connection is made to capacitor-couple the gamma swing voltage and the gamma voltages.

The n capacitors have different capacitance values.

The second differential amplifier may include first to sixth negative feedback resistors connected in series between an inverting input terminal to which the inverted-amplified feedback common voltage is input and an output terminal to which the gamma swing voltage is output; An input resistor connected in parallel with the first to sixth negative feedback resistors at the inverting input terminal; And first to sixth switches connected one-to-one in parallel with the first to sixth negative feedback resistors; The first to sixth switches are switched in response to the amplification rate control signal.

Resistance values of the first to sixth negative feedback resistors are different from each other.

The second differential amplifier may include: seventh to twelfth negative feedback resistors connected in parallel to an inverting input terminal to which the inverted-amplified feedback common voltage is input; An input resistor connected in parallel with the seventh to twelfth negative feedback resistors at the inverting input terminal; And a seventh through twelfth switch having one end connected in common with an output terminal through which the gamma swing voltage is output, and the other end connected in series one-to-one to the seventh through twelfth negative feedback resistors. The seventh to twelfth switches are switched in response to the amplification rate control signal.

Resistance values of the seventh to twelfth negative feedback resistors are different from each other.

The second differential amplifier includes: a plurality of resistors connected in series between an inverting input terminal to which the inverted-amplified feedback common voltage is input and an output terminal to which the gamma swing voltage is output; An input resistor connected in parallel with the plurality of resistors at the inverting input terminal; And a plurality of switches for determining a composite resistance value of the plurality of resistors; The switching operation of the plurality of switches is controlled by a switch controller.

The plurality of switches are thin film transistors in which drains are commonly connected to the inverting input terminal, and sources of the thin film transistors adjacent to each other are connected to both ends of one of the plurality of resistors.

The switch controller may include a memory configured to store a plurality of switch control signals corresponding to the amplification rate control signal; A register for storing an amplification rate control signal supplied from the timing controller and generating a switch control signal corresponding thereto; And a decoder for decoding the switch control signal from the register.

The decoder has a plurality of outputs connected one-to-one with gates of the thin film transistors.

The resistance value of the plurality of resistors is the same.

The switch controller further includes an interface circuit for changing the plurality of switch control signals stored in the memory according to external data.

In addition, the driving method of the liquid crystal display according to the present invention comprises the steps of: generating gamma voltages; Supplying a common voltage to the liquid crystal panel and feeding back a feedback common voltage from the liquid crystal panel; Generating an amplification rate control signal according to the position of the display data on the liquid crystal panel; Generating a gamma swing voltage having an amplitude varying according to an up and down position of display data in the liquid crystal panel using the common voltage and the feedback common voltage in response to the amplification rate control signal; And compensating the gamma voltages according to the amplitude and phase of the gamma swing voltage.

The generating of the gamma swing voltage may include: a first step of inverting and amplifying the feedback common voltage based on the common voltage; And a second step of reinverting and amplifying the feedback common voltage inverted and amplified in the first step based on the common voltage according to the amplification rate control signal.

In the second step, as the position of the display data in the liquid crystal panel moves away from the data driving circuit for supplying the data signal to the liquid crystal panel, the reversal amplification factor is increased.

Compensating the gamma voltages compensates for the gamma voltage by swinging the gamma voltages in proportion to an amplitude of the gamma swing voltage and in phase with the gamma swing voltage.

The amplification rate control signal is a digital signal whose number of bits increases in proportion to the size of the liquid crystal panel.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 8 to 14.

8 is a configuration diagram of a liquid crystal display according to the present invention.

Referring to FIG. 8, the liquid crystal display of the present invention includes a liquid crystal panel 110, a data driving circuit 120 for driving data lines DL1 to DLm of the liquid crystal panel 110, and a liquid crystal panel 110. Gate driving circuit 130 for driving the gate lines GL0 to GLn of the control panel), and driving timings of the data driving circuit 120 and the gate driving circuit 130 and generating an amplification rate control signal. The timing controller 140, the common voltage generator 150 for generating the common voltage Vcom supplied to the liquid crystal panel 110, and the gamma voltages GMA1 to GMAn supplied to the data driving circuit 120. Generates a gamma swing voltage Vs in response to the amplification rate control signal Φ from the gamma voltage generator 180 and the timing controller 140 to generate the gamma voltages GMA1 to GMAn in the same phase. And a gamma voltage compensator (160) for swinging.

The liquid crystal panel 110 includes a thin film transistor TFT formed at an intersection of the plurality of gate lines GL0 to GLn and the plurality of data lines DL1 to DLm, and a plurality of common voltages with the thin film transistor TFT. The liquid crystal cells Clc connected to any one of the lines VcomL1 to VcomLn and arranged in a matrix form, and the common voltage signal wiring 170 formed at right and left sides of the liquid crystal panel 110 are provided.

The gate lines GL0 to GLn and the data lines DL1 to DLm cross each other. The plurality of common voltage lines VcomL1 to VcomLn are arranged side by side alternately with the gate lines GL0 to GLn-1. The gate lines GL1 through GLn supply a scan signal, and the data lines DL1 through DLm supply a data signal. Unlike the other gate lines GL1 to GLn, the first gate line GL0 is for forming the storage capacitor Cst and supplies a gate low voltage. The common voltage lines VcomL1 to VcomLn supply reference voltages to the liquid crystal cells Clc. To this end, the common voltage lines VcomL1 to VcomLn are commonly connected to the common voltage signal line 170 formed on the left and right sides of the liquid crystal panel 110. The thin film transistor TFT causes the liquid crystal cell to charge a data signal from any one of the data lines DL1 to DLm in response to a scan signal from any one of the gate lines GL1 to GLn. The liquid crystal cell Clc includes a liquid crystal capacitor including a pixel electrode Ep and a common electrode Ec formed side by side on the lower substrate. The pixel electrode Ep is connected to the thin film transistor TFT, and the common electrode Ec is connected to any one of the common voltage lines VcomL1 to VcomLn. The liquid crystal cell Clc includes a storage capacitor Cst formed at an overlapping portion of the pixel electrode Ep and the front gate line with an insulating layer therebetween. The storage capacitor Cst maintains the data signal charged in the liquid crystal capacitor for one frame.

The timing controller 140 relays the digital video data R, G, and B from the scaler (not shown) and supplies the data to the data driving circuit 120. In addition, the timing controller 140 may include a gate control signal GDC and a data driver circuit for controlling the gate driver circuit 130 using the vertical / horizontal synchronization signals V and H and the clock signal CLK. A data control signal DDC for controlling 120 and an amplification rate control signal Φ for controlling the amplification rate of the gamma voltage compensator 160 are generated. The data control signal DDC includes a source start pulse SSP, a source shift clock SSC, a source output signal SOE, a polarity signal POL, and the like. The gate control signal GDC includes a gate shift clock GSC, a gate output signal GOE, a gate start pulse GSP, and the like. The amplification rate control signal Φ is a digital signal that varies the non-inverting amplification rate of the feedback common voltage Vcom-F / B fed back from the liquid crystal panel 110 according to the position of the display data. The amplification rate control signal? Varies in size depending on the size of the liquid crystal panel and the degree of distortion of the common voltage depending on the position of the display data on the liquid crystal panel. For example, in the case of a small liquid crystal panel in which the distortion degree of the common voltage is relatively small according to the vertical position of the liquid crystal panel, it may be determined to be 2 bits or 3 bits. In addition, in the case of a large liquid crystal panel having a relatively large distortion level of the common voltage according to the upper and lower positions of the liquid crystal panel, it may be determined to be 6 bits as shown in FIGS. 9 and 10 or 7 bits as shown in FIG. 11.

The data driving circuit 120 converts the digital data signal from the timing controller 140 into an analog data signal according to the data control signal DDC so that a gate high signal is supplied to the gate lines GL1 to GLn. An analog data signal for one horizontal line is supplied to the data lines DL1 to DLm each time.

The gate driving circuit 130 sequentially supplies scan signals to the gate lines GL1 to GLn in response to the gate control signal GDC from the timing controller 140.

The common voltage generator 150 receives a high potential power voltage from a power supply (not shown), generates a common voltage Vcom, and supplies the common voltage Vcom to the liquid crystal panel 110 and the gamma voltage compensator 160.

The gamma voltage generator 180 is supplied with a gamma reference voltage from a power supply (not shown) to set the positive and negative gamma voltages GMA1 to GMAn preset to have different voltage levels according to the voltage level of the data signal. Occurs. The gamma voltages GMA1 to GMAn generated as described above are supplied to the data driving circuit 120.

The gamma voltage compensator 160 includes a gamma swing voltage generator 162 and a gamma voltage compensator 164. The gamma swing voltage generator 162 displays the display on the liquid crystal panel 110 based on the common voltage Vcom from the common voltage generator 150 in response to the amplification rate control signal Φ from the timing controller 140. The gamma swing voltage Vs is generated by adjusting the non-inverting amplification rate of the feedback common voltage Vcom-F / B differently according to the up and down positions of the data. The gamma voltage compensator 164 swings the gamma voltages GMA1 to GMAn from the gamma voltage generator 180 by using the gamma swing voltage Vs from the gamma swing voltage generator 162 to perform a data driving circuit ( 120).

The feedback common voltage Vcom-F / B fed back from the liquid crystal panel 110 has a horizontal period under the influence of capacitor coupling with the data signal when driven in the dot inversion method as described above in the related art. It swings in the positive direction or the negative direction in units of (H). In addition, as the common voltage line VcomL is farther from the data driving circuit 120, the current component of the common voltage supplied thereto is gradually decreased due to an increase in the line resistance of the common voltage signal wiring 170, and thus is supplied to the corresponding liquid crystal cell. The common voltage may swing up and down relatively larger than the common voltage supplied to the liquid crystal cell close to the data driving circuit 120 (see FIG. 7). Thus, the gamma voltage compensator 160 is provided from the timing controller 140. In response to the amplification rate control signal Φ, the feedback common voltage Vcom-F / B is based on the upper and lower positions of the display data on the liquid crystal panel 110 based on the common voltage Vcom from the common voltage generator 150. By converting the non-inverting amplification ratio of the gamma swing voltage (Vs) to generate a gamma swing voltage (Vs) by using the swing gamma voltage (GMA1 to GMAn) from the gamma voltage generator 180 to supply to the data drive circuit 120 Depending on the vertical position of the display data of the panel 110, thereby reducing the crosstalk caused by a common voltage swing to a different width. Here, the feedback common voltage Vcom-F / B may be fed back from one lower end of the liquid crystal panel 110 or may be fed back through a separate feedback dedicated line (not shown). The gamma voltage compensator 160 may be implemented in various forms. Hereinafter, the gamma voltage compensator 160 will be described in detail with reference to FIGS. 9 to 12.

9 is a circuit diagram illustrating a gamma voltage compensator of a liquid crystal display according to a first exemplary embodiment of the present invention.

Referring to FIG. 9, the gamma voltage compensator 160 of the liquid crystal display according to the first exemplary embodiment of the present invention is provided from the common voltage generator 150 in response to the amplification rate control signal Φ from the timing controller 140. The gamma swing voltage Vs is generated by differently adjusting the non-inverting amplification factor of the feedback common voltages Vcom-F / B according to the up and down positions of the display data on the liquid crystal panel 110 based on the common voltage Vcom. The gamma swing voltage generator 162 and the gamma swing voltage generator 162 in the same phase as the gamma swing voltage generator 162 from the gamma swing voltage generator 162 to swing the gamma voltages GMA1 to GMAn. A gamma voltage compensator 164 for supplying the data driving circuit 120 is provided.

The gamma swing voltage generator 162 is configured to invert and amplify the feedback common voltage Vcom-FB input through the inverting input terminal (-) based on the common voltage Vcom input through the non-inverting input terminal (+). 1 The feedback common voltage inverted and amplified by the first differential amplifier Amp1 inputted through the inverting input terminal (-) based on the differential amplifier Amp1 and the common voltage Vcom inputted through the non-inverting input terminal (+). A second differential amplifier Amp2 for reversing and amplifying (Vcom-FB ') according to the amplification rate control signal .phi. Produces a gamma swing voltage Vs.

A first capacitor C1 and a first resistor R1 are connected in series to an inverting input terminal node ni1 of the first differential amplifier Amp1, and an inverting input terminal node ni1 and an output node of the first differential amplifier Amp1. The negative feedback resistor Rf is connected between no1. Here, the first resistor R1 and the negative feedback resistor Rf are fixed values, and the inverted amplification factor of the first differential amplifier Amp1 is determined by their ratio Rf / R1. The first capacitor C1 removes the DC noise component included in the feedback common voltage Vcom-F / B. The first differential amplifier Amp1 is a feedback common voltage Vcom-FB that is an AC component input through an inverting input terminal (-) based on a common voltage Vcom that is a DC component input through a non-inverting input terminal (+). It reverses amplification.

A second capacitor C2 and a second resistor R2 are connected in series between the inverting input terminal node ni2 of the second differential amplifier Amp2 and the output node no1 of the first differential amplifier Amp1. The first to sixth negative feedback resistors Rf1 to Rf6 are connected in series between the inverting input terminal node ni2 and the output node no2 of the differential amplifier Amp2. First to sixth switches S1 to S6 are connected in parallel to each of the first to sixth negative feedback resistors Rf1 to Rf6. Here, the second capacitor C2 removes the DC noise component included in the feedback common voltage Vcom-FB 'inverted and amplified by the first differential amplifier Amp1. In addition, the second resistor R2 is a fixed value, but the combined resistance Rft of the first to sixth negative feedback resistors Rf1 to Rf6 is a variable value, and the second differential is determined by their ratio Rft / R2. The inversion amplification factor of the amplifier Amp2 is determined. The synthesis resistance Rft of the first to sixth negative feedback resistors Rf1 to Rf6 is switched by the first to sixth switches S1 to S6 in response to the amplification rate control signal Φ from the timing controller 140. Is determined. The first to sixth negative feedback resistors Rf1 to Rf6 are set to different values to enable various amplification factors. The amplification rate control signal? Can be set to a six bit digital signal in this embodiment, each bit corresponding to D1 to D6 shown in FIG. These 6-bit digital signals D1 to D6 are embedded in the timing controller 140 at 64 different values depending on the up and down positions of the display data on the liquid crystal panel. Each of the first to sixth switches S1 to S6 closes the switch when the logic value of the corresponding digital signal is "1", and shorts both ends of the corresponding resistor. Form a current path. For example, if the logic value of the digital signal is “111111”, all of the first to sixth switches S1 to S6 are closed to close both ends between ni2 and no2 of the first to sixth negative feedback resistors Rf1 to Rf6. Becomes short. If the logic value of the digital signal is "000000", all of the first to sixth switches S1 to S6 are opened. In addition, when the logic value of the digital signal is "011111", only the sixth switch S6 is opened and the first to fifth switches S1 to S5 are closed. Here, the value of the first negative feedback resistor Rf1 is 100 kV, the value of the second negative feedback resistor Rf2 is 200 kV, the third negative feedback resistor Rf3 is 400 kV, the fourth negative feedback resistor Rf4 is 800 kV, If the fifth negative feedback resistor Rf5 is 1600 kV and the sixth negative feedback resistor Rf6 is 3200 kV, the first to sixth negative feedback resistors Rf1 to Rf6 are the case where the logical value of the digital signal is "111111". The composite resistance value Rft is 0 Hz, and when the logic value of the digital signal is "000000", the composite resistance value Rft of the first to sixth negative feedback resistors Rf1 to Rf6 is 6300 Hz, When the logic value is "011111", the combined resistance value Rft of the first to sixth negative feedback resistors Rf1 to Rf6 is 3200 kV. The inverted amplification factor of the second differential amplifier Amp2 is determined by the synthesis resistance values, and the non-inverted amplification factor of the gamma swing voltage generator 162 is determined to be located at the upper and lower positions of the display data in the liquid crystal panel 110. The swing width of the gamma swing voltage Vs is determined. That is, in the above example, when the data signal is supplied to the liquid crystal cells in the horizontal direction positioned at the uppermost end of the liquid crystal panel 110, the combined resistance value is 0 되어 and the swing width of the gamma swing voltage Vs is minimized. When the data signal is supplied to the liquid crystal cells in the horizontal direction positioned at the lowermost end of the liquid crystal panel 110, the combined resistance value is 6300 kV and the swing width of the gamma swing voltage Vs is maximized. When supplied to the horizontal liquid crystal cells positioned in the center portion of the liquid crystal panel 110, the combined resistance value is 6300 kW, and the swing width of the gamma swing voltage Vs is halfway between the maximum and the minimum. The timing controller 140 determines the position of the display data using the vertical / horizontal synchronization signals V and H and the clock CLK, and D1 to D6 which are 6-bit amplification rate control signals Φ corresponding to the determination result. Is supplied to the gamma swing voltage generator 162. The first to sixth switches S1 to S6 are switched in accordance with the amplification factor control signal Φ, and the swing width of the gamma swing voltage is determined according to the position of the display data on the liquid crystal panel 110 as in the above-described example. Will be.

The gamma voltage compensator 164 includes n capacitors Co1 to Con connected to the gamma voltage output lines GMA1 to GMAn of the gamma voltage generator 180. One end of the n capacitors Co1 to Con is commonly connected to the output node node no2 of the gamma swing voltage generator 162, and the n capacitors Co1 to Con have different capacitance values. These n capacitors Co1 to Con are the gamma swing voltage Vs from the output node node no2 of the gamma swing voltage generator 162 and the gamma voltages GMA1 to GMAn from the gamma voltage generator 180. Is coupled to the capacitor to generate gamma compensation voltages GMA1 'to GMAn'. The gamma compensation voltages GMA1 'to GMAn' are swinged with the same phase as the gamma swing voltage Vs by the capacitor coupling as shown in FIG. In addition, as shown in FIG. 12, the swing widths of the gamma compensation voltages GMA1 ′ to GMAn ′ are proportional to the swing width of the gamma swing voltage Vs. The gamma voltage compensator 164 generates gamma compensation voltages GMA1 ′ to GMAn ′ swinging in phase with the gamma swing voltage Vs from the gamma swing voltage generator 162 to generate the data driving circuit 120. ) To minimize the charge imbalance caused by the common voltage swing in the liquid crystal panel 110 and crosstalk. Further, the gamma voltage compensator 164 charges more effectively by varying the swing widths of the gamma compensation voltages GMA1 'to GMAn' according to the up and down positions of the display data on the liquid crystal panel in response to the gamma swing voltage Vs. The imbalance problem and thus crosstalk phenomenon can be prevented.

10 is a circuit diagram illustrating a gamma voltage compensator of a liquid crystal display according to a second exemplary embodiment of the present invention.

Referring to FIG. 10, the gamma voltage compensator 160 of the liquid crystal display according to the second exemplary embodiment of the present invention is provided from the common voltage generator 150 in response to the amplification rate control signal Φ from the timing controller 140. The gamma swing voltage Vs is generated by differently adjusting the non-inverting amplification factor of the feedback common voltages Vcom-F / B according to the up and down positions of the display data on the liquid crystal panel 110 based on the common voltage Vcom. The gamma swing voltage generator 262 and the gamma swing voltage generator 262 swing the gamma voltages GMA1 to GMAn from the gamma voltage generator 180 in the same phase as the gamma swing voltage Vs from the gamma swing voltage generator 262. A gamma voltage compensator 264 for supplying the data driver circuit 120 is provided.

The gamma swing voltage generator 262 is configured to invert and amplify the feedback common voltage Vcom-FB input through the inverting input terminal (-) based on the common voltage Vcom input through the non-inverting input terminal (+). 3 Feedback common voltage inverted and amplified by a third differential amplifier (Amp3) input through the inverting input terminal (-) based on the differential amplifier (Amp3) and the common voltage (Vcom) input through the non-inverting input terminal (+). And a fourth differential amplifier Amp4 for reversing and amplifying (Vcom-FB ') according to the amplification rate control signal .phi. To generate a gamma swing voltage Vs.

A third capacitor C3 and a third resistor R3 are connected in series to an inverting input terminal node ni3 of the third differential amplifier Amp3, and an inverting input terminal node ni3 and an output node of the third differential amplifier Amp3. The negative feedback resistor Rf is connected between no3. Here, the third resistor R3 and the negative feedback resistor Rf are fixed values, and the inverted amplification ratio of the third differential amplifier Amp3 is determined by their ratio Rf / R3. The third capacitor C3 removes a DC noise component included in the feedback common voltage Vcom-F / B. The third differential amplifier Amp3 is a feedback common voltage Vcom-FB that is an AC component input through an inverting input terminal (-) based on a common voltage Vcom that is a DC component input through a non-inverting input terminal (+). ) To reverse amplify.

The fourth capacitor C4 and the fourth resistor R4 are connected in series between the inverting input terminal node ni4 of the fourth differential amplifier Amp4 and the output node no3 of the third differential amplifier Amp3. Between the inverting input terminal node ni4 and the output node no4 of the differential amplifier Amp4, the seventh to twelfth negative feedback resistors Rf7 to Rf12 and the seventh to twelfth switches S7 to S12 connected in series with one-to-one The seventh to twelfth negative feedback resistance-switch pairs consisting of) are connected in parallel. Here, the fourth capacitor C4 removes the DC noise component included in the feedback common voltage Vcom-FB 'inverted and amplified by the third differential amplifier Amp3. The fourth resistor R4 is a fixed value, but the composite resistance Rft of the seventh to twelfth negative feedback resistors Rf7 to Rf12 is a variable value, and the fourth differential is determined by their ratio Rft / R4. The inverted amplification factor of the amplifier Amp4 is determined. The synthesis resistors Rft of the seventh to twelfth negative feedback resistors Rf7 to Rf12 are switched by the seventh to twelfth switches S7 to S12 in response to the amplification rate control signal Φ from the timing controller 140. Is determined. The seventh to twelfth negative feedback resistors Rf7 to Rf12 are set to different values to enable various amplification factors. The amplification rate control signal? Can be set to a six bit digital signal in this embodiment, each bit corresponding to D7 to D12 shown in FIG. These 6-bit digital signals D7 to D12 are embedded in the timing controller 140 at 64 different values depending on the up and down positions of the display data on the liquid crystal panel. Each of the seventh to twelfth switches S7 to S12 closes the switch when the logic value of the digital signal corresponding thereto is "1" to form a current path through the corresponding branches a to e, and is "0". Open the switch to cut off the current path through the branch (a through e). For example, if the logic value of the digital signal is “111111”, all of the seventh to twelfth switches S7 to S12 are closed to form current paths of all branches a to f. If the logic value of the digital signal is "100000", the twelfth switch S12 is closed to form a current path of the branch f, and the seventh to eleventh switches S7 to S11 are opened to open the remaining branches ( The current paths a to e are blocked. In addition, when the logic value of the digital signal is "010000", the eleventh switch S11 is closed to form a current path of the feeder e, and the seventh to tenth and twelfth switches S7 to S10 and S12 are all The current paths of the remaining branches a to d and f are blocked. Here, the seventh negative feedback resistor Rf7 is 100 kV, the eighth negative feedback resistor Rf8 is 200 kV, the ninth negative feedback resistor Rf9 is 400 kV, the tenth negative feedback resistor Rf10 is 800 kV, When the eleventh negative feedback resistor Rf11 is 1600 kV and the twelfth negative feedback resistor Rf12 is 3200 kPa, the seventh to twelfth negative feedback resistors Rf7 to Rf12 are set when the logic value of the digital signal is 111111. The combined resistance value of is about 50.8 kΩ, and when the logic value of the digital signal is "100000", the combined resistance value of the seventh to twelfth negative feedback resistors Rf7 to Rf12 is 3200 kohms, and the logical value of the digital signal is " 010000 ", the combined resistance value of the seventh to twelfth negative feedback resistors Rf7 to Rf12 is 1600 kΩ. The inverted amplification factor of the second differential amplifier Amp2 is determined by the synthesis resistance values, and the non-inverted amplification factor of the gamma swing voltage generator 162 is determined to be located at the upper and lower positions of the display data in the liquid crystal panel 110. The swing width of the gamma swing voltage Vs is determined. That is, in the above example, when the data signal is supplied to the liquid crystal cells in the horizontal direction positioned at the top end of the liquid crystal panel 110, the combined resistance value is 50.8 kV and the swing width of the gamma swing voltage Vs is minimum. When the data signal is supplied to the liquid crystal cells in the horizontal direction positioned at the lowest end of the liquid crystal panel 110, the combined resistance value is 3200 kV and the swing width of the gamma swing voltage Vs is maximized. Is supplied to the liquid crystal cells in the horizontal direction positioned at the center of the liquid crystal panel 110, the combined resistance value is 1600 kW, and the swing width of the gamma swing voltage Vs is halfway between the maximum and the minimum. The timing controller 140 determines the position of the display data using the vertical / horizontal synchronization signals V and H and the clock CLK, and D7 to D12 which are 6-bit amplification rate control signals Φ corresponding to the determination result. Is supplied to the gamma swing voltage generator 262. The seventh to twelfth switches S7 to S12 are switched in accordance with the amplification rate control signal Φ to swing the gamma swing voltage Vs according to the position of the display data on the liquid crystal panel 110 as in the above-described example. The width will be determined.

Since the gamma voltage compensator 264 is the same as the gamma voltage compensator 164 in the first embodiment shown in FIG. 9, a detailed description thereof will be replaced below.

11 is a block diagram illustrating a gamma voltage compensator of a liquid crystal display according to a third exemplary embodiment of the present invention.

Referring to FIG. 11, the gamma voltage compensator 160 of the liquid crystal display according to the third exemplary embodiment of the present invention is provided from the common voltage generator 150 in response to the amplification rate control signal Φ from the timing controller 140. The gamma swing voltage (Vs) is generated by adjusting the non-inverting amplification factor of the feedback common voltage (Vcom-F / B) differently according to the up and down positions of the displayed data on the liquid crystal panel 110 based on the common voltage (Vcom) Swings the gamma voltages GMA1 to GMAn from the gamma voltage generator 180 in phase with the gamma swing voltage generator 362 and the gamma swing voltage Vs from the gamma swing voltage generator 362. And a gamma voltage compensator 364 for supplying the data driver circuit 120 to the data driver circuit 120.

The gamma swing voltage generator 362 is configured to invert and amplify the feedback common voltage Vcom-FB input through the inverting input terminal (-) based on the common voltage Vcom input through the non-inverting input terminal (+). 5 The feedback common voltage inverted and amplified by the fifth differential amplifier Amp5 inputted through the inverting input terminal (-) based on the differential amplifier Amp5 and the common voltage Vcom inputted through the non-inverting input terminal (+). And a sixth differential amplifier Amp6 for generating the gamma swing voltage Vs by reversing and amplifying Vcom-FB 'according to the amplification rate control signal.

A fifth capacitor C5 and a fifth resistor R5 are connected in series to the inverting input terminal node ni5 of the fifth differential amplifier Amp5, and the inverting input terminal node ni5 and the output node of the fifth differential amplifier Amp5 are connected in series. The negative feedback resistor Rf is connected between no5. Here, the fifth resistor R5 and the negative feedback resistor Rf are fixed values, and the inverted amplification factor of the fifth differential amplifier Amp5 is determined by their ratio Rf / R5. The fifth capacitor C5 removes the DC noise component included in the feedback common voltage Vcom-F / B. The fifth differential amplifier Amp5 is a feedback common voltage Vcom-FB that is an AC component input through an inverting input terminal (-) based on a common voltage Vcom that is a DC component input through a non-inverting input terminal (+). It reverses amplification.

A sixth capacitor C6 and a sixth resistor R6 are connected in series between the inverting input terminal node ni6 of the sixth differential amplifier Amp6 and the output node no5 of the fifth differential amplifier Amp5. Synthesis of a resistance string 367 and a resistance string 367 in which a plurality of resistors R having the same value are connected in series between an inverting input node node ni6 and an output node no6 of the differential amplifier Amp6. A switching unit 368 for determining the resistance value is connected. The switching unit 368 includes a plurality of switch elements S0 to S127 that are switched in response to the switch control signal Φ ′ from the switching control unit 369. In particular, the switching element may include a thin film transistor. Is used. Of the plurality of switch elements S0 to S127, the gate G of the k (k is 0 or more and a natural number of 127 or less) th switch element is connected to the k th output pin Pk of the decoder 366, The drain D is commonly connected to the inverting input terminal node ni6 of the sixth differential amplifier Amp6, and the source S is connected to the k-th node nk. Here, the node n0 and the inverting input terminal node ni6 of the sixth differential amplifier Amp6 are the same, and the node n127 and the inverting output terminal node no6 of the sixth differential amplifier Amp6 are the same. The sixth capacitor C6 removes the DC noise component included in the feedback common voltage Vcom-FB 'inverted and amplified by the fifth differential amplifier Amp5. In addition, the sixth resistor R6 is a fixed value, but the composite resistor Rt of the resistor string 367 is a variable value, and the inverted amplification factor of the sixth differential amplifier Amp6 is changed by the ratio Rt / R4. Is determined. The combined resistance Rt of the resistance string 367 is determined by switching the switching unit 368 in response to the switch control signal .phi.'of the switching control unit 369.

To this end, the switching controller 369 stores a memory 364 for storing a plurality of switch control signals Φ ′ corresponding to the amplification rate control signal Φ, and an amplification rate control signal Φ from the timing controller 140. And a register 363 for generating a plurality of switch control signals Φ ', a decoder 366 for decoding the plurality of switch control signals Φ', and external data A0 and A1. An interface circuit 365 for changing a plurality of switch control signals .phi '' stored in the memory 364 is provided.

The register 363 stores the serial control data signal SDA and the serial control clock signal SCL, which are the amplification rate control signal Φ supplied from the timing controller 140, and correspond to a plurality of switch control signals Φ ′ corresponding to the serial control data signal SDA. Occurs. To this end, the register 363 receives the switch control signal? 'Output from the memory 364 using the serial control data signal SDA as a read address. In the timing controller 140, a 7-bit control signal Φ that varies according to the up and down positions of the liquid crystal panel 110 in which current data is displayed is embedded. Accordingly, the switch control signal? 'Generated by the register 363 is composed of a 7 bit digital signal.

The memory 364 is a nonvolatile memory capable of updating and erasing data, for example, the position of the display data on the liquid crystal panel, including an electrically erasable programmable read only memory (EEPROM) and / or an extended display identification data ROM (EDID ROM). The amplification rate control signal .phi. That varies according to the &lt; RTI ID = 0.0 &gt; and &lt; / RTI &gt; The stored switch control signal Φ ′ may be updated by electric signals A0 and A1 applied from an external system through the interface circuit 365.

The interface circuit 365 is designed in accordance with a communication standard protocol standard such as I ² C. The external system can read or modify data stored in the memory 364 through the interface circuit 365. That is, the amplification rate control signal Φ and the switch control signal Φ 'stored in the memory 364 are required to be updated for reasons such as process change and difference between the applied models, and the user wants to update the control data Φ. , 'Is entered through the external system. These control data? And? 'Are converted into electrical signals A0 and A1 by a ROM recorder (not shown) and stored in the memory 364 through the interface circuit 365.

The decoder 366 receives 128 different switch control signals Φ ', that is, 7-bit digital control signals from the register 363 according to the up and down positions of the liquid crystal panel on which display data is located, and decodes the corresponding output pins. Outputs the switching signal through. The decoder 366 includes 128 output pins P0 to P127 to correspond to 7-bit digital control signals. Each of the output pins P0 to P127 is connected one-to-one with gates of the plurality of switch elements S0 to S127 of the switching unit 367. The decoder 366 supplies a switching signal to the gate of the corresponding switch element according to the 7-bit switch control signal .phi. 'So that the switch element is switched.

In order to explain the operation of the gamma swing voltage generator 362, assuming that the resistance values of all the resistors R constituting the resistance string 367 are 10 kW, the digital logic value of the switch control signal. In the case of the &quot; 1111111 ", the switch S127 is turned on by the switch control signal decoded through the decoder 366 so that the combined resistance value of the resistance string 368 is determined to be 0 Ω, and the switch control signal Φ ' In case that the digital logic value of &quot;) is " 0000000 ", the switch S0 is turned on by the switch control signal decoded through the decoder 366, so that the combined resistance value of the resistance string 368 is determined to be 1270 Hz, and the switch control is performed. When the digital logic value of the signal Φ 'is "0111111", the switch S63 is turned on by the switch control signal decoded through the decoder 366 so that the combined resistance value of the resistance string 368 is determined to be 640 kV. do. The synthesized resistance value determines the non-inverting amplification factor of the gamma swing voltage generator 362 and determines the swing width of the gamma swing voltage Vs according to the up and down positions of the display data on the liquid crystal panel 110. That is, in the above example, when the data signal is supplied to the liquid crystal cells in the horizontal direction positioned at the uppermost end of the liquid crystal panel 110, the combined resistance value is 0 되어 and the swing width of the gamma swing voltage Vs is minimized. When the data signal is supplied to the liquid crystal cells in the horizontal direction positioned at the lowermost end of the liquid crystal panel 110, the combined resistance value is 1270 kV and the swing width of the gamma swing voltage Vs is maximized. When supplied to the horizontal liquid crystal cells positioned in the center of the liquid crystal panel 110, the combined resistance value is 640 kV, and the swing width of the gamma swing voltage Vs is halfway between the maximum and the minimum. The timing controller 140 determines the position of the display data by using the vertical / horizontal synchronization signals V and H and the clock CLK, and gamma swings the 7-bit amplification factor control signal Φ corresponding to the determination result. Supply to the generator 262. The amplification rate control signal Φ is converted into a 7-bit switch control signal Φ 'in the gamma swing voltage generation unit 262, and then decoded to provide a corresponding switch element among the plurality of switch elements S0 to S127. Switch. Accordingly, as in the above-described example, the swing width of the gamma swing voltage Vs is determined according to the position of the display data on the liquid crystal panel 110.

Since the gamma voltage compensator 264 is the same as the gamma voltage compensator 164 in the first embodiment shown in FIG. 9, a detailed description thereof will be replaced below.

13 to 14 illustrate changes in gamma voltage compensation amplification factor according to positions of display data in a liquid crystal panel.

FIG. 13 illustrates that the gamma voltage compensation amplification rate increases linearly as the display data is positioned below the liquid crystal panel 110 by using a plurality of resistors R having the same resistance value as in the third embodiment. It is shown.

FIG. 14 shows a gamma voltage as display data is positioned below the liquid crystal panel 110 using a plurality of resistors Rf1 to Rf6 and Rf7 to Rf12 having different resistance values as in the first and second embodiments. The compensation amplification ratio is increased, but the gamma voltage compensation amplification ratio is nonlinearly increased in consideration of the structure of the common voltage signal wiring 170 and the distribution of the resistance values.

Meanwhile, although the embodiment of the present invention has been described using the IPS mode as an example, the technical idea of the present invention is not limited thereto, and the present invention can be applied to a VA (Verticle Alignment) mode, a twisted nematic (TN) mode, and the like. In addition, the technical idea of the present invention is applicable not only to the case of driving by the dot inversion method but also to the case of driving by all inversion methods.

As described above, the liquid crystal display and the driving method thereof according to the present invention can minimize the crosstalk by compensating the gamma voltage in proportion to the swing width of the common voltage signal which varies according to the position of the display data in the liquid crystal panel. .

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (27)

A liquid crystal panel; A data driver circuit for supplying display data to the liquid crystal panel; A common voltage generator for generating a common voltage supplied to the liquid crystal panel; A gamma voltage generator for generating gamma voltages supplied to the data driving circuit; A timing controller for generating a different amplification rate control signal according to the position of the display data in the liquid crystal panel; And In response to the amplification rate control signal, a gamma swing voltage whose amplitude is varied according to a position of display data on the liquid crystal panel is generated by using the common voltage and a feedback common voltage fed back from the liquid crystal panel. And a gamma voltage compensator for compensating gamma voltages from the gamma voltage generator according to an amplitude and a phase. The method of claim 1, And the amplitude of the gamma swing voltage increases as the position of the display data in the liquid crystal panel moves away from a data driving circuit which supplies a data signal to the liquid crystal panel. The method of claim 2, The gamma voltage compensator, A gamma swing voltage generator for converting a non-inverting amplification ratio of the feedback common voltage based on the common voltage to generate the gamma swing voltage; And And a gamma voltage compensator for compensating the gamma voltages by swinging the gamma voltages from the gamma voltage generator in proportion to an amplitude of the gamma swing voltage and in phase with the gamma swing voltage. The method of claim 3, wherein The gamma swing voltage generation unit, A first differential amplifier for inverting and amplifying the feedback common voltage based on the common voltage; And The gamma swing voltage whose amplitude is varied according to the up and down positions of the display data in the liquid crystal panel by reinverting the feedback common voltage inverted and amplified by the first differential amplifier based on the common voltage based on the amplification control signal. And a second differential amplifier for generating. The method of claim 4, wherein The gamma voltage compensation unit, N capacitors connected one-to-one to gamma voltage output lines for supplying the gamma voltages to the data driving circuit, and one end of the n capacitors is commonly connected to an output terminal of the second differential amplifier. And a gamma swing voltage and a capacitor coupled to the gamma voltages. The method of claim 5, wherein And the n capacitors have different capacitance values. The method of claim 5, wherein The second differential amplifier, First to sixth negative feedback resistors connected in series between an inverting input terminal to which the inverted-amplified feedback common voltage is input and an output terminal to which the gamma swing voltage is output; An input resistor connected in parallel with the first to sixth negative feedback resistors at the inverting input terminal; And First to sixth switches connected in parallel one-to-one with the first to sixth negative feedback resistors; And the first to sixth switches are switched in response to the amplification control signal. The method of claim 7, wherein And a resistance value of the first to sixth negative feedback resistors is different from each other. The method of claim 5, wherein The second differential amplifier, Seventh to twelfth negative feedback resistors connected in parallel to an inverting input terminal to which the inverted-amplified feedback common voltages are input; An input resistor connected in parallel with the seventh to twelfth negative feedback resistors at the inverting input terminal; And A seventh to twelfth switch having one end connected in common with an output terminal to which the gamma swing voltage is output and the other end connected in series one-to-one to the seventh to twelfth negative feedback resistors; And the seventh to twelfth switches are switched in response to the amplification rate control signal. The method of claim 9, And the resistance values of the seventh to twelfth negative feedback resistors are different from each other. The method of claim 5, wherein The second differential amplifier, A plurality of resistors connected in series between an inverting input terminal to which the inverted-amplified feedback common voltage is input and an output terminal to which the gamma swing voltage is output; An input resistor connected in parallel with the plurality of resistors at the inverting input terminal; And A plurality of switches for determining a composite resistance value of the plurality of resistors; And a switching operation of the plurality of switches is controlled by a switch controller. The method of claim 11, And the plurality of switches are thin film transistors in which drains are commonly connected to the inverting input terminal, and sources of the thin film transistors adjacent to each other are connected to both ends of any one of the plurality of resistors. The method of claim 12, The switch control unit, A memory for storing a plurality of switch control signals corresponding to the amplification rate control signal; A register for storing an amplification rate control signal supplied from the timing controller and generating a switch control signal corresponding thereto; And And a decoder for decoding the switch control signal from the register. The method of claim 13, And the decoder comprises a plurality of output terminals connected one-to-one with gates of the thin film transistors. The method of claim 14, And a resistance value of the plurality of resistors is the same. The method of claim 13, And an interface circuit for changing the plurality of switch control signals stored in the memory according to external data. The method of claim 3, wherein The gamma swing voltage generation unit, A first inverting input terminal to which the feedback common voltage is input through a first capacitor and a first resistor connected in series, a first non-inverting input terminal to which the common voltage is input, and a first inverting input terminal to be connected to the first inverting input terminal through the negative feedback resistor A first differential amplifier having a first output terminal for outputting an inverted-amplified feedback common voltage; And A second inverting input terminal to which the inverted-amplified feedback common voltage is input through a second capacitor connected in series and a second resistor; a second non-inverting input terminal to which the common voltage is input; and first to sixth negative feedback connected in series to each other A second differential having a second output terminal connected to the second inverting input terminal through a resistor and outputting the gamma swing voltage, and first to sixth switches connected in parallel one-to-one with the first to sixth negative feedback resistors; An amplifier; And the first to sixth switches are switched in response to the amplification control signal. The method of claim 3, wherein The gamma swing voltage generation unit, A third inverting input terminal to which the feedback common voltage is input through a third capacitor and a third resistor connected in series, a third non-inverting input terminal to which the common voltage is input, and a third inverting input terminal through a negative feedback resistor A third differential amplifier having a third output terminal for outputting the inverted-amplified feedback common voltage; And A fourth inverting input terminal to which the inverted-amplified feedback common voltage is input through a fourth capacitor and a fourth resistor connected in series, a fourth non-inverting input terminal to which the common voltage is input, and seventh to twelfth negative feedback connected in parallel to each other; A fourth differential amplifier having a fourth output terminal connected to the fourth inverting input terminal and outputting the gamma swing voltage through seventh to twelfth switches connected one-to-one in series with a resistor; And the seventh to twelfth switches are switched in response to the amplification rate control signal. The method of claim 3, wherein The gamma swing voltage generation unit, A fifth inverting input terminal to which the feedback common voltage is input through a fifth capacitor and a fifth resistor connected in series, a fifth non-inverting input terminal to which the common voltage is input, and a fifth inverting input terminal through a negative feedback resistor A fifth differential amplifier having a fifth output terminal for outputting the inverted-amplified feedback common voltage; And A sixth inverting input terminal to which the inverted-amplified feedback common voltage is input through a sixth capacitor and a sixth resistor connected in series, a sixth non-inverting input terminal to which the common voltage is input, and a plurality of resistors connected in series with each other; A sixth differential amplifier having a sixth output terminal connected to the sixth inverting input terminal and outputting the gamma swing voltage through a plurality of switches for determining a combined resistance value; And a switching operation of the plurality of switches is controlled by a switch controller. The method of claim 19, And the plurality of switches are thin film transistors in which drains are commonly connected to the sixth inverting input terminal, and sources of the thin film transistors adjacent to each other are connected to both ends of any one of the plurality of resistors. The method of claim 20, The switch control unit, A memory for storing a plurality of switch control signals corresponding to the amplification rate control signal; A register for storing an amplification rate control signal supplied from the timing controller and generating a switch control signal corresponding thereto; And And a decoder for decoding the switch control signal from the register. The method of claim 21, And the decoder comprises a plurality of output terminals connected one-to-one with gates of the thin film transistors. Generating gamma voltages; Supplying a common voltage to the liquid crystal panel and feeding back a feedback common voltage from the liquid crystal panel; Generating an amplification rate control signal according to the position of the display data on the liquid crystal panel; Generating a gamma swing voltage having an amplitude varying according to an up and down position of display data in the liquid crystal panel using the common voltage and the feedback common voltage in response to the amplification rate control signal; And Compensating for the gamma voltages according to the amplitude and phase of the gamma swing voltage. The method of claim 23, Generating the gamma swing voltage, Inverting and amplifying the feedback common voltage based on the common voltage; And And reinverting and amplifying the feedback common voltage inverted and amplified in the first step based on the common voltage according to the amplification control signal. The method of claim 24, In the second step, And the reinverting amplification factor increases as the position of the display data on the liquid crystal panel moves away from the data driving circuit which supplies the data signal to the liquid crystal panel. The method of claim 25, Compensating the gamma voltages, And compensating the gamma voltage by swinging the gamma voltages in proportion to an amplitude of the gamma swing voltage and in phase with the gamma swing voltage. The method of claim 24, And wherein the amplification rate control signal is a digital signal, the bit number of which is increased in proportion to the size of the liquid crystal panel.

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