KR20080005077A - 반도체 장치의 제조 방법 - Google Patents

반도체 장치의 제조 방법 Download PDF

Info

Publication number
KR20080005077A
KR20080005077A KR1020070064314A KR20070064314A KR20080005077A KR 20080005077 A KR20080005077 A KR 20080005077A KR 1020070064314 A KR1020070064314 A KR 1020070064314A KR 20070064314 A KR20070064314 A KR 20070064314A KR 20080005077 A KR20080005077 A KR 20080005077A
Authority
KR
South Korea
Prior art keywords
bump
semiconductor substrate
electrode pad
bumps
temperature
Prior art date
Application number
KR1020070064314A
Other languages
English (en)
Korean (ko)
Inventor
다카시 구리하라
미츠히로 아이자와
시게루 미즈노
Original Assignee
신꼬오덴기 고교 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 신꼬오덴기 고교 가부시키가이샤 filed Critical 신꼬오덴기 고교 가부시키가이샤
Publication of KR20080005077A publication Critical patent/KR20080005077A/ko

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020070064314A 2006-07-06 2007-06-28 반도체 장치의 제조 방법 KR20080005077A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2006-00186840 2006-07-06
JP2006186840A JP2008016668A (ja) 2006-07-06 2006-07-06 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
KR20080005077A true KR20080005077A (ko) 2008-01-10

Family

ID=39073400

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070064314A KR20080005077A (ko) 2006-07-06 2007-06-28 반도체 장치의 제조 방법

Country Status (4)

Country Link
JP (1) JP2008016668A (ja)
KR (1) KR20080005077A (ja)
CN (1) CN101231962A (ja)
TW (1) TW200805536A (ja)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5938105A (en) * 1997-01-15 1999-08-17 National Semiconductor Corporation Encapsulated ball bonding apparatus and method
JP4456234B2 (ja) * 2000-07-04 2010-04-28 パナソニック株式会社 バンプ形成方法

Also Published As

Publication number Publication date
TW200805536A (en) 2008-01-16
CN101231962A (zh) 2008-07-30
JP2008016668A (ja) 2008-01-24

Similar Documents

Publication Publication Date Title
KR100604334B1 (ko) 플립칩 패키징 공정에서 접합력이 향상된 플립칩 접합 방법
US8556158B2 (en) Thermal compress bonding
US5536973A (en) Semiconductor device including a semiconductor element mounted on a substrate using bump-shaped connecting electrodes
EP1386356B1 (en) Fluxless flip chip interconnection
US5328079A (en) Method of and arrangement for bond wire connecting together certain integrated circuit components
US20080122050A1 (en) Semiconductor Device And Production Method For Semiconductor Device
KR20100128275A (ko) 열 기계 플립 칩 다이 본딩
JPH04326534A (ja) 半導体装置のチップボンディング方法
US9633981B2 (en) Systems and methods for bonding semiconductor elements
JP2006278407A (ja) 半導体装置の製造方法
JP2011061073A (ja) 半導体装置の製造方法及び半導体製造装置
JPH06151701A (ja) 半導体装置の製造方法
US5023697A (en) Semiconductor device with copper wire ball bonding
US20060060980A1 (en) Ic package having ground ic chip and method of manufacturing same
US9779965B2 (en) Systems and methods for bonding semiconductor elements
JP4057875B2 (ja) 半導体装置の製造方法
KR20080005077A (ko) 반도체 장치의 제조 방법
CA2786882C (en) Flip-chip mounting structure and flip-chip mounting method
JP4200090B2 (ja) 半導体装置の製造方法
JP4041045B2 (ja) 超音波フリップチップ接合方法
JP4318893B2 (ja) 半導体装置及び半導体装置の製造方法
JPH0350736A (ja) 半導体チップのバンプ製造方法
JP2976947B2 (ja) バンプ形成方法
JP3826737B2 (ja) 半導体装置の製造方法
KR101214683B1 (ko) 반도체 장치의 제조 방법

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination