KR20070122000A - Array substrate for in-plane switching mode lcd and the method for fabricating the same - Google Patents

Abstract

An array substrate of an in-plane switching mode LCD(Liquid Crystal Display) and a method of manufacturing the array substrate are provided to prevent light leakage due to the outmost common electrode formed at a stepped portion and improve an aperture ratio of a pixel region. An array substrate(40) of an in-plane switching mode LCD includes a gate line, a data line(46), a common line(44), a TFT(Thin Film Transistor), a passivation layer(74), an outmost common electrode(60a), a central common electrode(60b), and a pixel electrode(50a). The gate line and the data line are formed on a substrate in an intersecting manner and define a pixel region. The common line is formed in parallel with the gate line or the data line. The TFT is formed at the intersection of the gate line and the data line. The passivation layer covers the common line, the data line, the gate line and the TFT. The outmost common electrode is formed on a flat portion of the passivation layer and connected to the common line. The outmost common electrode is formed in parallel with the data line on the common line, and at least a part of the outmost common electrode is superposed on the common line. The central common electrode is connected to the common line and the outmost common electrode and formed in parallel with the outmost common electrode. The pixel electrode is connected to one of electrodes of the TFT and formed between the outmost common electrode and the central common electrode.

Description

Array substrate for In-Plane Switching mode LCD and the method for fabricating the same}

1 is a cross-sectional view schematically showing a part of a general transverse electric field type liquid crystal display device

2A and 2B are cross-sectional views illustrating operating states of liquid crystals in on and off states of the transverse electric field type liquid crystal display of FIG. 1, respectively.

3 is a plan view showing one pixel region including a switching element in a typical transverse electric field type liquid crystal display array substrate.

4 is a cross-sectional view taken along line II of FIG. 3.

5 is a cross-sectional view showing a part of an array substrate for a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention.

6A to 6H are cross-sectional views of manufacturing processes according to embodiments of the present invention.

<Description of the symbols for the main parts of the drawings>

40: array substrate 42: gate wiring

44: common wiring 46: data wiring

50a, 50b: pixel electrode 60a, 60b: common electrode

72: gate insulating film 74; Protective layer

80 mask 90 photoresist layer

S: Substrate

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a transverse electric field type liquid crystal display device in which a stepped portion of an outermost common electrode is improved to prevent light leakage.

In general, the driving principle of the liquid crystal display device uses the optical anisotropy and polarization of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, if the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal due to optical anisotropy to express image information.

Currently, an active matrix liquid crystal display device (AM-LCD: abbreviated as an active matrix LCD, abbreviated as a liquid crystal display device) in which a thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner has the best resolution and video performance. It is attracting attention.

The liquid crystal display includes a color filter substrate on which a common electrode is formed, an array substrate on which pixel electrodes are formed, and a liquid crystal interposed between the two substrates. In such a liquid crystal display, the common electrode and the pixel electrode are caused by an electric field applied up and down. It is excellent in the characteristics, such as transmittance | permeability and aperture ratio, by the method of driving a liquid crystal.

However, the liquid crystal drive due to the electric field up and down has a disadvantage that the viewing angle characteristics are not excellent.

Accordingly, in order to overcome the above disadvantages, a transverse field type liquid crystal display device having excellent viewing angle characteristics has been proposed.

Hereinafter, a general transverse electric field type liquid crystal display device will be described in detail with reference to FIG. 1.

1 is a cross-sectional view of a general transverse electric field type liquid crystal display device.

As shown, the upper color filter substrate 10 and the lower array substrate 40 are spaced apart from each other, and the liquid crystal layer 20 is interposed between the substrates 10 and 40.

The pixel electrode 50 and the common electrode 60 are formed on the array substrate 40, and the liquid crystal layer 20 is formed on the horizontal electric field L formed by the pixel electrode 50 and the common electrode 60. Is operated by

2A and 2B are cross-sectional views illustrating operations of on and off states of a general transverse electric field type liquid crystal display device, respectively.

First, referring to FIG. 2A, which illustrates an arrangement of liquid crystals in an on state where a voltage is applied, a phase change of the liquid crystal 20a at a position corresponding to the pixel electrode 50 and the common electrode 60 is performed. Although the liquid crystal 20b positioned in the section between the pixel electrode 50 and the common electrode 60 is not formed by the horizontal electric field L formed by applying a voltage between the pixel electrode 50 and the common electrode 60, It is arranged in the same direction as the horizontal electric field (L). That is, in the transverse electric field type liquid crystal display device, since the liquid crystal moves by the horizontal electric field, the viewing angle is widened.

Thus, as seen the lateral jeongyehyeong liquid crystal display device from the front, the up / down / left / right direction in the direction of about 80~85 ^o can be visible without reversal.

Next, referring to FIG. 2B, since a horizontal electric field is not formed between the common electrode and the pixel electrode because no voltage is applied to the liquid crystal display, the arrangement state of the liquid crystal layer 20 does not change.

FIG. 3 is a plan view showing one pixel region including a switching element in a general horizontal transverse electric field type liquid crystal display array substrate 40. As shown in FIG.

As described above, a plurality of gate wires 42 arranged in a horizontal direction parallel to each other at a predetermined interval, the data wires 46 defining the pixel area P by crossing the gate wires 42, and one pixel The common wiring 44 surrounding the pixel region P is included between the gate wiring 42 and the data wiring 46 defining the region P.

At the intersection of the gate wiring 42 and the data wiring 46, a thin film transistor T composed of the gate electrode 48a, the semiconductor layer, and the source drain electrodes 48b and 48c is formed. At this time, the gate electrode 42 plays a role of the gate electrode 48a, and the source electrode 48b is formed by branching from the data line 46.

In the pixel region P, a plurality of pixel electrodes 50a and 50b electrically connected to the drain electrode 48c and the first contact hole 52, and the pixel electrodes 50a and 50b, respectively. A plurality of common electrodes 60a and 60b are formed to be alternately arranged in parallel and electrically connected to the common wiring 44 through the second contact hole 62.

There are several types of patterns of the common wiring 44. When the common wiring 44 is formed to surround the pixel region P, the common wiring 44 and the common electrodes 60a and 60b are not located in the same plane but are common. Common electrodes 60a and 60b are formed on the wiring 44.

In particular, the outermost common electrode 60a formed at the outermost portion of the pixel region P and closest to the data line 46 overlaps the lower common wiring 44 to maximize the aperture ratio of the pixel region P. It is formed at the position.

In addition, the width t1 of the outermost common electrode 60a is formed to be wider than the width t2 of the central common electrode 60b formed at the center of the pixel region P while being spaced apart from the data line 46 (t1> t2). You can see that.

The reason why the width t1 of the outermost common electrode 60a is larger than the width t2 of the central common electrode 60b is to minimize the generation of view angle crosstalk (VAC).

That is, the data line 46 affects an electric field generated between the outermost common electrode 60a and the pixel electrodes 50a and 50b adjacent thereto, thereby generating a view angle crosstalk (VAC). In this case, when the width t1 of the outermost common electrode 60a is formed to be wider than the width t2 of the central common electrode 60b, the generation of view angle crosstalk (VAC) can be minimized.

On the other hand, in the above-described configuration of the array substrate 40, the spaced area between the data line 42 and the outermost common electrode 60a on both sides thereof corresponds to a light leakage area in which the liquid crystal is abnormally oriented when a voltage is applied.

In order to block the light leakage region, a black matrix is formed on the color filter substrate 10 (see FIG. 1) positioned above the array substrate 40, and the black matrix includes a data line except for the pixel region P. 46 and a part of the outermost common electrode 60a.

Since the liquid crystal layer 40 filled between the color filter substrate 10 and the array substrate 40 is controlled by an electric field formed between the pixel electrodes 50a and 50b and the common electrodes 60a and 60b. The pixel electrodes 50a and 50b and the common electrodes 60a and 60b preferably have a uniform pattern as much as possible.

However, as shown in FIG. 4, which is a cross-sectional view along the line I-I of FIG. 3, the outermost common electrode 60a is formed on the same plane as the central common electrode 60b and the pixel electrodes 50a and 50b. Rather, it is formed along the stepped portion A of the protective layer 74.

The gate insulating layer 72 covering the gate wiring and the common wiring 44 and the protective layer 74 thereon protrude upward from other portions of the common wiring 44, so that the stepped portion A is formed around the common wiring 44. ) Will occur.

Therefore, the outermost common electrode 60a in which at least a portion of the common wiring 44 is to be overlapped up and down is partially formed over the inclined surface of the stepped portion A. As shown in FIG.

However, such a step A has a problem of causing light leakage for a particular viewing angle by disturbing the normal operation of nearby liquid crystals. Therefore, in order to prevent this, the width of the black matrix formed on the color filter substrate 10 must be made thicker toward the pixel region P, which in turn causes a decrease in the aperture ratio of the pixel region P. FIG.

The present invention is to solve the problems of the conventional transverse electric field type liquid crystal display device, and to provide a method of preventing light leakage caused by the outermost common electrode formed on the stepped portion and further improving the aperture ratio of the pixel region. The purpose is to.

In order to achieve the above object, the present invention is formed on the substrate to cross each other, the gate wiring and data wiring defining a pixel region; A common wiring lined apart from the gate wiring or data wiring; A thin film transistor formed at an intersection point of the gate line and the data line; A protective layer covering the common line, data line, gate line, and thin film transistor; An outermost common electrode formed on a flat surface of the protective layer and connected to the common line, the outermost common electrode formed at an upper portion of the common line in parallel with the data line, and at least partially overlapping the common line; A central common electrode connected to the common wiring and the outermost common electrode and formed to be parallel to the outermost common electrode between two outermost common electrodes; An array substrate for a transverse electric field type liquid crystal display device connected to one electrode of the thin film transistor and including a pixel electrode formed side by side between the outermost common electrode and the central common electrode is provided.

The common line may be spaced apart from the gate line and the data line, and may surround the pixel area.

The pixel electrode may be electrically connected to one electrode of the thin film transistor disposed below the first contact hole formed in the passivation layer.

The outermost common electrode and the central common electrode may be electrically connected to the lower common wiring through a second contact hole formed in the protective layer.

The center common electrode, the outermost common electrode and the pixel electrode may be formed of the same material on the same layer, and the center common electrode, the outermost common electrode and the pixel electrode may be formed of a transparent conductive material.

The present invention also provides a method for manufacturing a semiconductor device, comprising: forming a gate wiring extending in one direction and a common wiring spaced apart from a substrate on a substrate in which a pixel region is defined; Forming a gate insulating film on an entire surface of the gate wiring and the common wiring; Forming a data line crossing the gate line over the gate insulating layer; Forming a thin film transistor connected to the data line and the first electrode at an intersection point of the gate line and the data line; Forming a protective layer on an entire surface of the data line and the thin film transistor; A first contact hole exposing the second electrode of the thin film transistor and a second contact hole exposing a part of the common wiring in the passivation layer, and an outermost common electrode is formed on the common wiring Removing the stepped portion of the protective layer on the substrate; An outermost common electrode connected to the common wiring through the second contact hole and at least partially overlapping the common wiring, the outermost common electrode electrically connected to the outermost common electrode and parallel to the outermost common electrode Forming a pixel electrode connected to the second common electrode of the thin film transistor through the first common contact hole and the pixel electrode disposed side by side between the outermost common electrode and the central common electrode; A method of manufacturing an array substrate for a liquid crystal display device is provided.

At this time, the step of removing the stepped portion of the protective layer existing at the position where the outermost common electrode is to be formed, by placing a mask having a transmissive region, a transflective region and a blocking region on the upper portion of the protective layer, Corresponding to the inclined surface of the stepped portion; Exposing the protective layer with the mask installed; Removing the exposed protective layer.

In addition, the step of removing the step portion of the protective layer existing in the position where the outermost common electrode is to be formed, forming a photoresist layer on top of the protective layer; Placing a mask having a transmissive area, a transflective area, and a blocking area on top of the photoresist layer, wherein the transflective area corresponds to a stepped slope of the photoresist layer; Exposing the photoresist layer with the mask installed; Removing the exposed photoresist layer; The protective layer may be etched using the remaining photoresist layer as a mask.

Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the present invention.

5 is a partial cross-sectional view of an array substrate 40 of a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention.

Compared with FIG. 4 showing the conventional array substrate 40, it can be seen that the outermost common electrode 60a is formed on a flat surface instead of a stepped portion. As such, when the stepped portion causing the abnormal operation of the liquid crystal layer disappears, light leakage caused by the liquid crystal layer is prevented, thereby making it possible to make the width of the black matrix of the color filter substrate smaller, thereby improving the aperture ratio of the pixel region P.

Hereinafter, a process of forming the outermost common electrode 60a on the flat surface in this manner will be described with reference to the cross-sectional views of the processes of FIGS. 6A to 6H.

First, as shown in FIG. 6A, the common wiring 44 and the gate wiring (not shown) are formed on the transparent insulating substrate s.

To this end, first, a metal material selected from aluminum (Al), aluminum alloy (AlNd), chromium (Cr), molybdenum (Mo), molybdenum alloy, copper (Cu), and copper alloy is deposited on the front surface of the substrate s. (1) forming a metal layer, applying photoresist thereon, exposing using a mask having a transmissive region and a blocking region, developing the exposed photoresist, and etching the exposed metal material. Perform.

Subsequently, as shown in FIG. 6B, an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is deposited on the entire upper surface of the common wiring 44 and the gate wiring (not shown). 72).

In this case, the gate insulating layer 72 on the common wiring 44 protrudes upward from other portions, thereby forming a stepped portion.

Next, pure amorphous silicon and impurity amorphous silicon are sequentially deposited on the gate insulating layer 72 to form a pure amorphous silicon layer and an impurity amorphous silicon layer, and molybdenum (Mo) is deposited on the impurity amorphous silicon layer to form a second layer. A metal layer is formed.

Subsequently, the second metal layer, an impurity amorphous silicon layer, and a pure amorphous silicon layer below the second metal layer are patterned by masking to form a data line 46 crossing the gate line (not shown) as shown in FIG. 6C. .

At the same time, although not shown, a thin film transistor T including an active layer, a semiconductor layer, and a source drain electrode is formed in the switching region where the gate line and the data line 46 intersect.

The data line 46 is connected to the source electrode of the thin film transistor T, so that the source electrode is branched from the data line 46.

Next, as shown in FIG. 6D, an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is deposited on the upper surface of the data line 46 and the source and drain electrodes, which are not shown. A protective layer 74 is formed by applying a photosensitive organic insulating material such as cyclobutene (BCB) or photo acryl.

In this case, it can be seen that the stepped portion A is generated at the upper portion of the common wiring 44.

Conventionally, as shown in FIG. 4, the outermost common electrode 60a is formed in the stepped portion A. However, in the embodiment of the present invention, the common electrodes 60a and 60b and the pixel electrodes 50a and 50b are formed. Before the outermost common electrode 60a is to planarize the stepped portion A of the portion to be deposited.

In an embodiment of the present invention, a mask process including a semi-transmissive region is applied to remove the stepped portion A, and the mask process is performed when the protective layer 74 is formed of a photosensitive organic insulating material and is non-photosensitive. Depends on the case formed of the material.

Examples of the photosensitive organic insulating material include BCB or photoacrylic, and in this case, the protective layer 74 may be directly exposed. When the protective layer 74 is a non-photosensitive material, there is a difference in that a photoresist layer must first be formed on the protective layer 74.

First, FIG. 6E illustrates a mask 80 having a blocking region 80a, a transmissive region 80b, and a transflective region 80c on the upper portion of the protective layer 74 when the protective layer 74 is formed of a photosensitive organic insulating material. ) And then directly expose the protective layer 74 through the mask 80.

6F illustrates that when the protective layer 74 is formed of an inorganic insulating material or a non-photosensitive organic insulating material, the photoresist is entirely coated on the protective layer 74 to form the photoresist layer 90, and the blocking region is shown. The photoresist layer 90 is exposed by using the mask 80 having the 80a, the transmissive region 80b, and the transflective region 80c.

FIG. 6F illustrates a case of using a positive type photoresist in which a portion of light is removed upon development. On the contrary, a negative photoresist may be used in which the lighted portion remains during development. In this case, the positions of the transmission region and the blocking region of the mask 80 should be opposite to those shown.

The transflective region 80c may be formed in a slit form or may be formed of a multilayer organic film coating that absorbs light. The former method is called a diffraction exposure method, and the latter method is called a half tone method. do.

The semi-transmissive region 80c is used to form a partially different pattern or photoresist pattern, and in the embodiment of the present invention, the semi-transmissive region 80c is used to remove the inclined surface of the stepped portion.

When the protective layer 74 of the photosensitive material is exposed and developed, as shown in FIG. 6G, the conventional stepped portion A retreats to the outer side of the pixel region P, and eventually, at the top of the common wiring 44. The portion where the common electrode is formed is planarized.

The protective layer 74 of the non-photosensitive material is exposed and developed after the photoresist layer 90 is exposed and developed, as shown in FIG. 6F, and the protective layer is etched using the remaining photoresist layer 90 as a mask. By doing so, the conventional stepped portion A is flattened as shown in FIG. 6G, and instead, the new stepped portion A is formed at a position where the stepped portion is further retracted toward the outer side of the pixel area P. FIG.

Meanwhile, in the step of removing the stepped portion of the protective layer 74, the first contact hole 52 and the first contact hole 52 are formed in the protective layer 74 to connect the drain electrode of the thin film transistor T and the pixel electrodes 50a and 50b. It is preferable to proceed simultaneously with the process of forming the second contact hole 62 for connecting the common wiring 44 and the common electrodes 60a and 60b.

6H, the common electrodes 60a and 60b and the pixel electrodes 50a and 50b are formed on the passivation layer 74, and the common electrodes 60a and 60b are formed in the second contact hole 62. ) And the lower common wiring 44, and the pixel electrodes 50a and 50b contact the lower drain electrode through the first contact hole 52.

On the other hand, the patterns and positions of the common electrodes 60a and 60b and the pixel electrodes 50a and 50b are the same as in the conventional method. Accordingly, the outermost common electrode 60a is formed on the flat surface of the protective layer 74 unlike the prior art while at least partially overlapping the upper portion of the common wiring 44.

As such, when the outermost common electrode 60a is formed on the flat surface, light leakage due to the stepped portion is prevented because abnormal operation of the adjacent liquid crystal is prevented, and thus, the width of the black matrix designed in consideration of the conventional stepped portion leakage can be made smaller. The aperture ratio of the pixel region P can be improved.

According to the present invention, since the outermost common electrode 60a is formed on a flat surface instead of a stepped portion in the array substrate for a transverse electric field type liquid crystal display device, light leakage due to abnormal operation of the liquid crystal is prevented.

Therefore, the width of the black matrix of the color filter substrate can be made smaller, and the aperture ratio of the pixel region P can be improved.

Claims (9)

Gate wirings and data wirings formed on the substrate to cross each other, and defining pixel regions; A common wiring lined apart from the gate wiring or data wiring; A thin film transistor formed at an intersection point of the gate line and the data line; A protective layer covering the common line, data line, gate line, and thin film transistor; An outermost common electrode formed on a flat surface of the protective layer and connected to the common line, the outermost common electrode formed at an upper portion of the common line in parallel with the data line, and at least partially overlapping the common line; A central common electrode connected to the common wiring and the outermost common electrode and formed to be parallel to the outermost common electrode between two outermost common electrodes; A pixel electrode connected to one electrode of the thin film transistor and formed side by side between the outermost common electrode and the central common electrode; Array substrate for transverse electric field type liquid crystal display device comprising a The method of claim 1, And the common line is spaced apart from the gate line and the data line and surrounds an outer periphery of the pixel area. The method of claim 1, And the pixel electrode is electrically connected to one electrode of the thin film transistor disposed below the first contact hole formed in the passivation layer. The method of claim 1, The outermost common electrode and the central common electrode may be electrically connected to the lower common wiring through a second contact hole formed in the passivation layer. The method of claim 1, And the center common electrode, the outermost common electrode, and the pixel electrode are formed of the same material on the same layer. The method of claim 5, And the center common electrode, the outermost common electrode, and the pixel electrode are formed of a transparent conductive material. Forming a gate line extending in one direction and a common line spaced apart from the substrate on which the pixel region is defined; Forming a gate insulating film on an entire surface of the gate wiring and the common wiring; Forming a data line crossing the gate line over the gate insulating layer; Forming a thin film transistor connected to the data line and the first electrode at an intersection point of the gate line and the data line; Forming a protective layer on an entire surface of the data line and the thin film transistor; A first contact hole exposing the second electrode of the thin film transistor and a second contact hole exposing a part of the common wiring in the passivation layer, and an outermost common electrode is formed on the common wiring Removing the stepped portion of the protective layer on the substrate; An outermost common electrode connected to the common wiring through the second contact hole and at least partially overlapping the common wiring, the outermost common electrode electrically connected to the outermost common electrode and parallel to the outermost common electrode Forming a pixel electrode disposed in parallel between the center common electrode and the second electrode of the thin film transistor through the first contact hole and disposed between the outermost common electrode and the center common electrode; Method of manufacturing an array substrate for a transverse electric field type liquid crystal display device comprising a. The method of claim 7, wherein The step of removing the stepped portion of the protective layer existing at the position where the outermost common electrode is to be formed Placing a mask having a transmissive area, a transflective area, and a blocking area on an upper portion of the protective layer, and corresponding the transflective area to the inclined surface of the stepped portion; Exposing the protective layer with the mask installed; Removing the exposed protective layer; Method of manufacturing an array substrate for a transverse electric field type liquid crystal display device comprising a The method of claim 7, wherein The step of removing the stepped portion of the protective layer existing at the position where the outermost common electrode is to be formed Forming a photoresist layer on the protective layer; Placing a mask having a transmissive area, a transflective area, and a blocking area on top of the photoresist layer, wherein the transflective area corresponds to a stepped slope of the photoresist layer; Exposing the photoresist layer with the mask installed; Removing the exposed photoresist layer; Etching the protective layer using the remaining photoresist layer as a mask; Method of manufacturing an array substrate for a transverse electric field type liquid crystal display device comprising a

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