KR20070093510A - Display apparatus and method for manufacturing display substrate - Google Patents

Abstract

A method for manufacturing a display substrate and a display device thereof are provided to form an oxide film on an etching surface of a metal line and use only SF6 gas during a following dry etching process, thereby preventing line failures caused by formation of byproducts. A method for manufacturing a display substrate comprises the following steps of: forming a first metal pattern including a gate line(GL) and a gate electrode(120) on a substrate; successively laminating an insulating film(130), an active layer(140a), an ohmic contact layer(140b) and a metal layer on the entire surface of the substrate so as to cover the first metal pattern; forming a second metal pattern, which includes a source line(DL) and an electrode pattern partially overlapped with the gate electrode and connected with the source line, by patterning the metal layer; forming a first oxide film on an etching surface of a second metal pattern by performing first oxygen plasma processing; forming a channel layer in a lower part of the second metal pattern by performing first dry etching of the active layer and the ohmic contact layer; forming a source electrode(154) and a drain electrode(156) spaced from the source electrode by etching a part of the electrode pattern.

Description

Display method of manufacturing method and display device {DISPLAY APPARATUS AND METHOD FOR MANUFACTURING DISPLAY SUBSTRATE}

1 is a plan view of a display substrate formed by a method of manufacturing a display substrate according to an exemplary embodiment of the present invention.

2 to 12 are process diagrams illustrating a method of manufacturing a display substrate according to the present invention using a cross section taken along the line II ′ of FIG. 1.

FIG. 13 is a graph showing the ΔG − temperature correlation for the reactivity of SF6 gas with the first and second copper oxides (Cu 2 O (I), CuO (II)).

14 is a reaction equilibrium graph of Cu—CuO (II) —Cu 2 O (I) according to oxygen partial pressure and reaction temperature.

FIG. 15 is a ΔG − temperature correlation graph for the formation of gaseous copper fluoride (CuF (g)) according to the reaction of SF 6 gas with cupric oxide (CuO).

16 is a cross-sectional view illustrating a display device according to an exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

100: display substrate 110: base substrate

120 gate electrode 130 gate insulating film

140: channel layer 152: electrode pattern

154: source electrode 156: drain electrode

160: passivation film 170: pixel electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display substrate manufacturing method and a display device, and more particularly, to a display substrate manufacturing method and display device for reducing wiring defects.

In general, a plurality of gate lines parallel to each other and a plurality of source lines insulated from and intersecting with the gate lines are formed on the display substrate, and a pixel is formed in each area surrounded by the gate lines and the data lines. Each pixel is provided with a pixel electrode and a switching element for applying a pixel voltage to the pixel electrode.

The gate lines, the data lines, and the switching elements are formed through a photolithography process using an exposure mask. Since the exposure mask occupies a large portion of the manufacturing cost, a four-sheet mask process has recently been developed to reduce manufacturing costs and manufacturing processes.

In the four mask process, the semiconductor layer, the ohmic contact layer, and the metal layer are sequentially applied on the base substrate on which the gate metal pattern including the gate wiring is formed, and the metal layer is patterned by a photolithography process to form a source metal pattern including the source wiring. do. Subsequently, the ohmic contact layer and the semiconductor layer are dry-etched using the source metal pattern as an etch mask to form a channel layer patterned in the same manner as the source metal pattern. In general, in the dry etching process for forming the channel layer, HCl or SF6 gas is used as an etching gas.

Meanwhile, in the dry etching process, since the source metal pattern is exposed to the dry etching gas, the metal material forming the source metal pattern and the etching gas may react to form reaction byproducts. The reaction by-products formed in this way remain around the source metal pattern and cause a wiring defect. In particular, when the source metal pattern includes copper (Cu) having poor chemical resistance, there is a problem in that the formation of the reaction by-products described above is further intensified.

Accordingly, the technical problem of the present invention is to solve such a conventional problem, and an object of the present invention is to form an oxide film on an etching surface of a metal wiring, and by using only SF6 gas in a subsequent dry etching process, A display substrate manufacturing method capable of suppressing wiring defects is provided.

Another object of the present invention is to provide a display device having a display substrate manufactured through the above-described method for manufacturing a display substrate.

According to one or more exemplary embodiments, a method of manufacturing a display substrate includes forming a first metal pattern including a gate wiring and a gate electrode on a substrate, and covering the first metal pattern. Sequentially stacking an insulating layer, an active layer, an ohmic contact layer, and a metal layer on the entire surface of the substrate, and patterning the metal layer to include a source wiring and an electrode pattern connected to the source wiring and partially overlapping the gate electrode. Forming a second metal pattern, forming a first oxide film on an etched surface of the second metal pattern by performing a first oxygen plasma treatment, and etching the active layer and the ohmic contact layer by first dry etching. Forming a channel layer under the metal pattern, and etching a part of the electrode pattern to form a source electrode and a drain electrode spaced apart from the source electrode Step and forming a pixel electrode connected with the drain electrode.

In accordance with another aspect of the present invention, there is provided a display device including a first substrate, a first metal pattern formed on the first substrate and including a gate wiring and a gate electrode, and the first metal. A second metal pattern including a gate insulating layer formed on the entire surface of the first substrate to cover the pattern, a source wiring crossing the gate wirings, a source electrode connected from the source wiring, and a drain electrode spaced a predetermined distance from the source electrode; And a channel layer formed between the gate insulating layer and the second metal pattern and a second substrate facing the first substrate. In this case, the second metal pattern includes copper or a copper alloy, and an oxide film is formed on a side surface thereof.

According to the method of manufacturing the display substrate and the display device, when manufacturing the display substrate of the four mask process of dry etching the active layer and the ohmic contact layer using the second metal pattern as an etching mask, wiring defects due to the generation of reaction by-products can be reduced. Can be.

Hereinafter, with reference to the accompanying drawings, it will be described in detail the present invention.

1 is a plan view of a display substrate formed by a method of manufacturing a display substrate according to an exemplary embodiment of the present invention.

2 to 11 are process diagrams illustrating a method of manufacturing a display substrate according to an exemplary embodiment of the present invention using a cross section taken along the line II ′ of FIG. 1.

1 and 2, a metal layer (not shown) is formed on the first base substrate 110 made of a transparent material, for example, glass and quartz. The metal layer (not shown) may be formed of, for example, a metal such as chromium, aluminum, tantalum, molybdenum, titanium, tungsten, copper, silver, or an alloy thereof, and may be formed of two or more layers having different physical properties. Can be. The metal layer (not shown) is deposited by a sputtering process. Subsequently, the metal layer (not shown) is etched using a photolithography process using a first mask MASK 1 to form a first metal pattern including a gate line GL, a gate electrode 120, and a storage common line STL. Form. The gate line GL extends in a first direction, and the gate electrode 120 is connected to the gate line GL. The storage line STL may further include a branch region br extending in the first direction between the gate lines GL and having a branch shape in a second direction crossing the first direction. Can be.

Referring to FIG. 3, a gate insulating layer 130 made of silicon nitride (SiNx) is formed on a first base substrate 110 on which the first metal pattern is formed by using a plasma enhanced chemical vapor deposition (PECVD) method. And the active layer 140a made of amorphous silicon (a-Si: H) and the ohmic contact layer 140b doped with a high concentration of n + ions are sequentially stacked.

Subsequently, a source metal layer 150 made of copper (Cu) or a copper alloy is formed on the ohmic contact layer 140b. The source metal layer 150 may be applied by, for example, a sputtering method. Next, a photoresist film PR is coated on the entire surface of the source metal layer 150. As an example, the photoresist film PR is formed of a positive photoresist in which the exposed region is dissolved by a developer.

1 and 4, the photoresist film PR is differentially exposed using a second mask MASK 2 including an opening 2, a light blocking portion 4, and a transflective portion 6. That is, the opening 2 transmits light, the light blocking portion 4 blocks light, and the transflective portion 6 transmits less light than the opening 2. Therefore, when the exposed photoresist film PR is developed, the thickness of the photoresist film PR remaining for each of the regions corresponding to the opening 2, the light blocking portion 4, and the transflective portion 6 is changed. Specifically, the photoresist film PR corresponding to the opening 2 is removed by a developer, and the photoresist film PR corresponding to the light shielding part 4 has a first thickness part having the same thickness as before development. d1). The photoresist film PR corresponding to the transflective portion 6 forms a second thickness portion d2 corresponding to about half the thickness of the first thickness portion. Accordingly, the photoresist pattern P1 including the first thickness part d1 and the second thickness part d2 is formed on the source metal layer 150.

1 and 5, the source metal layer 150 is etched using the photoresist pattern P1. Accordingly, an electrode pattern 152 and a source wiring DL are formed on the first base substrate 110. The source wiring DL extends in a second direction crossing the first direction. Therefore, a plurality of pixel parts P is defined on the first base substrate 110 by gate lines GL extending in a first direction and source lines DL extending in a second direction. When the storage wiring STL forms the branch area br in the second direction, the storage wiring STL and the source wiring DL overlap each other.

The electrode pattern 152 is connected from the source wiring DL and is formed to overlap a predetermined region with the gate electrode 120. The electrode pattern 152 is a pattern for forming the source electrode 154 and the drain electrode 156 of the switching element TFT, and the source electrode 154 and the drain electrode 156 are connected to each other without being spaced apart from each other. Has Meanwhile, an etching surface N is exposed on side surfaces of the electrode pattern 152 and the source wiring DL.

In the four-mask process, the active layer 140a and the ohmic contact layer 140b are dry-etched using the electrode pattern 152 and the source wiring DL as an etching mask. In general, the active layer 140a and the ohmic contact layer 140b are etched using a chlorine-based gas such as HCl gas, Cl2 gas, and a mixed gas such as SF6 gas.

However, the chlorine-based gas reacts with copper Cu included in the electrode pattern 152 and the source wiring DL on the etching surface N of the electrode pattern 152 and the source wiring DL.

Accordingly, copper chlorides (CuCl (s) and CuCl 2 (s)), which are reaction byproducts, are formed on the etching surface (N), and copper chlorides (CuCl (s) and CuCl 2 (s)) are formed on the electrode pattern 152. And may remain in the source wiring DL to cause an increase in wiring resistance and a wiring defect. Therefore, even when the chlorine-based gas is omitted and etched using only SF6 gas to prevent the formation of the reaction by-product described above, copper fluoride (CuF2 (s)) is generated as the reaction by-product. Therefore, the above-mentioned defects are caused even when only SF6 gas is used.

Accordingly, in the present invention, before performing the dry etching process of the active layer 140a and the ohmic contact layer 140b, the etching surface N of the electrode pattern 152 and the source wiring DL is moved to an oxygen plasma (O2 Plasma). ) To form an oxide film made of the second copper oxide (CuO (s)) on the etching surface (N).

FIG. 6 is an enlarged view illustrating an enlarged etching surface N of FIG. 5. Referring to FIG. 6, an oxide film OL made of second copper oxide CuO (s) is formed on the etching surface N of the electrode pattern 152 and the source wiring DL after an oxygen plasma treatment.

Meanwhile, when the oxygen plasma treatment is performed, an oxide film OL including first copper oxide Cu 2 O (s) and second copper oxide CuO (s) may be formed on the etching surface N. In the present invention, an oxide film OL composed of only the second copper oxide CuO (s) is formed by using the method described below with reference to FIG. 14.

However, the second copper oxide (CuO (s)) also has high reactivity with chlorine-based gas, and when HCl gas and Cl2 gas are used as an etching gas of the dry etching process, oxygen is lost and copper chloride (CuCl (s)) is used. Will form. That is, when the chlorine-based gas such as HCl gas and Cl2 gas is used in the dry etching process of the active layer 140a and the ohmic contact layer 140b, the generation of reaction by-products cannot be avoided.

Therefore, in the present invention, by forming an oxide film OL made of the second copper oxide Cu0 (s) on the etching surface, dry etching the active layer 140a and the ohmic contact layer 140b using only SF6 gas, It inhibits the production of the reaction byproducts described above. Specific description of the inhibition of the production of the reaction by-products will be described in detail with reference to FIGS. 13 to 15.

Referring to FIG. 7, a channel layer 140 having a structure in which the active layer 140a and the ohmic contact layer 140b are stacked below the electrode pattern 152 and the source wiring DL is formed through the dry etching process. Is formed.

7 and 8, a first ashing process of removing a predetermined thickness of the photoresist pattern P1 using an oxygen plasma is performed. Accordingly, the second thickness portion d2 formed to about half the thickness of the first thickness portion d1 is removed, and the thickness of the first thickness portion d1 is reduced. The electrode pattern 152 is exposed in an area where the second thickness part d2 is removed.

1 and 9, the electrode pattern 152 is etched using the remaining photoresist pattern P1 as an etching mask. The etching of the electrode pattern 152 is, for example, proceeds by wet etching. Accordingly, a source electrode 154 connected from the source wiring DL and a drain electrode 156 spaced apart from the source electrode 154 by a predetermined interval are formed. The source electrode 154 overlaps the gate electrode 120 by a predetermined interval, and is formed in a U-shape as an example. The drain electrode 156 is spaced apart from the source electrode 154 by a predetermined interval and overlaps the gate electrode 120 by a predetermined interval. The ohmic contact layer 140b of the channel layer 140 is exposed at the spaced portion between the source electrode 154 and the drain electrode 156. In addition, an etching surface N of the source electrode 154 and the drain electrode 156 is exposed in the separation part.

In the four-sheet mask process, the exposed ohmic contact layer 140b is dry-etched using the source electrode 154 and the drain electrode 156 as an etching mask. In this case, as described above with reference to FIG. 5, when chlorine-based gas is used as the dry etching gas, copper chloride (CuCl (s)) may be formed on the etching surface N of the source electrode 154 and the drain electrode 156. Reaction byproducts may be formed. Accordingly, the dry etching process of the ohmic contact layer 140b using the source electrode 154 and the drain electrode 156 as an etching mask is performed similarly to the process of forming the channel layer 140 described above with reference to FIG. 5.

That is, after formation of the source electrode 154 and the drain electrode 156, an oxygen plasma treatment process is performed on the etching surfaces of the source electrode 154 and the drain electrode 156. An oxide film OL formed of)) is formed. The photoresist pattern P1 remaining on the source electrode 154 and the drain electrode 156 is also removed during the oxygen plasma treatment process.

1 and 10, the ohmic contact layer 140b is etched by performing a dry etching process using only SF6 gas. Accordingly, a channel portion 142 exposing the active layer 140a is formed between the source electrode 154 and the drain electrode 156. Therefore, a switching element TFT including the gate electrode 120, the source electrode 154, the drain electrode 156, and the channel unit 154 is formed on each pixel unit P.

Referring to FIG. 11, the passivation layer 160 is coated on the gate insulating layer 130 on which the switching element TFT is formed. The passivation film 160 may be formed of, for example, a silicon nitride film (SiNx) or a silicon oxide film (SiOx), and may be formed using a plasma chemical vapor deposition method (PECVD). Subsequently, a photolithography process using a third mask MASK 3 is performed to form a contact hole 162 exposing a part of the drain electrode 156.

Referring to FIG. 12, a transparent conductive material is coated on the passivation film 160 where the contact hole 162 is formed. The transparent conductive material is made of, for example, indium tin oxide or indium zinc oxide. Subsequently, the transparent conductive material (not shown) is patterned by a photo-etching process using a fourth mask MASK 4 to electrically contact the drain electrode 156 through the contact hole 162. 170). Thus, the display substrate 100 according to the present invention is completed.

Meanwhile, in FIGS. 11 to 12, the passivation layer 160 is patterned using the third mask MASK3, and the four mask process of patterning the pixel electrode 170 using the fourth mask MASK4 is applied. The passivation layer 160 and the pixel electrode 170 may be formed using one mask.

FIG. 13 is a graph showing the ΔG − temperature correlation for the reactivity of SF6 gas with the first and second copper oxides (Cu 2 O (I), CuO (II)).

The first and second copper oxides Cu 2 O (I) and CuO (II) may be generated on the etching surface N of the electrode pattern and the source wiring by the oxygen plasma treatment described above with reference to FIGS. 5 to 6. Oxide. The SF6 gas is an etching gas used in the dry etching process of the active layer and the ohmic contact layer described above with reference to FIG. 7.

GIBBS FREE ENERGY (hereafter G) is a thermodynamic quantity defined by the formula G = H-TS. Briefly describing free energy, the amount of free energy is a direct reference to the spontaneity of a reaction. When the reaction proceeds at a given temperature and pressure, the reactant produces a product and the enthalpy (H) and entropy (S) change. When the change amount is expressed as ΔG, ΔH, and ΔS, the change amount of free energy is given by the following equation.

ΔG = ΔH-TΔS

That is, ΔG is equal to the amount of ΔH − TΔS used as a reference for the spontaneity of the reaction. Thus, it can be predicted that the reaction is spontaneous if ΔG of the reaction at a given temperature and pressure is negative. The following simple relationship is established between the spontaneous reaction of a chemical reaction at a constant temperature and pressure and the value of ΔG.

If ΔG is negative, the reaction is spontaneous in the forward direction.

If ΔG = 0, the reaction is at equilibrium.

If ΔG is a positive value, the reaction is involuntary in the forward direction.

Referring to FIG. 8, the first and second copper oxides (Cu 20 (I) and CuO (II)) may be exposed to SF 6 gas to allow the reaction of Chemical Formulas 1 to 8 to proceed.

[Formula 1]

2CuO (II) + 2SF6 → 2CuF2 (s) + 2SF + O2 + 3F2

[Formula 2]

2CuO (II) + 2SF6 → 2CuF2 (s) + 2SF2 + 02 + 2F2

[Formula 3]

2Cu2O (I) + 4SF6 → 4CuF2 (s) + 4SF3 + O2 + 2F2

[Formula 4]

2Cu2O (I) + 2SF6 → 4CuF2 (s) + 2SF + O2 + F2

[Formula 5]

2CuO (II) + 2SF6 → 2CuF2 (s) + 2SF3 + O2 + F2

[Formula 6]

2CuO (II) + 2SF6 → 2CuF2 (s) + 2SF4 + O2

[Formula 7]

2Cu2O (I) + 2SF6 → 4CuF2 (S) + 2SF2 + O2

[Formula 8]

2Cu20 (I) + 4SF6 → 4CuF2 (s) + 4SF4 + O2

However, referring to the ΔG − temperature correlation graphs of Formulas 1, 2, 3, 4, and 5, it can be predicted that spontaneous reaction hardly proceeds because ΔG has a positive value in the temperature range of 200 to 1300K. have. Therefore, in the dry etching process of the active layer and the ohmic contact layer using SF6 gas, reaction by-products of the solid phase (s) due to the reaction of Formulas 1 to 5 are hardly formed on the etching surface of the electrode pattern and the source wiring.

 However, referring to the ΔG − temperature correlation graphs of Chemical Formulas 6, 7, and 8, since ΔG has a negative value in most temperature ranges, a spontaneous reaction proceeds to generate a reaction byproduct (CuF 2 (s)). It can be predicted.

At this time, in Formula 6, ΔG has a negative value at a temperature of about 500K or more. Therefore, by lowering the process temperature to 500K or less during the dry etching process, it is possible to suppress the spontaneous reaction of Chemical Formula 6 to prevent the production of reaction by-products (CuF2 (s)). The process temperature is not only a temperature in the chamber where the dry etching process is performed, but also means a surface temperature of the first base substrate. During the dry etching process, since the temperature of the first base substrate may rise to a high temperature due to plasma collision, the temperature of the first base substrate is also preferably maintained at 500K or less.

On the other hand, the absolute temperature of 500K in terms of Celsius is 227 ° C. Accordingly, the spontaneous reaction of Chemical Formula 6 may be suppressed by performing the dry etching process under process conditions in which the temperature of the surface of the first base substrate is maintained at 227 ° C. or lower. More preferably, during the dry etching process, the surface temperature of the first base substrate is maintained at 200 ° C. or less. Accordingly, it is possible to prevent the formation of copper fluoride (CuF 2 (s)) which is a reaction by-product due to the reaction of the second copper oxide (CuO (II)) and the SF 6 gas.

Since Chemical Formulas 7 and 8 are reactions of the first copper oxide (Cu20 (I)) and SF6 gas, the reaction of Chemical Formulas 6 and 7 proceeds by inhibiting the production of the first copper oxide (Cu20 (I)). Can be prevented. Specifically, during the oxygen plasma treatment for forming the oxide film OL in FIG. 6, the production of the first copper oxide Cu 20 (I) can be suppressed by adjusting the oxygen partial pressure and the process temperature in the chamber.

14 is a reaction equilibrium graph of Cu—CuO (II) —Cu 2 O (I) according to oxygen partial pressure and reaction temperature.

The horizontal axis of Figure 14 shows an all oxygen partial pressure by using a 1 atm (P _O2) of the log (Log) substituted by one level and the oxygen partial pressure by using a 1 mTorr value (P _O2) for one substituted with logarithm value . atm and mTorr are both units of pressure and 1 atm means 1 atmosphere. The converted value of 1 atm and mTorr is as follows.

1 atm = 760000 mTorr

Referring to FIG. 14, it can be seen that as the temperature is lower and the oxygen partial pressure (P _O2 ) is higher, the production of the first copper oxide Cu20 (I) is suppressed and the production of the second copper oxide CuO (II) is promoted. have. That is, as the temperature in the chamber where the oxygen plasma process is performed and the surface temperature of the first base substrate are low, and the oxygen partial pressure (P _O2 ) in the chamber is high, the generation of the first copper oxide (Cu _{2 O} (I)) is suppressed. The production of copper dioxide (CuO (II)) is accelerated.

On the other hand, in FIG. 14, a temperature range of approximately 800 ° C. or more is shown.

In Fig. 14, a graph showing the formation interface between the first copper oxide (Cu 2 O (I)) and the second copper oxide (CuO (II)) is extended to around 200 ° C., which is a temperature rise region of the first base substrate by plasma collision. By analogy, it can be predicted that most of the oxide is produced as the second copper oxide (CuO (II)) at 200 ° C except for the extremely low oxygen partial pressure (P _{O 2} ) in the chamber.

The oxygen plasma process is performed at room temperature, but the production of the first copper oxide (Cu 2 O (I)) may be promoted by increasing the temperature of the first base substrate to a high temperature by the plasma collision. Therefore, in the present embodiment, it is preferable to maintain the temperature of the first base substrate at 200 ° C. or lower during the oxygen plasma process.

Specifically, the generation of the first copper oxide (Cu _{2 O} (I)) is suppressed by maintaining the temperature of the first base substrate at 200 ° C. or lower and maintaining the oxygen partial pressure (P _{O 2} ) in the chamber at 500 mTorr or more during the oxygen plasma process. And the production of the second cupric oxide (CuO (II)).

Accordingly, referring again to FIG. 13, since the production of the first copper oxide (Cu 2 O (I)) is suppressed, the reactions of Chemical Formulas 7 and 8 hardly proceed. Therefore, it is possible to prevent the generation of reaction by-products (CuF2 (s)) due to the reaction of the SF6 gas and the first copper oxide (Cu2O (I)).

On the other hand, there is one more thing to consider in carrying out such a process. Although reaction by-products of the liquid phase (1) and the solid phase (s) due to the reaction of the second copper oxide (CuO (II)) and the SF6 gas are not produced, the second copper oxide (CuO ( II)) is decomposed into the gas phase g of copper fluoride (CuF (g)), the copper of the existing etching surface (Cu) can be exposed again.

 However, referring to FIG. 15, it can be seen that there is little possibility that the second copper oxide (CuO) is decomposed into the gas phase (g) copper fluoride (CuF (g)) by reacting with SF6 gas.

FIG. 15 is a ΔG − temperature correlation graph for the formation of gaseous copper fluoride (CuF (g)) according to the reaction of SF 6 gas with cupric oxide (CuO).

Referring to FIG. 15, the second copper oxide (CuO (II)) may react with SF6 gas to allow the reaction of Chemical Formulas 9 to 12 to proceed.

[Formula 9]

2CuO (II) + 2SF6 → 2CuF (g) + 2SF + O2 + 4F2

[Formula 10]

2CuO (II) + 2SF6 → 2CuF (g) + 02 + 3F2

[Formula 11]

2CuO (II) + 2SF6 → 2CuF (g) + 2SF3 +02 + 2F2

[Formula 12]

2CuO (II) + 2SF6 → 2CuF (g) + 2SF4 +02 + F2

However, referring to the ΔG − temperature correlation graph of Chemical Formulas 9, 10, 11, and 12, all of Chemical Formulas 9, 10, 11, and 12 in the temperature range of 200 K (−73 ° C.) to 1400 K (1127 ° C.) It can be seen that is a positive value. That is, during the dry etching process using the SF 6 gas, the reaction in which the second copper oxide (CuO (II)) reacts with the SF 6 gas to be decomposed into gaseous CuF (g) hardly proceeds spontaneously.

Therefore, since exposure of copper Cu due to decomposition of the oxide layer OL is prevented, corrosion of the second metal pattern may be prevented. As a result, the wiring defect can be reduced, so that the reliability of the display substrate to which the copper wiring is applied can be improved.

16 is a cross-sectional view illustrating a display device according to an exemplary embodiment of the present invention.

Referring to FIG. 16, the display device 400 includes a display substrate 100, an opposing substrate 200, and a liquid crystal layer 300 injected between the display substrate 100 and the opposing substrate 200. do.

Meanwhile, since the display substrate 100 is the same as the display substrate 100 illustrated in FIG. 12, a detailed description thereof will be omitted.

The opposing substrate 200 includes a second base substrate 210. The second base substrate 210 is made of a transparent material, such as glass and quartz, like the first base substrate 110. Preferably, the second base substrate has a smaller area than the first base substrate 110.

A light blocking film 220, a color filter layer 230, an overcoat layer 240, and a common electrode layer 250 are formed on the second transparent substrate 210 on the second base substrate 210.

The light blocking film 220 is formed at a position corresponding to the switching element TFT, the source wiring DL, and the gate wiring GL of the display substrate 100. The light blocking film 220 blocks light passing through the liquid crystal layer 300 in a region that is not controlled by the pixel electrode PE to improve the contrast ratio of the display screen.

The color filter layer 230 is formed corresponding to each pixel portion P and includes a plurality of color filter patterns R, G, and B having colors of red, green, and blue. In this case, the color filter patterns R, G, and B may be formed to overlap the light blocking layer 220 by a predetermined region.

 The overcoat layer 240 is formed of a transparent polycarbonate-based photoresist and is formed on the entire surface of the second base substrate 210 on which the color filter layer 230 is formed. The overcoat layer 240 flattens the surface of the second base substrate 210 on which the color filter layer 230 is formed.

The common electrode 250 is formed on the entire upper surface of the overcoat layer 240. The common electrode 250 receives a common voltage from an external voltage generator. The common electrode 250 is made of transparent and conductive tin indium oxide (ITO), zinc indium oxide (IZO), amorphous tin oxide (a-ITO), or the like.

When the pixel voltage is applied to the pixel electrode 170 and the common voltage is applied to the common electrode 250, the liquid crystal layer 300 is applied to an electric field formed between the pixel electrode 170 and the common electrode 250. Are arranged. The arranged liquid crystal layer 300 adjusts the light transmittance, and the light whose transmittance is controlled by the liquid crystal layer 300 passes through the color filter layer 230 to display an image.

As described above, when the second metal pattern is formed using copper or a copper alloy, an oxide film is formed on the etching surface by oxygen plasma treatment, and only SF6 gas is used as an etching gas in a dry etching process which will be performed later. This suppresses the formation of reaction by-products due to the contact of the etching gas with the second metal pattern. Accordingly, when manufacturing the display substrate of the four mask process of dry etching the active layer and the ohmic contact layer using the second metal pattern as an etching mask, wiring defects due to reaction byproduct formation may be reduced. Therefore, the reliability of the display board | substrate which applied copper wiring can be improved.

Although described above with reference to the embodiments, those skilled in the art can be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below. I can understand.

Claims (12)

Forming a first metal pattern including a gate wiring and a gate electrode on the substrate; Sequentially stacking an insulating layer, an active layer, an ohmic contact layer, and a metal layer on the entire surface of the substrate to cover the first metal pattern; Patterning the metal layer to form a second metal pattern including a source wiring and an electrode pattern connected to the source wiring and partially overlapping the gate electrode; Forming a first oxide film on an etching surface of the second metal pattern by performing a first oxygen plasma treatment; Forming a channel layer under the second metal pattern by first dry etching the active layer and the ohmic contact layer; Etching a portion of the electrode pattern to form a source electrode and a drain electrode spaced apart from the source electrode; And  Forming a pixel electrode connected to the drain electrode. The display substrate of claim 1, further comprising: forming a second oxide layer on an etch surface of the source electrode and the drain electrode by performing a second oxygen plasma treatment after forming the drain electrode. Method of preparation. The method of claim 2, wherein the first and second oxygen plasma processes are performed under process conditions in which an elevated temperature of the substrate is 200 ° C. or less. The method of claim 2, wherein the first and second oxygen plasma treatments are performed at an oxygen pressure of 500 mTorr or more. The method of claim 2, wherein the second metal pattern comprises copper. The method of claim 5, wherein the first and second oxide films are formed of a second copper oxide (CuO (II)). The method of claim 2, further comprising etching the ohmic contact layer of the channel layer using the source electrode and the drain electrode as a mask. The method of claim 7, wherein the first and second dry etchings use SF6 gas. The method of claim 7, wherein the first and second dry etching are performed under process conditions in which an elevated temperature of the substrate is 227 ° C. (500K) or less. A first substrate; A first metal pattern formed on the first substrate and including a gate wiring and a gate electrode; A gate insulating film formed on the entire surface of the first substrate to cover the first metal pattern; A second metal pattern including a source wiring crossing the gate lines, a source electrode connected from the source wiring, and a drain electrode spaced apart from the source electrode by a predetermined distance; A channel layer formed between the gate insulating layer and the second metal pattern; And A second substrate facing the first substrate, And the second metal pattern includes copper or a copper alloy, and an oxide layer is formed on a side surface thereof. The display device of claim 10, wherein the channel layer is exposed between the source electrode and the drain electrode. The display device of claim 11, wherein the oxide layer is formed of a second copper oxide (CuO (II)).

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