KR101298398B1 - Display - Google Patents

Abstract

An embodiment of the present invention, a display panel; And a subpixel positioned on a display panel, the transistor including a gate, a source, and a drain, and a subpixel connected to a source or a drain of the transistor and including a pixel electrode formed of a copper oxide system.

Display device, pixel electrode, common electrode

Description

Display {Display}

The present invention relates to a display device.

As the information technology is developed, the market of display devices, which is a connection medium between users and information, is getting larger. Accordingly, a flat panel display (FPD) such as a liquid crystal display (LCD), an organic light emitting display (OLED), a plasma display panel (PDP), or the like. The use of is increasing.

Among the flat panel displays, the liquid crystal display and the organic light emitting display may display an image by emitting light of a subpixel by driving a transistor positioned in the display panel.

Liquid crystal displays are classified into light receiving displays. Such a liquid crystal display may display an image by receiving a light source from a backlight unit positioned under the display panel. The display panel includes a transistor array substrate and a color filter substrate. In the display panel, a plurality of subpixels arranged in a matrix form is located. One subpixel may include a transistor, a capacitor, a pixel electrode, and a common electrode. In addition, the subpixel may include a black matrix for separating each subpixel and a color filter for converting the emitted light according to the driving of the liquid crystal layer.

The organic light emitting display device is classified into a self-luminous display device. Unlike the liquid crystal display, the organic light emitting display may generate an image by generating light. The display panel includes a transistor array substrate and an organic light emitting diode positioned on the transistor array substrate. In the display panel, a plurality of subpixels arranged in a matrix form is located. One subpixel may include a transistor, a capacitor, a pixel electrode, an organic emission layer, and a common electrode.

Meanwhile, the liquid crystal display and the organic light emitting display device use a transparent electrode such as indium tin oxide (ITO) as one or more materials of the pixel electrode and the common electrode. Transparent electrodes such as ITO are excellent in permeability, but the manufacturing cost is increased. In order to replace this, alternative materials such as indium zinc oxide (IZO) have been developed in the past, but they were not attractive enough for cost innovation.

Therefore, there is a need for preparing an alternative electrode material that can have permeability and conductivity, as well as lower manufacturing costs and benefit manufacturing processes.

Embodiments of the present invention for solving the above problems of the background technology, by providing a copper oxide-based electrode excellent in permeability and conductivity to replace the conventional electrode material as well as to reduce the manufacturing cost cost innovation (cost innovation) in the manufacturing process It is to provide a display device capable of enabling.

Embodiment of the present invention by the above-described problem solving means, the display panel; And a subpixel positioned on a display panel, the transistor including a gate, a source, and a drain, and a subpixel connected to a source or a drain of the transistor and including a pixel electrode formed of a copper oxide system.

The subpixel may include a common electrode made of copper oxide.

The copper oxide system may be made of CuOx or CuyOx, and y may be an impurity element.

Impurity elements include titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), molybdenum (Mo), tungsten (W), manganese (Mn), cobalt (Co), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), ruthenium (Ru), iridium (Ir), and germanium (Ge).

At least one of the gate, source and drain may be made of copper (Cu).

The diffusion barrier layer may further include a diffusion barrier layer positioned below the electrode made of copper (Cu) among the gate, the source, and the drain.

The diffusion barrier layer may be made of any one of Mo, Mo, Ti, Ti, or Ti alloy.

The display panel may include a liquid crystal layer driven in any one of an in-plane switching (IPS) mode, a vertical alignment (VA) mode, and a twisted nematic (TN) mode.

Embodiments of the present invention provide a display device capable of providing cost innovation in a manufacturing process by providing a copper oxide-based electrode having excellent transparency and conductivity, as well as replacing conventional electrode materials and lowering manufacturing costs. It is effective. In addition, the embodiment of the present invention has the effect of providing a convenience of the process by replacing the electrode included in the transistor with a copper oxide-based electrode.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is an exploded perspective view of a display device, and FIG. 2 is an exemplary view of an edge type light source.

As shown in FIG. 1, the display device may include a light source 171 that emits light. For the light source 171, for example, Cold Cathode Fluorescent Lamp (CCFL), Hot Cathode Fluorescent Lamp (HCFL), External Electrode Fluorescent Lamp (EEFL) and Luminescence One of a diode (Light Emitting Diode: LED) may be selected, but is not limited thereto.

In addition, the light source 171 may select any one of an edge type in which the lamp is located on one side outside, a dual type in which the lamp is located on both sides, and a direct type in which a plurality of lamps are arranged in a straight line, but is not limited thereto. The light source 171 as described above may be connected to an inverter to receive power by emitting power.

The light source 171 shown in FIG. 1 shows a direct type as an example. Alternatively, referring to FIG. 2, an edge type light source 171 is shown. The edge-type light source 171 as shown may include a lamp 171a and a light guide plate 171b for guiding light emitted from the lamp 171a on one side outside thereof, but is not limited thereto.

In addition, the display device may include an optical film layer 176 that guides light emitted from the light source 171. The optical film layer 176 may include a diffusion plate 172, a diffusion sheet 173, an optical sheet 174, and a protective sheet 175 positioned on the light source 171.

The optical sheet 174 may have a prism shape as shown, but may be positioned in a shape such as a lenticular lens or a micro lens. And such an optical sheet 174 may include a bead.

In addition, the display device may include a display panel 183 displaying an image and an upper case 190 and a lower case 170 in which the light source 171 is accommodated.

The lower case 170 may receive the light source 171. The display panel 183 may be positioned on the light source 171 at a predetermined interval. The display panel 183 and the light source 171 may be fixed and protected by the upper case 190 coupled to the lower case 170.

An opening for exposing an image display area of the display panel 183 may be provided on an upper surface of the upper case 190. In addition, a mold frame (not shown) may be further included on the periphery of the optical film layer 176 positioned between the display panel 183 and the light source 171.

The display panel 183 may have a structure in which the first substrate 110 having the transistor array and the second substrate 180 having the color filter are bonded to each other with the liquid crystal layer interposed therebetween. The display panel 183 may be classified into an in-plane switching (IPS) mode, a vertical alignment (VA) mode, and a twisted nematic (TN) mode according to the driving mode of the liquid crystal layer.

In the display panel 183, subpixels driven independently by a transistor are arranged in a matrix, and each subpixel is applied to a difference voltage between a common voltage supplied to a common electrode and a data signal supplied to a pixel electrode connected to the transistor. Accordingly, an image can be displayed by controlling the liquid crystal array to adjust the light transmittance.

In addition, the display device may include a driving unit 189 connected to the first substrate 110 of the display panel 183. The driver 189 includes a plurality of flexible films 120 having a first driver 110 and one side connected to each other by mounting a data driver and a scan driver for driving the data wires and the scan wires of the display panel 183. An external circuit board 188 connected to the other side of the flexible film 120 may include.

The flexible film 120 having the data driver and the scan driver mounted thereon may be located in a chip on film (COF) or tape carrier package (TCP) method. However, one or more of the data driver or the scan driver may be directly mounted on the first substrate 110 by a chip on glass (COG) method or may be formed and embedded on the first substrate 110 in a transistor forming process.

Hereinafter, the IPS mode display panel 183 according to the embodiment of the present invention will be described in more detail.

3 is a schematic cross-sectional view of an IPS mode display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 3, the display panel 183 may include a first substrate 110 and a second substrate 180. The first substrate 110 and the second substrate 180 may be selected from those having excellent mechanical strength or dimensional stability as materials for forming the device. The material of the first substrate 110 and the second substrate 180 may be a glass plate, a metal plate, a ceramic plate or a plastic plate (polycarbonate resin, acrylic resin, vinyl chloride resin, polyethylene terephthalate resin, polyimide resin, polyester). Resins, epoxy resins, silicone resins, fluororesins, and the like).

The gate 101 may be located on the first substrate 110. Gate 101 is any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) It may be made of one or an alloy thereof. In addition, the gate 101 is formed of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be a multilayer made of any one or alloys thereof. In addition, the gate 101 may be a double layer of molybdenum / aluminum-neodymium or molybdenum / aluminum.

The first insulating layer 102 may be positioned on the gate 101. The first insulating layer 102 may be, but is not limited to, a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), or a multilayer thereof.

The active layer 103 may be positioned on the first insulating layer 102. The active layer 103 may include amorphous silicon or polycrystalline silicon crystallized therefrom. Although not illustrated here, the active layer 103 may include a channel region, a source region, and a drain region. The active layer 103 may be formed of a-Si, p-Si, or the like.

The ohmic contact layer 104 may be positioned on the active layer 103 to reduce electrical contact resistance.

The source 105a and the drain 105b may be positioned on the active layer 103. The source 105a and the drain 105b may be formed of a single layer or multiple layers. When the source 105a and the drain 105b are a single layer, molybdenum (Mo), aluminum (Al), chromium (Cr), and gold may be used. (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) may be made of any one or an alloy thereof. In addition, when the source 105a and the drain 105b are multiple layers, the double layer of molybdenum / aluminum-neodymium and the triple layer of molybdenum / aluminum / molybdenum or molybdenum / aluminum-neodymium / molybdenum may be used.

The second insulating layer 106 may be positioned on the source 105a and the drain 105b. The second insulating layer 106 may be, but is not limited to, a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), or a multilayer thereof. The second insulating layer 106 may be a protective layer.

A spacer 116 may be disposed on the second insulating layer 106 to maintain a cell gap with the second substrate 180. The spacer 116 may be disposed on the second insulating layer 106 corresponding to the gate 101, which may correspond to a non-display area in which a light source positioned below the display panel 183 is not emitted. have.

A pixel electrode 107 connected to the source 105a or the drain 105b and formed of a copper oxide system may be disposed on the second insulating layer 106. In addition, a common electrode 108 spaced apart from the pixel electrode 107 and connected to the common voltage line may be disposed on the second insulating layer 106. The common electrode 108 may be formed of the same copper oxide system as the pixel electrode 107.

Here, the copper oxide system may be made of CuOx or CuyOx, and y may be an impurity element. Impurity elements include titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), molybdenum (Mo), tungsten (W), manganese (Mn), cobalt (Co), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), ruthenium (Ru), iridium (Ir), and germanium (Ge).

When at least one of the pixel electrode 107 and the common electrode 108 is formed of a copper oxide system, it is possible to replace indium tin oxide (ITO) or indium zinc oxide (IZO) used as a conventional pixel electrode, and to reduce manufacturing costs. This can enable cost innovation in terms of process. The copper oxide-based electrode may be formed by a reactive sputtering method. Copper oxide electrode is a transition oxide (transition oxide) is relatively excellent in permeability and conductivity. If the copper oxide-based electrode is located on the surface of the exposed area of the pad portion disposed on the first substrate 110 may serve as a protective film.

On the other hand, the black matrix 111 may be located in the non-display area on the second substrate 180 facing the first substrate 110. The black matrix 111 is made of a photosensitive organic material to which a black pigment is added, and as the black pigment, carbon black or titanium oxide may be used.

In addition, a color filter 112 including red, green, and blue may be located between the black matrices 111 disposed on the second substrate 180. The color filter 112 may have other colors as well as red, green, and blue.

In addition, the overcoating layer 113 may be disposed on the black matrix 111 and the color filter 112. However, in some cases, the overcoat layer 113 may be omitted.

The first substrate 110 and the second substrate 180 configured as described above may be bonded by the adhesive member 116, and the bonded first substrate 110 and the second substrate 180 may be in an IPS mode operating condition. A matching liquid crystal layer 115 may be located.

Hereinafter, the modified embodiment of FIG. 3 will be described with reference to FIG. 4. However, in order to avoid duplication of description, only a part separated from FIG. 4 will be briefly described.

4 is a schematic cross-sectional view of an IPS mode display panel according to a modified embodiment of FIG. 3.

Referring to FIG. 4, at least one of the gate 101, the source 105a, and the drain 105b constituting the transistor may include copper (Cu) in the IPS mode display panel 183 according to the modified embodiment of the present invention. Can be done. Here, the diffusion barrier 109 may be located under the electrode made of copper (Cu) among the gate 101, the source 105a, and the drain 105b. In the present embodiment, however, the source 105a and the drain 105b are made of copper (Cu) as an example.

The diffusion barrier 109 may be formed of any one of Mo, Mo, Ti, Ti, or Ti alloy.

However, in consideration of the convenience of the process due to the unification of the materials, the diffusion barrier 109 may be made of a copper oxide system used as the material of the pixel electrode 107 and the common electrode 108.

Hereinafter, the VA mode display panel 183 according to the embodiment of the present invention will be described in more detail.

5 is a schematic cross-sectional view of a VA mode display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 5, the display panel 183 may include a first substrate 110 and a second substrate 180. The first substrate 110 and the second substrate 180 may be selected from those having excellent mechanical strength or dimensional stability as materials for forming the device.

The gate 101 may be located on the first substrate 110. Gate 101 is made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) It may be made of any one or an alloy thereof. In addition, the gate 101 may be multiple layers. In addition, the gate 101 may be a double layer.

The first insulating layer 102 may be positioned on the gate 101. The first insulating layer 102 may be, but is not limited to, a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), or a multilayer thereof.

The active layer 103 may be positioned on the first insulating layer 102. The active layer 103 may include amorphous silicon or polycrystalline silicon crystallized therefrom. Although not illustrated here, the active layer 103 may include a channel region, a source region, and a drain region. The active layer 103 may be formed of a-Si, p-Si, or the like.

The ohmic contact layer 104 may be positioned on the active layer 103 to reduce electrical contact resistance.

The source 105a and the drain 105b may be positioned on the active layer 103. The source 105a and drain 105b may be made of a single layer or multiple layers.

The second insulating layer 106 may be positioned on the source 105a and the drain 105b. The second insulating layer 106 may be, but is not limited to, a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), or a multilayer thereof. The second insulating layer 106 may be a protective layer.

A spacer 116 may be disposed on the second insulating layer 106 to maintain a cell gap with the second substrate 180. The spacer 116 may be positioned on the second insulating layer 106 corresponding to the gate 101, and this area may correspond to a non-display area in which a light source positioned below the display panel 183 is not emitted. Can be.

A pixel electrode 107 connected to the source 105a or the drain 105b and formed of a copper oxide system may be disposed on the second insulating layer 106.

On the other hand, the black matrix 111 may be located in the non-display area on the second substrate 180 facing the first substrate 110. The black matrix 111 is made of a photosensitive organic material to which a black pigment is added, and as the black pigment, carbon black or titanium oxide may be used.

In addition, a color filter 112 including red, green, and blue may be located between the black matrices 111 disposed on the second substrate 180. The color filter 112 may have other colors as well as red, green, and blue.

In addition, the overcoating layer 113 may be disposed on the black matrix 111 and the color filter 112. However, in some cases, the overcoat layer 113 may be omitted.

The common electrode 108 may be disposed on the overcoat layer 113 to face the pixel electrode 107 and be connected to the common voltage line. The common electrode 108 may be formed of the same copper oxide system as the pixel electrode 107.

Meanwhile, the copper oxide system constituting the pixel electrode 107 and the common electrode 108 may be formed of CuOx or CuyOx, and y may be an impurity element. Impurity elements include titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), molybdenum (Mo), tungsten (W), manganese (Mn), cobalt (Co), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), ruthenium (Ru), iridium (Ir), germanium (Ge) may be included.

When at least one of the pixel electrode 107 and the common electrode 108 is formed of a copper oxide system, it is possible to replace indium tin oxide (ITO) or indium zinc oxide (IZO) used as a conventional pixel electrode, and to reduce manufacturing costs. This can enable cost innovation in terms of process. The copper oxide based electrode may be formed by a reactive sputtering method. Copper oxide electrode is a transition oxide (transition oxide) is relatively excellent in permeability and conductivity. If the copper oxide-based electrode is located on the surface of the exposed area of the pad portion disposed on the first substrate 110 may serve as a protective film.

The first substrate 110 and the second substrate 180 configured as described above may be bonded by the adhesive member 116, and the bonded first substrate 110 and the second substrate 180 may be in a VA mode operating condition. A matching liquid crystal layer 115 may be located.

Hereinafter, the modified embodiment of FIG. 5 will be described with reference to FIG. 6. However, in order to avoid duplication of description, only a part separated from FIG. 5 will be briefly described.

6 is a schematic cross-sectional view of a VA mode display panel according to the modified embodiment of FIG. 5.

Referring to FIG. 6, in the VA mode display panel 183, at least one of the gate 101, the source 105a, and the drain 105b constituting the transistor may be copper (Cu). Can be done. Here, the diffusion barrier 109 may be located under the electrode made of copper (Cu) among the gate 101, the source 105a, and the drain 105b. In the present embodiment, however, the source 105a and the drain 105b are made of copper (Cu) as an example.

The diffusion barrier 109 may be formed of any one of Mo, Mo, Ti, Ti, or Ti alloy.

However, in consideration of the convenience of the process due to the unification of the materials, the diffusion barrier 109 may be made of a copper oxide system used as the material of the pixel electrode 107 and the common electrode 108.

Hereinafter, the TN mode display panel 183 according to the embodiment of the present invention will be described in more detail.

7 is a schematic cross-sectional view of a TN mode display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 7, the display panel 183 may include a first substrate 110 and a second substrate 180. The first substrate 110 and the second substrate 180 may be selected from those having excellent mechanical strength or dimensional stability as materials for forming the device.

The gate 101 may be located on the first substrate 110. Gate 101 is any one selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) It may be made of one or an alloy thereof. In addition, the gate 101 may be multiple layers. In addition, the gate 101 may be a double layer.

The first insulating layer 102 may be positioned on the gate 101. The first insulating layer 102 may be, but is not limited to, a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), or a multilayer thereof.

The active layer 103 may be positioned on the first insulating layer 102. The active layer 103 may include amorphous silicon or polycrystalline silicon crystallized therefrom. Although not illustrated here, the active layer 103 may include a channel region, a source region, and a drain region. The active layer 103 may be formed of a-Si, p-Si, or the like.

The ohmic contact layer 104 may be positioned on the active layer 103 to reduce electrical contact resistance.

The source 105a and the drain 105b may be positioned on the active layer 103. The source 105a and drain 105b may be made of a single layer or multiple layers.

The second insulating layer 106 may be positioned on the source 105a and the drain 105b. The second insulating layer 106 may be, but is not limited to, a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), or a multilayer thereof. The second insulating layer 106 may be a protective layer.

A spacer 116 may be disposed on the second insulating layer 106 to maintain a cell gap with the second substrate 180. The spacer 116 may be disposed on the second insulating layer 106 corresponding to the gate 101, which may correspond to a non-display area in which a light source positioned below the display panel 183 is not emitted. have.

A pixel electrode 107 connected to the source 105a or the drain 105b and formed of a copper oxide system may be disposed on the second insulating layer 106.

On the other hand, the black matrix 111 may be located in the non-display area on the second substrate 180 facing the first substrate 110. The black matrix 111 is made of a photosensitive organic material to which a black pigment is added, and as the black pigment, carbon black or titanium oxide may be used.

In addition, a color filter 112 including red, green, and blue may be located between the black matrices 111 disposed on the second substrate 180. The color filter 112 may have other colors as well as red, green, and blue.

In addition, the overcoating layer 113 may be disposed on the black matrix 111 and the color filter 112. However, in some cases, the overcoat layer 113 may be omitted.

The common electrode 108 may be disposed on the overcoat layer 113 to face the pixel electrode 107 and be connected to the common voltage line. The common electrode 108 may be formed of the same copper oxide system as the pixel electrode 107.

Meanwhile, the copper oxide system constituting the pixel electrode 107 and the common electrode 108 may be formed of CuOx or CuyOx, and y may be an impurity element. Impurity elements include titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), molybdenum (Mo), tungsten (W), manganese (Mn), cobalt (Co), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), ruthenium (Ru), iridium (Ir), and germanium (Ge).

When at least one of the pixel electrode 107 and the common electrode 108 is formed of a copper oxide system, it is possible to replace indium tin oxide (ITO) or indium zinc oxide (IZO), which are conventionally used as the pixel electrode, and to reduce manufacturing costs. This enables cost innovation in terms of process. The copper oxide based electrode may be formed by a reactive sputtering method. Copper oxide electrode is a transition oxide (transition oxide) is relatively excellent in permeability and conductivity. If the copper oxide-based electrode is located on the surface of the exposed area of the pad portion disposed on the first substrate 110 may serve as a protective film.

The first substrate 110 and the second substrate 180 configured as described above may be bonded by the adhesive member 116, and the bonded first substrate 110 and the second substrate 180 may be in a TN mode operating condition. A matching liquid crystal layer 115 may be located.

Hereinafter, the modified embodiment of FIG. 7 will be described with reference to FIG. 8. However, in order to avoid duplication of description, only a part separated from FIG. 7 will be briefly described.

FIG. 8 is a schematic cross-sectional view of a TN mode display panel according to the modified embodiment of FIG. 7.

Referring to FIG. 8, at least one of the gate 101, the source 105a, and the drain 105b constituting the transistor may include copper (Cu) in the TN mode display panel 183 according to the modified embodiment of the present invention. Can be done. Here, the diffusion barrier 109 may be located under the electrode made of copper (Cu) among the gate 101, the source 105a, and the drain 105b. In the present embodiment, however, the source 105a and the drain 105b are made of copper (Cu) as an example.

The diffusion barrier 109 may be formed of any one of Mo, Mo, Ti, Ti, or Ti alloy.

However, in consideration of the convenience of the process due to the unification of the materials, the diffusion barrier 109 may be made of a copper oxide system used as the material of the pixel electrode 107 and the common electrode 108.

On the other hand, the embodiment of the present invention has been described as an example that the display device is a liquid crystal display device, the present invention is not limited to this, it is also applicable to an organic light emitting display device.

For example, when an organic light emitting diode included in a subpixel arranged in a matrix form on a display panel of an organic light emitting display device has an inverted structure formed in the form of a pixel electrode (cathode), an organic light emitting layer, and a common electrode (anode), a pixel If the electrode is replaced with a copper oxide-based electrode, an auxiliary electrode or a reflective electrode formed under the conventional pixel electrode may be omitted.

Embodiments of the present invention have the effect of providing a display device capable of providing cost innovation in a manufacturing process by providing a copper oxide electrode and replacing a conventional electrode material as well as lowering manufacturing costs. . In addition, the embodiment of the present invention has the effect of providing a convenience of the process by replacing the electrode included in the transistor with a copper oxide-based electrode.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the technical configuration of the present invention described above may be modified in other specific forms by those skilled in the art to which the present invention pertains without changing its technical spirit or essential features. It will be appreciated that it may be practiced. Therefore, the embodiments described above are to be understood as illustrative and not restrictive in all aspects. In addition, the scope of the present invention is indicated by the following claims rather than the detailed description. Also, all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

1 is an exploded perspective view of a display device;

2 is an exemplary view of an edge type light source.

3 is a schematic cross-sectional view of an IPS mode display panel according to an embodiment of the present invention.

4 is a schematic cross-sectional view of an IPS mode display panel according to a modified embodiment of FIG. 3.

5 is a schematic cross-sectional view of a VA mode display panel according to an embodiment of the present invention.

6 is a schematic cross-sectional view of a VA mode display panel according to the modified embodiment of FIG. 5.

7 is a schematic cross-sectional view of a TN mode display panel according to an embodiment of the present invention.

FIG. 8 is a schematic cross-sectional view of a TN mode display panel according to the modified embodiment of FIG. 7.

DESCRIPTION OF THE REFERENCE NUMERALS

110: first substrate 101: gate

103: active layer 104: ohmic contact layer

105a: source 105b: drain

107: pixel electrode 108: common electrode

111: black matrix 112: color filter

113: overcoat layer 115: liquid crystal layer

116: spacer 180: second substrate

Claims (8)

Display panel; And And a subpixel disposed on the display panel, the transistor including a gate, a source, and a drain, and a subpixel connected to a source or a drain of the transistor and comprising a pixel electrode formed of a copper oxide system. The method of claim 1, The sub pixel, A display device comprising a common electrode made of the copper oxide system. The method according to claim 1 or 2, The copper oxide system, The display device may be formed of CuOx or CuyOx, and y is an impurity element. The method of claim 3, The impurity element is, Titanium (Ti), Zirconium (Zr), Hafnium (Hf), Vanadium (V), Niobium (Nb), Tantalum (Ta), Moly (Mo), Tungsten (W), Manganese (Mn), Cobalt (Co), A display device comprising any one of nickel (Ni), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), ruthenium (Ru), iridium (Ir), and germanium (Ge). The method of claim 1, At least one of the gate, source and drain, A display device comprising copper (Cu). The method of claim 5, And a diffusion barrier layer disposed below the electrode made of copper (Cu) among the gate, source, and drain. The method of claim 6, The diffusion barrier, A display device comprising any one of Mo, Mo, Ti, and Ti alloys. The method of claim 1, The display panel, A display device including a liquid crystal layer driven in any one of an in-plane switching (IPS) mode, a vertical alignment (VA) mode, and a twisted nematic (TN) mode.

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