KR20070084768A - Etching method using imprint, stamp and substrate - Google Patents

Abstract

An etching method using an imprint scheme, and a stamp used for the imprint scheme are provided to implement a photonic crystalline structure for increasing a light extraction efficiency and a mesa structure for forming a n-pad region using a single process of the nano imprint process. A first and a second materials are deposited on a basic LED(light emitting diode) substrate. A photoresist is coated on the second material. An imprint process is performed using a stamp(100). The stamp has a main body(110) whose size corresponds to a wafer, an n-pad forming portion(111), a p-pad forming portion(112) and a pattern forming portion(113). The n-pad forming portion is made of an opaque material while the p-pad forming portion is formed by a punching process. The pattern forming portion has a pillar structure. In the imprint process, the photoresist is developed and then a residual layer is removed. The exposed photoresist is used as a basic mask to sequentially etch the deposited materials.

Description

Etching method using imprint and stamp and substrate used for it {ETCHING METHOD USING IMPRINT, STAMP AND SUBSTRATE}

1 is a perspective view showing the structure of a stamp used in the etching method using an imprint according to the present invention.

FIG. 2A is a top view of the stamp shown in FIG. 1. FIG.

FIG. 2B is a bottom view of the stamp shown in FIG. 1.

FIG. 2C is a front view of the stamp shown in FIG. 1.

3 is an LED based substrate used in an etching method using an imprint according to the present invention.

4 is a view showing a state imprinted with the stamp shown in FIG. 1 on top of the LED base substrate shown in FIG. 3 to perform the etching method according to the present invention.

FIG. 5 is a view illustrating a state in which a photoresist is developed in the state shown in FIG. 4.

6A to 6F illustrate a process of etching the LED substrate shown in FIG. 3 by an etching method according to an exemplary embodiment of the present invention.

7A to 7F are views illustrating a process of etching the LED substrate shown in FIG. 3 by an etching method according to another exemplary embodiment of the present invention.

* Description of the main parts of the drawings *

100 ... stamp 110 ... body

111 ... n-pad forming 112 ... p-pad forming

113 ... pattern forming part 200 ... LED substrate

210 ... base substrate 220 ... n-semiconductor layer

230 ... active layer 240 ... p-semiconductor layer

250 ... electrode layer 260 ... first material layer

270 ... second material layer 280 ... photoresist

The present invention relates to an etching method using an imprint, and a stamp and a substrate used therein.

In general, a light emitting diode (hereinafter referred to as an LED) has a multilayer structure including a n-semiconductor layer, a light emitting active layer, a p-semiconductor layer, and an electrode layer on a substrate, and a p-semiconductor and n- It has a structure in which an electrode for applying a voltage on the semiconductor layer is formed. The LED configured as described above emits light. The principle of light generation is that the potential energy is converted into light energy in the active layer through recombination of holes and electrons by the voltage applied through the p-semiconductor and the n-semiconductor layer. It will emit light. The light emitted in this way is extracted through the light transmissive electrode or the substrate electrode of the p-semiconductor layer.

At this time, the extraction efficiency of the light (Extraction Efficiency) in the LED refers to the ratio of the amount of generated photons out of the semiconductor chip. Photons generated through the recombination of holes and electrons undergo multiple reflections inside the device due to the high refractive index difference between the semiconductor and the surrounding material. It may be absorbed inside and then extinguished. In other words, light energy, which cannot be emitted to the outside due to total reflection, is converted into other energy such as potential energy or heat energy, thereby reducing the amount of light.

Therefore, the extraction efficiency is determined by the amount of photons that are lost in the multiple reflection process inside the semiconductor chip.

More specifically, the refractive index of the photons generated in the active layer inside the LED passes through the substrate layer formed of the lower n-semiconductor layer and sapphire, or the upper p-semiconductor layer and the transparent electrode layer. As a result, no problem occurs when going from the low refractive index layer to the high layer. On the contrary, when traveling from the high refractive index layer to the low layer, total reflection occurs above the critical angle.

In other words, all the layers have similar refractive indices, but a large difference in refractive index decreases at the interface between the p-type transparent metal electrode and the atmosphere, which is the surface layer, and photons are totally reflected at the interface between the p-type transparent metal electrode and the atmosphere, and then into the LED device. Will go back. For this reason, in the general LED structure without a special layer, only 5% of all emitted photons go out, and the remaining 95% is totally reflected inside, causing heat to deteriorate.

Therefore, in recent years, various methods for forming a photonic crystal structure inside the LED device have been developed in order to prevent such total reflection and increase the luminous efficiency of the LED device. Among them, in order to increase luminous efficiency, a method of increasing a luminous efficiency by stacking a specific material such as a cladding layer or a method of minimizing total reflection by modifying the structure of a layered material layer has been developed.

As such, the technology developed to improve the luminous efficiency greatly increases the size of the entire light emitting surface by minimizing the period of the hole that prevents total reflection from occurring, such as a method of controlling light characteristics and photonic crystal structure. You can divide it in such a way as to

Herein, the photonic crystal structure is formed by forming a plurality of minute holes penetrating to the electrode layer, the p-semiconductor layer, and the active layer formed on the active layer centered around the active layer, so that photons generated in the active layer do not undergo total reflection through the through hole. It can be released to the outside. The photonic crystal structure developed as described above is widely used because it can increase the light emission efficiency of light relatively easily compared to other methods.

However, since the photonic crystal structure LED has a plurality of holes to be formed in each layer stacked on the n-semiconductor layer, the lamination and etching processes must be frequently performed. In addition, due to the multiple etching process, the general photolithography process has a limitation in forming a hole having a finer period, which makes it difficult to fabricate a structure having a nanoscale period.

In recent years, electron beam lithography has been able to form cycles of 50 nm or less. Since the electron beam lithography process is implemented through a very complicated step, the efficiency is much lower than that of the conventional optical lithography process. have.

In addition, a 13 nm cycle of extreme ultra-ultraviolet lithography process is being developed, which requires expensive equipment and has not yet been solved. That is, the extreme ultraviolet lithography has not yet been mass produced due to the disadvantages of the process.

In other words, to date, in the manufacture of LED substrates having a photonic crystal structure, no technology has been developed that can form periods of 50 nm or less by using general equipment or through a simplified process.

An object of the present invention is to solve the above problems and to implement a photonic crystal structure that can increase the light extraction efficiency and a mesa structure for forming the n-pad region by a single process nanoimprint technology. The present invention provides an etching method using an imprint and a stamp and a substrate used therein.

Another object of the present invention is to reduce the manufacturing cost as well as to improve the yield of the process to be able to perform a process for forming two different structures in a single process.

Another object of the present invention is to increase the light extraction efficiency by forming a photonic crystal structure having a period of 50nm or less with the mesa structure.

Yet another object of the present invention is to reduce the manufacturing process and manufacturing time since the etching process can be continuously performed in a single chamber.

The present invention is to solve the above problems and to achieve the object according to the present invention in one embodiment having a size corresponding to the wafer; and n-pad forming portion; and p-pad forming portion; and pattern forming portion Provide a stamp containing;

Preferably, the stamp is formed of an opaque material on the main body made of a transparent material, the p-pad forming part is preferably perforated, and the pattern forming part is preferably a pillar structure.

In addition, the opaque material may be made of Cr, the transparent material may be made of quartz, and the pattern forming part and the n-pad forming part may be formed on different surfaces.

The present invention solves the above problems, and in another embodiment to achieve the object according to the present invention provides an LED substrate that allows the first material and the second material to be further laminated on the LED base substrate.

The first material and the second material are preferably made of a material that maintains the uniformity of the pattern during the etching process and does not suffer etch damage. Thus, the first material may be composed of SiO ₂ , and the second material may be composed of Cr.

The present invention is to solve the above problems, and in another embodiment to achieve the object according to the present invention further comprising the step of laminating a first material and a second material on the base LED substrate; and on the second material layer Coating a photoresist; and imprinting with a stamp according to the present invention; and sequentially etching the stacked material layers using the exposed resist as a base mask.

The imprinting step may further include removing the residual layer after developing the resist. In addition, the residual layer is preferably removed with an oxygen plasma.

In one embodiment, the etching method includes etching the first material layer using the resist layer and the second material layer as a base mask; and etching the electrode layer using the resist layer or the first material layer as a base mask; Etching the P-semiconductor layer using the electrode layer as the base mask; and etching the active layer using the resist layer or the p-semiconductor layer as the base mask; and then removing the resist layer, the second material layer, and the first material layer. It may also include;

In another embodiment, the etching method may include etching the first material layer using the resist layer and the second material layer as a base mask; and removing the resist layer; and removing the second material layer and the first material layer. Etching the electrode layer as a base mask; and removing the second material layer; and etching the P-semiconductor layer using the first material layer and the electrode layer as a base mask; and the first material layer, Etching the active layer using the electrode layer, the P-semiconductor layer as a base mask, and removing the first material layer.

In still another embodiment, the etching method includes etching the first material layer using the resist layer and the second material layer as a base mask, and simultaneously etching the resist layer used as the base mask; and the second material layer and the first material layer. Etching the electrode layer using the first material layer as a base mask and simultaneously etching a second material layer used as the base mask; and etching the P-semiconductor layer using the first material layer and the electrode layer as a base mask; and And etching the first material layer together while etching the active layer based on the first material layer, the electrode layer, and the P-semiconductor layer.

Here, the first material layer may be composed of SiO ₂ , and the second material layer may be composed of Cr.

In the etching method, each etching step may be performed in one chamber or may be performed in a plurality of chambers. In the etching gas, the SiO ₂ layer is preferably CF ₄ series gas, the Cr layer is Cl ₂ series gas, the electrode layer is Cl ₂ series gas, and the p-semiconductor layer is preferably etched with BCl ₃ series gas.

One embodiment of the etching step of the etching method as described above may be configured to further include forming a p-electrode and an n-electrode.

Hereinafter, the etching method using the imprint according to the present invention as described above, and the stamp and the substrate used therein will be described through examples so that those skilled in the art can fully understand.

1 to 2C, an imprint stamp 100 according to the present invention is shown. The stamp of one embodiment of the present invention will be described with reference to the drawings shown in FIGS. 1 to 2C.

The stamp 100 is configured to include an n-pad forming portion 111, a p-pad forming portion 112, and a pattern forming portion 113 in the main body 110. The body 110 is preferably made of a transparent material such as quartz or sapphire in order to allow the transmission of light.

The n-pad forming portion 111 is composed of a blocking layer formed on one end surface of the body 110, the blocking layer serves to block the transmission of light in the lithography process. In this way, the light is blocked to prevent the photoresist from reacting by the light, so that the material layers positioned under the photoresist layer may be sequentially etched. Therefore, the n-pad forming portion 111 is preferably composed of a blocking layer formed of an opaque material. For example, the blocking layer may be made of Cr.

In addition, the p-pad forming part 112 may be formed of a hole formed in one end surface of the main body 110, and is formed at an opposite position of the n-pad forming part 112. The hole is to prevent the photoresist from being squeezed in the imprint process so that it can be developed into a thicker resist layer. That is, in order to prevent photoresist from being reacted and removed by light during development, the material layers positioned under the reacted resist during the etching process may be etched as necessary. The p-pad forming unit 112 as described above may be formed as a hole as shown in the figure, or may be configured so that the pattern forming unit 113 described below is not formed in some region.

In addition, the pattern forming portion 113 may be formed of a protrusion having a pillar structure formed over one side surface of the main body 110, and is formed on a surface facing the n-pad forming portion 111. The protrusions having the pillar structure act to compress the photoresist in the imprint process so that the resist layer can be removed from the compressed region, so that the LED substrate can be etched in a predetermined pattern. The pattern forming portion 113 configured as described above is preferably configured to not be formed in the p-pad forming portion 112.

In the meantime, the resist of the portion pressed by the pattern forming unit 113 may not be completely removed during the imprint process, and thus a residual layer may remain. Therefore, unlike the main body 110, the protrusion of the pillar structure constituting the pattern forming unit 113 may be made of an opaque material so as not to generate such a residual layer.

In addition, according to a modified embodiment, the pattern forming unit 113 may be formed on the same surface as the n-pad forming unit 111. Similarly to the p-pad forming unit 112, if the pattern forming unit 113 is not formed in the n-pad forming unit 111, the configuration is possible on the same surface. That is, an area excluding the n-pad forming part 111 and the p-pad forming part 112 on the same surface of the main body 110 where the n-pad forming part 111 and the p-pad forming part 112 are formed. The pattern forming portion 113 may be formed in the structure. The pattern forming unit 113 may be formed by using electron beam lithography.

The stamp 100 having the above configuration can simultaneously implement a mesa structure and a photonic crystal structure through one imprint process.

Although the stamp 100 described above is illustrated based on the fabrication for the positive photoresist, the stamp 100 is not limited to the positive photoresist, and if the configuration is configured in the opposite manner to that described above, the stamp 100 is also applied to the negative photoresist. Can be.

3 shows an LED substrate used in an etching method using an imprint according to the present invention. The LED substrate of one embodiment of the present invention will be described with reference to the drawings shown in FIG. 3 as follows.

The LED substrate 200 is configured to further include a first material layer 260 and a second material layer 270 in the material layer constituting a general LED substrate. In other words, the LED substrate 200 according to the present invention is generally composed of a base substrate 210 such as sapphire, n-semiconductor layer 220, active layer 230, p-semiconductor layer 240, and electrode layer 250. The first LED layer 260 and the second material layer 270 are further included in the general LED substrate layer.

The first material layer 260 and the second material layer 270 are preferably made of a material capable of maintaining the uniformity of the pattern during the etching method according to the present invention, which will be described below. It may be made of a material having more physical properties. As an example of the first material layer 260 and the second material layer 270, the first material layer 260 may be made of SiO ₂ , and the second material layer 270 may be made of Cr. .

As described above, the LED substrate 200 according to the present invention is configured to further include the first material layer 260 and the second material layer 270 when performing the etching method according to the present invention described below. The first material layer 260 and the second material layer 270 serve as a foundation mask to selectively etch the material layer stacked below so that an intended pattern and structure can be formed.

After the resist layer 280 is coated on the LED substrate 200 as illustrated in FIG. 3, the etching method described below is performed.

4 to 5 illustrate a basic process for performing an etching method using an imprint according to the present invention. An embodiment of the etching method of the present invention will be described with reference to the drawings shown in FIGS. 4 to 5 as follows.

First, a method that is the core of the etching method of the present invention will be described. First, the first material layer 260 is deposited on a general LED substrate, and the second material layer 270 is again on the first material layer 260. Is further deposited. Next, a photoresist layer 280 is formed as a means for forming the pattern and mesa structure, and from the top of the photoresist layer 280 to the stamp 100 according to the present invention as shown in FIG. Perform an imprint.

At this time, the resist layer 180 is pressed by the pattern forming unit 113 formed on the stamp 100 to have a predetermined pattern. In this state, when the resist layer 280 is exposed to UV or the like, the resist layer 280 is developed to have a structure as shown in FIG. 5.

Referring to FIG. 5, the structure of the developed resist layer 280 will be briefly described. The resist layer 280 is formed by the p-pad forming portion 112 by the p-pad forming portion 112 of the stamp 100. 281 is formed, and the pattern forming portion 282 is formed to form the groove 290 of the pillar structure by the pattern forming portion 113 of the stamp 100, and n- of the stamp 100 The n-pad forming unit 283 is formed by the pad forming unit 111.

The photonic crystal structure and the mesa structure are selectively formed by etching a material layer stacked below using the resist layer 280 developed as described above as a base mask.

After the resist layer 280 is developed in the imprinting step, the residual layer 284 may remain in the portion pressed by the pattern forming unit 113 of the stamp 100. Therefore, when the residual layer 284 remains as described above, it is preferable to remove with oxygen plasma.

6A to 6F illustrate an embodiment of an etching process performed by an etching method using an imprint according to the present invention. 6A to 6F, the etching process of an embodiment will be described with reference to the drawings illustrated in FIGS. 6A to 6F.

First, the second material layer 270 formed below is etched using the resist layer 280 as a base mask. In the second material layer 270 etched as described above, the p-pad forming portion 271 is formed by the p-pad forming portion 281 of the resist layer 280, similarly to the resist layer 280. The pattern forming unit 272 is formed to form the groove 290 of the pillar structure by the pattern forming unit 282 of the resist layer 280, and the n-pad forming unit 283 of the resist layer 280 is formed. N-pad forming portion 273 is formed.

Here, the second material layer 270 may be made of a Cr material. When the second material layer 270 is made of Cr, etching is performed using a Cl ₂ based gas.

Thereafter, the first material layer 260 formed below is etched using the resist layer 280 and the second material layer 270 as a base mask. The first material layer 260 etched as described above is formed by the p-pad forming portion 271 of the second material layer 270, similarly to the second material layer 270. The pattern forming portion 262 is formed to form the groove 290 of the pillar structure by the pattern forming portion 272 of the second material layer 270, and the second material layer 270 is formed. The n-pad forming portion 263 is formed by the n-pad forming portion 273.

The first material layer 260 may be composed of SiO ₂ material, if composed of SiO ₂ material, it is preferable that etching with CF ₄ based gas.

After the first material layer 260 is etched, the electrode layer 250 formed below is etched using the resist layer 280, the second material layer 270, and the first material layer 260 as a base mask. do. Like the etching process described above, the electrode layer 250 is also formed with a pattern forming portion 252 and an n-pad forming portion 253 to form the p-pad forming portion 251 and the pillar-shaped groove 290. do. The electrode layer 250 is preferably etched with Cl ₂ series gas.

After the electrode layer 250 is etched, the p-semiconductor layer formed under the resist layer 280, the second material layer 270, the first material layer 260, and the electrode layer 250 as a base mask. Etch 240. Like the etching process described above, the p-semiconductor layer 240 also has a pattern forming portion 242 and an n-pad forming portion 243 for forming the p-pad forming portion 241 and the groove 290 of the pillar structure. ) Is formed. The p-semiconductor layer 240 is preferably etched with a BCl ₃ series gas.

After the p-semiconductor layer 240 is etched, the resist layer 280, the second material layer 270, the first material layer 260, the electrode layer 250, and the p-semiconductor layer 240 are formed. The active layer 230 formed below is etched using the as a base mask. Like the etching process described above, the active layer 230 is also formed with a pattern forming unit 232 and an n-pad forming unit 233 to form the p-pad forming unit 231 and the groove 290 of the pillar structure. do.

After the etching process is performed, the resist layer 280, the second material layer 270, and the first material layer 260 are sequentially removed. When the first material layer 260 is removed, the p-electrode 310 is formed on the p-pad forming unit 251 as shown in FIG. 6F, and the n-pad forming unit 243 is formed. The n-electrode 320 is formed on the upper portion of the LED device.

The p-electrode 310 may be formed of any one of Pd, Pt, Pd / Au, Pt / Au, Ni / Au, NiO / Au, or an alloy of two or more thereof, and the n-electrode 320 may be Ni, Al / Ni / Au, Al / Ti / Au, or Al / Pt / Au, or an alloy of two or more thereof.

Such an etching process may be performed by exchanging reactant gases in one chamber, or each etching process may be performed in another chamber.

Through such an etching process, a process for forming a photo crystal structure and a process for forming a mesa structure are realized through a single process.

7A to 7F illustrate a process performed by another embodiment of an etching method using an imprint according to the present invention. Hereinafter, another embodiment of the present invention will be described with reference to the drawings shown in FIGS. 7A to 7F.

As shown in FIG. 5, the second material layer 270 is etched using the resist layer 280 developed by imprinting the stamp 100 as a base mask. As shown in FIG. 7A, the etched second material layer 270 is formed by the p-pad forming portion 271 of the resist layer 280, and the resist layer is formed. The pattern forming portion 272 is formed to form the groove 290 of the pillar structure by the pattern forming portion 282 of 280, and is formed in the n-pad forming portion 283 of the resist layer 280. An n-pad forming portion 273 is formed by this.

Here, the second material layer 270 may be made of a Cr material. When the second material layer 270 is made of Cr, etching is performed using a Cl ₂ based gas.

After the second material layer 270 is etched, the first material layer 260 is etched again based on the resist layer 280 and the second material layer. After the first material layer 260 is etched as described above, the resist layer 280 stacked on the second material layer 270 is removed. The first material layer 260 may be composed of SiO ₂ material, if composed of SiO ₂ material, it is preferable that etching with CF ₄ based gas.

As illustrated in FIG. 7B, the etched first material layer 260 has a p-pad forming portion 261 formed therein, and a pattern forming portion 262 forming a groove 290 having a pillar structure formed therein. In addition, an n-pad forming portion 263 is formed.

After that, the electrode layer 250 is etched using the second material layer 270 and the first material layer 260 as a base mask, and after the electrode layer 250 is etched, the second material layer 270 is etched. ) Will be removed. Preferably, the electrode layer 250 is etched with a Cl ₂ -based gas. When the second material layer 270 is made of a Cr material, the electrode layer 250 is etched with a Cl ₂ -based gas.

Like the etching process of the other material layer described above through the etching process, the electrode layer 250 also has a pattern for forming the p-pad forming portion 251 and the pillar structure groove 290 as shown in FIG. 7C. The forming unit 252 and the n-pad forming unit 253 are formed.

After etching the electrode layer 250, the P-semiconductor layer 240 is etched using the first material layer 260 and the electrode layer 250 as a base mask. The p-semiconductor layer 240 is preferably etched with a BCl ₃ series gas. Like the etching process described above, the p-semiconductor layer 240 also has a pattern forming portion 242 and an n-pad forming portion 243 for forming the p-pad forming portion 241 and the groove 290 of the pillar structure. ) Is formed.

After etching the P-semiconductor layer 240, the active layer 230 is etched based on the first material layer 260, the electrode layer 250, and the p-semiconductor layer 240, and the active layer After 230 is etched, the first material layer 260 is removed again.

Through the etching process, the active layer 230 may include a pattern forming unit 232 and an n-pad forming unit for forming a p-pad forming unit 231 and a pillar-shaped groove 290 as shown in FIG. 7E. 233 is formed. The first material layer 260 is etched with CF ₄ series gas.

As shown in FIG. 7F, the LED device having the photo crystal structure and the mesa structure through the etching process forms a p-electrode 310 on the p-pad forming part 251 and n-pad. The n-electrode 320 is formed on the formation portion 243 to complete the LED device.

The p-electrode 310 may be formed of any one of Pd, Pt, Pd / Au, Pt / Au, Ni / Au, NiO / Au, or an alloy of two or more thereof, and the n-electrode 320 may be Ni, Al / Ni / Au, Al / Ti / Au, or Al / Pt / Au, or an alloy of two or more thereof.

Such an etching process may be performed by exchanging reactant gases in one chamber, or each etching process may be performed in another chamber.

Through such an etching process, a process for forming a photo crystal structure and a process for forming a mesa structure are realized through a single process.

Another embodiment of an etching method using an imprint according to the present invention will be described with reference to FIGS. 7A to 7F. First, in this embodiment, the process is performed in a similar manner to the embodiment for the second etching method, but in such a manner that the reaction gas is simultaneously introduced into the same chamber to etch the material layer and the etched layer simultaneously. May be

As shown in FIG. 5, the second material layer 270 is etched using the resist layer 280 developed by imprinting the stamp 100 as a base mask. As shown in FIG. 7A, the etched second material layer 270 is formed by the p-pad forming portion 271 of the resist layer 280, and the resist layer is formed. The pattern forming portion 272 is formed to form the groove 290 of the pillar structure by the pattern forming portion 282 of 280, and is formed in the n-pad forming portion 283 of the resist layer 280. An n-pad forming portion 273 is formed by this.

Subsequently, the first material layer 260 is etched using the resist layer 280 and the second material layer 270 as a base mask while simultaneously etching the resist layer used as the base mask. The etching process may be performed in the same chamber, and the etching process may be performed by simultaneously adding a reaction gas for etching the first material layer 260 and a reaction gas for removing the resist layer 280.

Through this process, a p-pad forming part 261 is formed in the first material layer 260, and a pattern forming part 262 is formed to form the groove 290 of the pillar structure, and also n-pad is formed. The formation part 263 is formed.

After the etching process, the electrode layer 250 is etched again using the second material layer 270 and the first material layer 260 as a base mask, and at the same time, the second material layer 270 used as the base mask is etched together. . The etching process may also be performed in the same chamber, and the etching process may be performed by simultaneously supplying a reaction gas for etching the electrode layer 250 and a reaction gas for removing the second material layer 270.

Through this process, the p-pad forming part 251 is formed in the electrode layer 250, and the pattern forming part 252 is formed to form the groove 290 of the pillar structure, and the n-pad forming part is also formed. 253 is formed.

After the electrode layer 250 is etched, the p-semiconductor layer 240 is etched again using the first material layer 260 and the electrode layer 250 as a base mask. In this case, the first material layer 260 may not be removed in order to prevent damage to the electrode layer 250 in the subsequent etching process.

Through the above process, p-pad forming portion 241 is formed on the p-semiconductor layer 240 and a pattern forming portion 242 is formed so that the groove 290 of the pillar structure is formed. In addition, an n-pad forming portion 243 is formed.

After the p-semiconductor layer 240 is etched, the active layer 230 is etched using the first material layer 260, the electrode layer 250, and the p-semiconductor layer 240 as a base mask, and at the same time, the first layer is etched. The material layer 260 is removed.

The etching process may also be performed in the same chamber. The etching process may be performed by simultaneously supplying a reaction gas for etching the active layer 230 and a reaction gas for removing the first material layer 260.

Through the etching process, the active layer 230 may include a pattern forming unit 232 and an n-pad forming unit for forming a p-pad forming unit 231 and a pillar-shaped groove 290 as shown in FIG. 7E. 233 is formed.

Here, the first material layer may be composed of SiO ₂ , and the second material layer may be composed of Cr. In the etching process, the SiO ₂ layer is CF ₄ series gas, the Cr layer is Cl ₂ series gas, the electrode layer is Cl ₂ series gas, and the p-semiconductor layer is BCl ₃ series gas. desirable.

In the LED device having the photo crystal structure and the mesa structure through the etching process, as shown in FIG. 7F, the p-electrode 310 is formed on the p-pad forming part 251 and the n-pad forming part is formed. The n-electrode 320 is formed on the upper portion 243 to complete the LED device.

The p-electrode 310 may be formed of any one of Pd, Pt, Pd / Au, Pt / Au, Ni / Au, NiO / Au, or an alloy of two or more thereof, and the n-electrode 320 may be Ni, Al / Ni / Au, Al / Ti / Au, or Al / Pt / Au, or an alloy of two or more thereof.

Such an etching process may be performed by exchanging reactant gases in one chamber, or each etching process may be performed in another chamber.

Through such an etching process, a process for forming a photo crystal structure and a process for forming a mesa structure are realized through a single process.

Although the present invention has been described through each embodiment as described above, the present invention is not limited to the above embodiment, it will be apparent to those skilled in the art that various modifications can be made within the scope of the present invention.

According to the present invention, a photonic crystal structure capable of increasing light extraction efficiency and a mesa structure for forming an n-pad region may be realized by a single process nanoimprint technology.

According to the present invention, a process for forming two different structures, such as a photonic crystal structure and a mesa structure, can be performed in a single process, thereby reducing the manufacturing cost and improving the yield of the process, and improving the manufacturing process and manufacturing time. It can be shortened.

In addition, according to the present invention, it is possible to form a photonic crystal structure having a cycle of 50 nm or less with the mesa structure through the conventional optical lithography process to increase the light extraction efficiency.

Claims (31)

A main body having a size corresponding to the wafer; and n-pad forming portion; and p-pad forming portion; and A stamp comprising a pattern forming portion. The stamp of claim 1, wherein the n-pad forming portion is made of an opaque material. The stamp of claim 1, wherein the p-pad forming portion is perforated. The stamp of claim 1, wherein the pattern forming portion has a pillar structure. The stamp of claim 1, wherein the body is made of a transparent material. The stamp of claim 2, wherein the opaque material is Cr. 6. The stamp of claim 5, wherein the transparent material is quartz. The stamp of claim 1, wherein the pattern forming portion is made of an opaque material. The stamp of claim 1, wherein the pattern forming portion and the n-pad forming portion are formed on different surfaces. The stamp of claim 1, wherein the pattern forming portion and the n-pad forming portion are formed on the same surface. In the LED substrate, The LED substrate, characterized in that the first material and the second material is further laminated on the electrode layer. The substrate of claim 11, wherein the first material is a material that maintains the uniformity of the pattern during the etching process and does not suffer etch damage. The substrate of claim 11, wherein the second material is a material that maintains the uniformity of the pattern during the etching process and does not suffer etch damage. The substrate of claim 11, wherein the first material is SiO ₂ . 12. The substrate of claim 11, wherein the second material is Cr. Further stacking a first material and a second material on the base LED substrate; and Coating a photoresist on the second material; and Imprinting with a stamp as claimed in claim 1; and And sequentially etching the stacked material layers by using the exposed resist as a base mask. 17. The method of claim 16, wherein the imprinting step further comprises removing the residual layer after developing the resist. 18. The method of claim 17, wherein the residual layer is removed with oxygen plasma. The method of claim 16, The etching may include etching the first material layer using the resist layer and the second material layer as a base mask; and Etching the electrode layer based on the resist layer to the first material layer; and Etching the P-semiconductor layer using the resist layer or the electrode layer as a base mask; and Etching the active layer based on the resist layer to the p-semiconductor layer; and And sequentially removing the resist layer, the second material layer, and the first material layer. 17. The method of claim 16, wherein the etching comprises: etching the first material layer using the resist layer and the second material layer as a base mask; and Removing the resist layer; and Etching the electrode layer based on the second material layer and the first material layer; and Removing the second material layer; and Etching the P-semiconductor layer based on the first material layer and the electrode layer; and Etching the active layer based on the first material layer, the electrode layer, and the P-semiconductor layer; and And removing the first material layer. 17. The method of claim 16, wherein the etching step comprises: etching the first material layer using the resist layer and the second material layer as a base mask while simultaneously etching the resist layer used as the base mask; and Etching the electrode layer using the second material layer and the first material layer as a base mask and simultaneously etching the second material layer used as the base mask; and Etching the P-semiconductor layer based on the first material layer and the electrode layer; and Etching the first material layer together while etching the active layer using the first material layer, the electrode layer, and the P-semiconductor layer as a base mask. 19 according to according to any one of claim 21, wherein the first material layer is an etching method using the imprint, characterized in that SiO _2. 22. The method according to any one of claims 19 to 21, wherein the second material layer is Cr. 22. The method according to any one of claims 19 to 21, wherein each etching step is performed in one chamber. 22. The method according to any one of claims 19 to 21, wherein the etching step is performed in a plurality of chambers. 23. The method of claim 22, wherein the SiO ₂ layer is etched with CF ₄ series gas. 24. The method of claim 23, wherein the Cr layer is etched with Cl ₂ -based gas. 22. The method according to any one of claims 19 to 21, wherein the electrode layer is etched with Cl ₂ series gas. 22. The method according to any one of claims 19 to 21, wherein the p-semiconductor layer is etched with BCl ₃ series gas. 21. The imprint of claim 19 or 20, further comprising forming a p-electrode and an n-electrode after sequentially removing the resist layer, the second material layer, and the first material layer. Etching method used. 22. The method of claim 21, further comprising forming a p-electrode and an n-electrode after etching the first material layer.

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