KR20070077350A - Liquid crystal display device - Google Patents

Abstract

An LCD is provided to prevent an image quality deterioration such as a greenish image caused by distortion of a common voltage by dividing a liquid crystal panel into three regions and differently set capacities of a liquid crystal capacitor and a storage capacitor included in pixels of the three regions. A liquid crystal panel(100) includes a plurality of pixels arranged in a matrix form in a pixel region defined by a plurality of data lines and a plurality of gate lines and displays an image in response to a driving signal. A timing controller(200) receives an image data signal from the outside to output a control signal and a data signal corresponding to the image data signal. A driving unit outputs the driving signal for driving the liquid crystal panel in response to the control signal and the data signal. The plurality of pixels includes a first pixel group and a second pixel group. The first pixel group includes a first liquid crystal capacitor and a first storage capacitor. The second pixel group includes a second liquid crystal capacitor that has a different capacity from that of the first liquid crystal capacitor and a second storage capacitor that has a different capacity from that of the first storage capacitor.

Description

Liquid crystal display device

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2A and 2B are waveform diagrams showing voltages applied to the liquid crystal panel shown in FIG. 1.

3A and 3B are equivalent circuit diagrams for respective pixels in the first and third liquid crystal panel regions and the second liquid crystal panel region of the liquid crystal panel shown in FIG.

4 is a plan view illustrating a lower substrate of the first pixel illustrated in FIG. 3A.

Explanation of symbols on the main parts of the drawings

10: liquid crystal display device 100: liquid crystal panel

110: first pixel 111: upper substrate

112: lower substrate 113: liquid crystal layer

114: common electrode 115: color filter

116: pixel electrode 117: gate electrode

118: source electrode 119: drain electrode

120: second pixel 200: timing controller

300: data driver 400: gate driver

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly to a liquid crystal display device (LCD).

In addition to the display device using a cathode ray tube, one of the important fields of an image display device is a liquid crystal display device. The liquid crystal display device is a display device in which a liquid crystal is injected between two substrates (glass substrates) bonded to each other with a predetermined space. The liquid crystal display device can control the amount of light transmitted to the substrate by applying an electric field to the liquid crystal and adjusting the intensity of the electric field. In this control manner, a desired image signal is displayed.

When a specific pattern such as a vertical stripe pattern or a dot pattern is input to the liquid crystal display, the common voltage is distorted, so that the green pixel becomes brighter than the red and blue sub pixels. As a result, a greenish phenomenon occurs in which all or part of the screen of the liquid crystal panel is green, and the image quality of the liquid crystal display is deteriorated.

An object of the present invention is to provide a liquid crystal display device having an improved display quality of an image.

The liquid crystal display according to the present invention includes a liquid crystal panel, a timing controller, and a driver. The liquid crystal panel includes a plurality of pixels arranged in a matrix form in a pixel area defined by a plurality of data lines and a plurality of gate lines, and displays an image in response to a driving signal. The timing controller receives an image data signal from an external source and outputs a control signal and a data signal corresponding to the image data signal, and a driving unit outputs the driving signal for driving the liquid crystal panel in response to the control signal and the data signal. do. The plurality of pixels of the liquid crystal panel includes a first pixel group and a second pixel group. The first pixel group includes a first liquid crystal capacitor and a first storage capacitor, and the second pixel group has a capacitance different from that of the second liquid crystal capacitor and the first storage capacitor having a capacitance different from that of the first liquid crystal capacitor. And a second storage capacitor having a.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the liquid crystal display 10 may include a liquid crystal panel 100 displaying an image, a timing controller 200 outputting a control signal, and a data driver 300 driving a data line of the liquid crystal panel 100. And a gate driver 400 driving the gate line of the liquid crystal panel 100.

The liquid crystal panel 100 is orthogonal to the plurality of data lines Da1 to Dcn and the data lines Da1 to Dcn arranged at regular intervals in the horizontal direction of the liquid crystal panel 100, and perpendicular to the liquid crystal panel 100. A plurality of pixels surrounded by a plurality of gate lines G1 to Gm arranged at regular intervals, and surrounded by data lines Da1 to Dcn and gate lines G1 to Gm, and arranged in a matrix form. (PX1 or PX2). The data lines Da1 to Dcn are arranged parallel to each other in the vertical direction of the liquid crystal panel 100, and the gate lines G1 to Gm are arranged parallel to each other in the horizontal direction of the liquid crystal panel 100.

The liquid crystal panel 100 divides the horizontal length of the liquid crystal panel 100 into three and divides the first liquid crystal panel region A, the second liquid crystal panel region B, and the third liquid crystal panel region C. FIG. For example, assuming that the liquid crystal panel 100 can display the SXGA resolution (1280 X 1024), the liquid crystal panel 100 includes 3840 (1280 X 3 (RGB)) data lines and 1024 gate lines. do. In this case, the first liquid crystal panel region A includes first data lines Da1 to 1280 data lines Da1280, and the second liquid crystal panel region B includes 1281 data lines Db1 to 2560 data. A line Db1280 is included, and the third liquid crystal panel region C includes second to second data lines Dc1 to 3840 data lines Dc1280.

The first liquid crystal panel region A and the third liquid crystal panel region C of the liquid crystal panel 100 have the same first pixel PX1, and are the first of the first and third liquid crystal panel regions A and C. The pixel PX1 and the second pixel PX2 of the second liquid crystal panel region B have different structures. That is, the capacitances of the liquid crystal capacitor and the storage capacitor included in the first pixel PX1 and the second pixel PX2 are different.

The timing controller 200 receives the image data signals Ri, Gi and Bi and the input control signals Hsync, Vsync, DE, and MCLK from an external graphic source to receive the first and second output control signals CNT1 and CNT2. And a data signal DATA corresponding to the image data signals Ri, Gi, and Bi. The input control signal input to the timing controller 200 from the outside includes a horizontal sync signal Hsync, a vertical sync signal Vsync, a data enable signal DE, and a clock signal MCLK corresponding to the input image. .

The first output control signal CNT1 output from the timing controller 200, for example, the horizontal synchronization start signal STH, the load signal LOAD, the clock signal HCLK, and the like are applied to the data driver 300. In addition, the second output control signal CNT2 output from the timing controller 200, for example, the vertical synchronization start signal STV, the gate clock signal CPV, the output enable signal OE, and the like, may be transferred to the gate driver 400. Is approved.

The data driver 300 includes a plurality of data driver ICs. The data driver 300 may transmit data lines through the data lines Da1 to Dcn of the liquid crystal panel 100 in response to the data signal DATA and the first output control signal CNT1 input from the timing controller 200. Output the drive signal. The data line driving signal becomes a liquid crystal applied voltage applied to the liquid crystal panel 100.

The gate driver 400 includes a plurality of gate driver ICs. The gate driver 400 outputs the gate line driving signal through the gate lines G1 to Gm of the liquid crystal panel 100 in response to the second output control signal CNT2 input from the timing controller 200. The gate line driving signal is sequentially applied to the gate lines G1 to Gm of the liquid crystal panel 100 to make the data of the pixels of the gate lines G1 to Gm to which the gate line driving signal is applied.

2A and 2B are waveform diagrams showing voltages applied to the liquid crystal panel shown in FIG. 1.

Referring to FIG. 2A, the liquid crystal applied voltage VD supplied to each pixel has a positive polarity and a negative polarity with respect to the reference common voltage VCOM_R. Since each pixel operates in the normally white mode, the voltage applied to the pixels R1, G1, and B1 of the white gradation level is smaller than the voltage applied to the pixels R2, G2, and B2 of the black gradation level. The voltage applied to the pixels R2, G2, and B2 displaying the black gradation level has a negative liquid crystal applied voltage R2 and B2 greater than the positive liquid crystal applied voltage G2 around the reference common voltage VCOM_R. Has a value. Accordingly, the reference common voltage VCOM_R is represented as the distorted common voltage VCOM_D by being rippled toward the negative liquid crystal application voltage. The distorted common voltage VCOM_D is applied to the liquid crystal panel 100 to generate a greenish phenomenon in which the entire screen is close to green.

Referring to FIG. 2B, the voltage VCST across the storage capacitor formed on the lower substrate of the pixel may have a different value depending on the position of the liquid crystal panel 100. The common voltage VCOM is applied to the storage capacitor of the liquid crystal panel 100 at one left and one right points of the liquid crystal panel 100, respectively. For example, at one point of the first liquid crystal panel region A and at one point of the third liquid crystal panel region C, the common voltage VCOM is applied to the storage capacitor.

In the first and third liquid crystal panel regions A and C, which are starting points at which the common voltage VCOM is applied, the voltages VCSTa and VCSTc across the storage capacitors have almost constant voltage levels. On the other hand, the common voltage VCOM applied to the second liquid crystal panel region B has a large variation in the voltage across the storage capacitor VCSTb due to the load on the common voltage applying line. As a result, a problem that the image displayed on the liquid crystal panel 100 is not uniform over the entire screen occurs.

The liquid crystal panel 100 is divided into three regions A, B, and C, and the pixel structures of the three regions A, B, and C are different, thereby deteriorating image quality due to the common voltage distortion shown in FIGS. 2A and 2B. Will be able to prevent. For example, the first and third liquid crystal panel regions A and C include a first liquid crystal capacitor and a first storage capacitor having the same capacitance, and the second liquid crystal panel region B includes the first liquid crystal capacitor and the first liquid crystal capacitor. A first storage capacitor and a second liquid crystal capacitor and a second storage capacitor having different capacities are provided.

Specifically, since the fluctuation range of the voltage across the storage capacitor VCSTb due to the distortion of the common voltage VCOM is large in the second liquid crystal panel region B, the capacitance of the second storage capacitor in the second liquid crystal panel region B is increased. Less than the capacity of the first storage capacitor of the first and third liquid crystal panel regions (A, C). In this case, in order to have the same image quality regardless of the position of the liquid crystal panel 100, the sum of capacitances of the first liquid crystal capacitor and the first storage capacitor and the sum of capacitances of the second liquid crystal capacitor and the second storage capacitor should be the same.

3A and 3B are equivalent circuit diagrams for respective pixels in the first and third liquid crystal panel regions and the second liquid crystal panel region of the liquid crystal panel shown in FIG.

Referring to FIG. 3A, the first pixel PX1 included in the first and third liquid crystal panel regions A and C of the liquid crystal panel 100 may have an upper substrate 111 and a lower substrate 112 facing each other. And a liquid crystal layer 113 interposed between the upper substrate 111 and the lower substrate 112.

The common electrode 114 to which the common voltage VCOM is applied is formed on the front surface of the upper substrate 111 of the first pixel PX1. The color filter 115 is provided in a portion of the upper substrate 111 corresponding to the pixel electrode 116 of the lower substrate 112. One of red, green, and blue color filters is formed on the upper substrate 111 so that the liquid crystal panel 100 may implement color display. The position of the color filter 115 is not limited to the upper substrate 111 but may be formed above or below the pixel electrode 116 of the lower substrate 112.

The thin film transistor T, the pixel electrode 116, and the storage capacitor CSTa are formed on the lower substrate 112 of the first pixel PX1. The gate of the thin film transistor T is connected to the gate line G1, the source is connected to the data line Da1, and the drain is connected to the pixel electrode 116.

The storage capacitor CSTa is formed by overlapping a separate signal line (not shown) and the pixel electrode 116 provided on the lower substrate 112, and a common voltage VCOM is applied to the separate signal line. In addition, the storage capacitor CSTa may be formed such that the pixel electrode 116 overlaps the front gate line directly above the insulator.

The liquid crystal capacitor CLCa is connected by using the pixel electrode 116 of the lower substrate 112 and the common electrode 114 of the upper substrate 111 as two terminals.

The liquid crystal layer 113 has negative dielectric anisotropy, and the liquid crystal molecules of the liquid crystal layer 113 have their long axes perpendicular to the surfaces of the upper and lower substrates 111 and 112 in the absence of an electric field.

Referring to FIG. 3B, the second pixel PX2 included in the second liquid crystal panel region B of the liquid crystal panel 100 is configured in the same manner as the first pixel PX1. The difference between the first pixel PX1 and the second pixel PX2 is that the capacitances of the liquid crystal capacitors CLCa and CLCb are different from those of the storage capacitors CSTa and CSTb. For example, the capacitance of the liquid crystal capacitor CLCa of the first pixel PX1 has a smaller value than the capacitance of the liquid crystal capacitor CLCb of the second pixel PX2 (CLCa <CLCb) and the first pixel PX1. The storage capacitor CSTa has a larger value than that of the storage capacitor CSTb of the second pixel PX2 (CSTa> CSTb). In this case, in order to have the same image quality regardless of the position of the liquid crystal panel 100, the sum of capacitances of the liquid crystal capacitor CLCa and the storage capacitor CSTa of the first pixel PX1 is equal to the liquid crystal capacitor of the second pixel PX2. It must be equal to the sum of the capacities of CLCb and storage capacitor CSTb.

4 is a plan view illustrating a lower substrate of the first pixel illustrated in FIG. 3A.

Referring to FIG. 4, the lower substrate 112 of the pixel includes the pixel electrode 116 and the thin film transistor T surrounded by the data line Da1 and the gate line G1. The source electrode 118 of the thin film transistor T is connected to the data line Da1, the gate electrode 117 is connected to the gate line G1, and the drain electrode 119 is connected to the pixel electrode 116. .

In general, the capacitance of the capacitor can be expressed as Equation 1 below.

Since the capacitances of the liquid crystal capacitors CLCa and CLCb of the first and second pixels PX1 and PX2 are proportional to the area of the pixel electrode 116, the horizontal length w of the pixel electrode 116 is adjusted to adjust the first and second pixels. The capacitances of the liquid crystal capacitors CLCa and CLCb of the second pixels PX1 and PX2 may be varied. Similarly, the capacitances of the storage capacitors CSTa and CSTb of the first and second pixels PX1 and PX2 may be varied by adjusting the area of electrodes forming the storage capacitors CSTa and CSTb.

As described above, the optimum embodiment has been disclosed in the drawings and the specification. Although specific terms have been used herein, they are used only for the purpose of describing the present invention and are not intended to limit the scope of the present invention as defined in the claims or the claims. Therefore, those skilled in the art will understand that various modifications and equivalent other embodiments are possible from this. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

According to the present invention as described above, the liquid crystal panel is divided into three regions, and the capacitances of the liquid crystal capacitor and the storage capacitor included in each pixel of the three regions are changed so that image degradation such as greenish phenomenon due to distortion of the common voltage is achieved. It can be improved.

Claims (7)

A liquid crystal panel including a plurality of pixels arranged in a matrix form in a pixel area defined by a plurality of data lines and a plurality of gate lines, and displaying an image in response to a driving signal; A timing controller configured to receive an image data signal from an external source and output a control signal and a data signal corresponding to the image data signal; And A driving unit configured to output the driving signal for driving the liquid crystal panel in response to the control signal and the data signal; The plurality of pixels, A first pixel group having a first liquid crystal capacitor and a first storage capacitor; And And a second pixel group including a second liquid crystal capacitor having a capacitance different from that of the first liquid crystal capacitor, and a second storage capacitor having a capacitance different from the capacitance of the first storage capacitor. . The method of claim 2, The capacity of the first liquid crystal capacitor is less than the capacity of the second liquid crystal capacitor, The capacitance of the first storage capacitor is greater than the capacitance of the second storage capacitor. The method of claim 2, The sum of the capacitance of the first liquid crystal capacitor of the first pixel group and the capacitance of the first storage capacitor is equal to the sum of the capacitance of the second liquid crystal capacitor of the second pixel group and the capacitance of the second storage capacitor. The liquid crystal display device which is the same. The method of claim 3, wherein The liquid crystal panel, A first liquid crystal panel region formed of the first pixel group; And And a second liquid crystal panel region formed of the second pixel group. The method of claim 4, wherein The second liquid crystal panel region is located at the center of the liquid crystal panel, Wherein the first liquid crystal panel region is positioned at both ends of the liquid crystal panel in a direction perpendicular to a direction in which the data lines extend so as to be adjacent to both sides of the second liquid crystal panel region positioned in the central portion, respectively. . The method of claim 1, Each of the plurality of pixels, Pixel electrodes; And And a thin film transistor having a source connected to the data line, a gate connected to the gate line, and a drain connected to the pixel electrode. The method of claim 6, The capacitance of the first and second liquid crystal coffee sheets is determined by the area of the pixel electrode.

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