KR20070076810A - Transister for sense amplifier of semiconductor device - Google Patents

Abstract

A transistor for a sense amplifier of a semiconductor device is provided to prevent the thickness change of a gate CD(Critical Dimension) and an insulating spacer by forming a dummy gate at an isolation layer between transistor forming regions. An isolation layer(310) is formed on a semiconductor substrate(300) so that two transistor forming regions connected to each other on a sense amp forming region are separated from another two transistor forming regions connected to each other in a longitudinal direction. L-type gates(320) are symmetrically formed on each of the two transistor formation regions. A dummy gate(320') is formed on the isolation layer between the transistor forming regions to have uniform pattern density on the sense amp forming region. A source region(340a) and a drain region(340b) are formed on a surface of the transistor forming regions at both sides of the L-type gate.

Description

Sense amplifier transistor of semiconductor device {TRANSISTER FOR SENSE AMPLIFIER OF SEMICONDUCTOR DEVICE}

1 is a layout for explaining the structure of a conventional sense amplifier transistor.

2 is a cross-sectional view taken along the line a-a 'of FIG.

3A and 3B are layout views illustrating the structure of a sense amplifier transistor according to an embodiment of the present invention.

4 is a cross-sectional view taken along line b-b 'of FIG. 3b.

Explanation of symbols on the main parts of the drawings

300: semiconductor substrate 310: device isolation film

320: gate 320a: gate insulating film

320b: gate conductive film 320c: gate hard mask film

330: insulating spacer 340a: source region

340b: drain region

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to transistors for sense amplifiers in semiconductor devices, and more particularly, to transistors for sense amplifiers in semiconductor devices that can improve the problem of nonuniformity in device characteristics caused by differences in density of gate patterns.

Among the semiconductor devices, a DRAM is divided into a cell region and a peripheral circuit region and a core region between the cell region and the peripheral circuit region. Here, the cell area is a place for storing data, and the peripheral circuit area is a place for converting an external voltage into an internal voltage or mediating signal transmission between the inside and the outside of a semiconductor chip including a cell. to be. On the other hand, the core area is a place for selectively controlling the word line (bit line) and bit line (link line) connected to the cell in order to write data to the cell or to read the data stored in the cell.

In general, the smallest width of the DRAM is formed in the cell region, and the peripheral circuit region has a larger pattern width and a larger margin than the cell region. By the way, in the core region, an amplification element called a sense amplifier is formed. The sense amplifier is composed of a very complicated circuit, so that the design rule is as fine as the design rule of the cell region. It may be required.

Hereinafter, a conventional sense amplifier transistor structure will be described with reference to FIG. 1.

1 is a layout diagram showing a conventional sense amplifier transistor structure.

In the conventional sense amplifier transistor, as shown in FIG. 1, an L-shaped gate 120 is formed on a semiconductor substrate 100 on which an isolation layer 110 defining an active region A is formed. (120) The junction region 140 including the source region 140a and the drain region 140b is formed in the active region A at both sides.

Here, the device isolation layer 110 is formed such that two transistor formation regions in contact with each other are spaced apart from two other transistor formation regions in contact with each other in a longitudinal direction (X-axis direction), and the L-shaped gate 120 is formed of a transistor. Each of the regions is formed to be symmetrical with each other. Meanwhile, reference numeral 130, which is not described, indicates an insulating spacer formed on the sidewall of the gate 120.

Referring to FIG. 1, the L-shaped gate 120 makes the gate 120 protrude slightly from the active region A in the X-axis direction, that is, the gate 120 slightly protrudes from the active region A. This is to separate the 140a) and the drain region 140b. Meanwhile, the L-shaped gate 120 leaves the active region A in the Y-axis direction, but makes the width of the portion deviated in the Y-axis direction larger than the width in the remaining portion. This is to form a contact in contact with the gate 120.

However, in the transistor structure of the conventional sense amplifier described above, the density of the gate 120 is not uniform in the X-axis direction, so that the CD (critical dimension) and the thickness of the insulating spacer 130 of the gate 120 vary depending on the region. There is a problem that changes. FIG. 2 is a cross-sectional view taken along the line a-a 'of FIG. 1 and referring to this, it can be seen that the density of the gate 120 is not uniform in the X-axis direction. Unexplained reference numeral 120a denotes a gate insulating film, 120b denotes a gate conductive film, and 120c denotes a gate hard mask film.

In more detail, the CD 120 may be different in the region where the pattern density is dense and the region is small, which means that as the gap between the gates 120 decreases, the etching by-products during the etching process for forming the gate 120 may be formed. This is because it is difficult to discharge and the progress path of the etching gas may be interrupted. That is, in the mask and etching process for forming the gate 120 and the anisotropic etching process for forming the insulating spacer 140, since the etching characteristics vary depending on the pattern density, the CD and the insulating spacer 130 of the gate 120 are formed. ) Thickness varies by region. The effect of changing the CD according to the pattern density is called a loading effect.

Therefore, in the transistor structure of the conventional sense amplifier, the thicknesses of the gate 120 and the insulating spacer 130 are nonuniform depending on the region, and also, the sizes of the source region 140a and the drain region 140b are also nonuniform. The characteristics of the transistors are not uniform. Accordingly, a problem arises in that uniformity of device characteristics is deteriorated without uniform turn-on during transistor operation.

Accordingly, an object of the present invention is to provide a sense amplifier transistor of a semiconductor device capable of improving the problem of non-uniformity of a device caused by a difference in density of gate patterns. .

In the sense amplifier transistor of the semiconductor device of the present invention for achieving the above object, the device isolation film so that two transistor formation regions in contact with each other in the sense amplifier formation region is spaced apart from two other transistor formation regions in contact with each other in the longitudinal direction. A formed semiconductor substrate; An L-shaped gate formed to be symmetrical with each other in the two transistor formation regions in contact with each other; A dummy gate formed on the device isolation layer between the transistor formation regions to have a uniform pattern density in the sense amplifier formation region; And a source region and a drain region formed in the surface of the transistor formation region at both sides of the L-shaped gate.

Here, the dummy gate is formed by extending one of the gates of the L-shaped gate formed to form the symmetry.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3A and 3B are layout views illustrating the structure of a sense amplifier transistor of a semiconductor device according to an embodiment of the present invention.

First, referring to FIG. 3A, the semiconductor substrate 300 in which only the device isolation layer 310 defining the transistor formation region in the present invention is formed will be described. As shown, the device isolation film 310 of the present invention has the same shape as that in the prior art, and as in the prior art, the two transistor formation regions in contact with each other by the device isolation film 310 extend in the longitudinal direction. Another transistor is spaced apart from two adjacent transistor formation regions. In this case, the transistor formation regions correspond to the active region (A).

Referring to FIG. 3B, in the sense amplifier transistor of the present invention, the semiconductor substrate 300 in which the device isolation layer 310 is formed such that two transistor formation regions in contact with each other are spaced apart from two other transistor formation regions in contact with each other in the longitudinal direction. And an L-shaped gate 320 formed to be symmetrical to each of the two transistor formation regions in contact with each other, and a uniform pattern density in a sense amplifier formation region on a portion of the device isolation layer 310 between the transistor formation regions. A dummy gate 320 ′ formed to have a shape, and a source region 340a and a drain region 340b formed in the surface of the transistor formation region on both sides of the L-shaped gate 320.

Unexplained reference numeral 330 denotes an insulating spacer formed on sidewalls of the L-shaped gate 320 and the dummy gate 320 '.

Meanwhile, the sense amplifier transistor of the present invention makes the L-shaped gate 320 slightly out of the active region A in the X-axis direction as in the prior art, which separates the source region 340a and the drain region 340b. To do so. In addition, the L-shaped gate 320 is formed to be out of the active region A in the Y-axis direction, but the width of the portion deviating in the Y-axis direction is larger than the width in the remaining portion, which is deviated in the Y-axis direction. This is to form a contact in contact with the gate 320 in the portion.

As described above, according to the present invention, in forming the sense amplifier transistor having the L-shaped gate 320, the dummy gate 320 ′ is further formed on the device isolation layer 310 between the transistor formation regions. That is, the dummy gate 320 ′ extending from one end of the L-shaped gate 320 is formed on the portion of the isolation layer 310 between the transistor formation regions.

In this case, as shown in FIG. 4 along the line b-b 'of FIG. 3B, since the density of the gate pattern in the sense amplifier region becomes uniform as a whole, the conventional loading effect when forming the gate and the insulating spacer ( It is possible to prevent the loading effect, so that the thickness of the gate CD and the insulating spacer, and the area of the source / drain regions vary depending on the region. Therefore, the present invention can improve the uniformity of the sense amplifier transistor and improve the operating characteristics of the device. Reference numeral 320a denotes a gate insulating film, 320b denotes a gate conductive film, and 320c denotes a gate hard mask film.

On the other hand, the present invention rarely causes the parasitic capacitance to increase due to the dummy gate 320 ', that is, the expanded gate portion. This is because the dummy gate 320' is not an active region A, which is a conductor. This is because it is formed on the device isolation film 310 which is an insulator having a thick thickness.

In addition, the present invention does not extend the area of the active region A, and furthermore, the L-shaped gate having the dummy gate 320 'without extending the dummy gate 320' from each of the L-shaped gates 320, respectively. In order to alternate between the 320 and the L-shaped gate 320 having no dummy gate 320 ', that is, the gate of any one of the L-shaped gates 320 formed to be symmetrical is extended so that the dummy gate 320' is extended. Because of this, the problem that the chip size is increased as a whole does not occur.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

As described above, in the present invention, in forming a sense amplifier transistor having an L-shaped gate, the parasitic capacitance is increased by forming a dummy gate on the device isolation film portion between the transistor formation regions so that the pattern density becomes uniform. The uniformity of the transistor characteristics can be improved by preventing the thickness variation of the gate CD and the insulating spacer due to the density difference of the pattern without a problem or a problem of increasing the chip size.

Claims (2)

A semiconductor substrate on which a device isolation film is formed such that two transistor formation regions in contact with each other in the sense amplifier formation region are spaced apart from two other transistor formation regions in contact with each other in the longitudinal direction; An L-shaped gate formed to be symmetrical to each of the two transistor formation regions in contact with each other; A dummy gate formed on the device isolation layer between the transistor formation regions to have a uniform pattern density in a sense amplifier formation region; And And a source region and a drain region formed on surfaces of the transistor formation regions on both sides of the L-shaped gate. The sense amplifier transistor of claim 1, wherein the dummy gate is formed by extending one of the L-shaped gates formed to form the symmetry.

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