KR20070072179A - Method for fabricating liquid crystal display device - Google Patents

Abstract

A manufacturing method of an LCD(Liquid Crystal Display) is provided to use a photo process only at the final process, thereby removing the deviation of parasite capacitance between a data wire and a gate wire. The first and second substrates are offered. A gate electrode(122) and a common electrode are formed on the second substrate. A conduction layer and an active layer are formed on the second substrate. A transparent layer is formed on the second substrate. A diffraction mask is used on the second substrate so that source/drain electrodes and a pixel electrode are formed. Thereafter, the first and second substrates are bonded and thereafter a liquid crystal is injected therebetween. When forming the gate electrode and gate line, the resist is printed by the rotation of a roller toward the large horizontal rotation and the small vertical rotation relating to the gate line as the printing direction.

Description

Manufacturing method of liquid crystal display device {METHOD FOR FABRICATING LIQUID CRYSTAL DISPLAY DEVICE}

1 is a plan view showing a part of an array substrate of a general transverse electric field type liquid crystal display device

2 is a plan view showing a part of an array substrate of a liquid crystal display of the present invention.

3A to 3I are cross-sectional views illustrating a manufacturing process of a TFT array substrate according to the present invention.

※※ Description of symbols on the main parts of the drawings ※※

112: roller 114: resist formed from cliché

116: resist in contact with the glass substrate 118: metal layer

120: glass substrate 122: gate electrode

124: common electrode 126: gate insulating film

128a: active layer after primary etching 128b: active layer after secondary etching

130a: conductive layer after primary etching 130b: conductive layer after secondary etching

132: transparent electrode 132a: transparent electrode after primary etching

134: photoresist 134a: photoresist after diffraction exposure

134b: photoresist after ashing

The present invention relates to a method of manufacturing a liquid crystal display device. More specifically, the present invention relates to a method of manufacturing a thin film transistor array (TFT-array) substrate in an IPS (In Plane Switching) and FFS (Fringe Field Switching) type liquid crystal display device. It is manufactured by using a printing method, and relates to forming a source / drain electrode and a pixel electrode by applying a diffraction mask on a substrate after depositing a transparent electrode.

Recently, with increasing interest in information displays and increasing demands for using portable information carriers, lightweight flat panel displays, which replace the conventional display device, the cathode ray tube (CRT); The research and commercialization of FPD) is focused on. In particular, the liquid crystal display (LCD) of the flat panel display device is an image representing the image using the optical anisotropy of the liquid crystal, is excellent in resolution, color display and image quality, and is actively applied to notebooks or desktop monitors have.

At this time, a driving method generally used in the liquid crystal display device is a twisted nematic (TN) method for driving nematic liquid crystal molecules in a vertical direction with respect to a substrate, but the liquid crystal display device of the method has a narrow viewing angle of about 90 degrees. Has its drawbacks. This is due to the refractive anisotropy of the liquid crystal molecules because the liquid crystal molecules oriented horizontally with the substrate are oriented almost perpendicular to the substrate when a voltage is applied to the liquid crystal display panel.

On the other hand, in contrast, the IPS scheme is driven in a horizontal direction to improve the viewing angle to 170 degrees or more, and will be described in detail below.

FIG. 1 is a plan view showing a part of an array substrate of a general IPS type liquid crystal display device. In an actual liquid crystal display device, N gate lines and M data lines cross each other to provide N × M pixels. Only one pixel is shown in the figure.

As shown in the drawing, a gate line 16 and a data line 17 are formed on the transparent glass substrate 10 to be arranged laterally and horizontally to define a pixel area. The gate line 16 and the data line 17 are formed. The thin film transistor 20 which is a switching element is formed in the cross | intersection area | region of the ().

In this case, the thin film transistor 20 includes a gate electrode 21 connected to the gate line 16, a source electrode 22 connected to the data line 17, and a drain electrode 23 connected to the pixel electrode line 18L. do. In addition, although not shown in the drawing, the thin film transistor 20 is a source electrode by an insulating film for insulating the gate electrode 21 and the source / drain electrodes 22 and 23 and a gate voltage supplied to the gate electrode 21. And an active layer, that is, a channel layer, which forms a conductive channel between the 22 and the drain electrode 23.

In the pixel region, the common electrode 8 and the pixel electrode 18 for generating a transverse electric field are alternately arranged in the longitudinal direction of the data line 17. In this case, the pixel electrode 18 is electrically connected to the pixel electrode line 18L connected to the drain electrode 23 through the first contact hole 40A, and the common electrode 8 is connected to the gate line 16. It is electrically connected to the common electrode line 8L and the second contact hole 40B arranged in parallel.

In addition, the common electrode 8 and the pixel electrode 18 are formed on the same plane with a transparent conductive material such as indium tin oxide (ITO).

On the other hand, as described above, the IPS type liquid crystal display device having a 2-ITO structure in which both the pixel electrode and the common electrode are formed as transparent electrodes has an aperture ratio which is increased since the electrodes are all formed as transparent electrodes in the pixel region which is an image display area. Since two kinds of electrodes are formed on the same layer, the electrode gap is uniformly formed, which is advantageous in that response speed and afterimages are obtained according to securing CD (critical dimension) uniformity.

However, variations in parasitic capacitance between the data wirings and the gate wirings and variations due to misalignment between the pixel electrodes are not eliminated, and still no cross talk and luminance improvement are achieved. As a result, the above problems are not particularly helpful for large area TV models that require wide viewing angle structures such as IPS mode.

Accordingly, an object of the present invention is to solve the above problems by using a photo process by diffraction exposure to form a pattern of a pixel electrode, which is the finest pattern among all the conventional processes.

The configuration of the thin film transistor liquid crystal display device of the IPS and FFS method according to the present invention comprises the steps of providing a first substrate; Providing a second substrate; Forming a gate electrode and a common electrode on the second substrate; Forming a conductive layer and an active layer on the second substrate; Depositing a transparent electrode on the second substrate; Forming a source / drain electrode and a pixel electrode by applying a diffraction mask on the second substrate; and injecting a liquid crystal after bonding the first substrate and the second substrate to each other.

2 is a plan view showing a part of an array substrate of an IPS type liquid crystal display device as a first embodiment according to the present invention. Referring to the drawings, the TFT portion is formed at the intersection of the data line 130b and the gate line according to the present invention and is connected to a pixel electrode (not shown) for driving the liquid crystal cell. The data wiring is connected to the source region of the TFT semiconductor layer, the drain electrode (not shown) is connected to the drain region of the semiconductor layer, and the gate wiring has a protruding gate electrode 122 and a common electrode (not shown). The pixel electrode reacts with the common electrode formed on the same layer as the gate electrode 122 to form an electric field.

Next, the entire process will be described with reference to the drawings of FIGS. 3A to 3I based on the cut surface of FIG. 2. First, in order to form the gate electrode and the common electrode, as shown in FIG. 3A, the interaction between the roller 112 and the cliché (not shown) must be substantially assumed. In other words, when the roller 112 is brought into contact with the cliché to interact, the resist pattern 114 remains on the roller. The resist pattern 116 on the roller is reprinted onto the substrate 120 by rotating the resist pattern on the roller formed through the above process on the substrate 120 on which the metal film 118 is deposited.

Here, since the size of the roller is smaller than the substrate, the above process is repeated several times to form a resist pattern on the entire substrate. In particular, since the process of forming the resist pattern is characterized in that it has a directionality, the resist pattern for the gate electrode and the gate wiring is largely rotated in a direction horizontal to the gate wiring, and smaller in the direction perpendicular to the line It is worth noting that it is.

Thereafter, the gate electrode 122 and the common electrode 124 are formed as shown in FIG. 3B through an etching process. Subsequently, the gate insulating layer 126, the active layer, and the conductive layer are sequentially deposited on the substrate 120 on which the gate electrode 122 and the common electrode 124 are formed.

Thereafter, another type of photoresist is patterned on the region where the thin film transistor is to be formed again in the same manner as the roller printing method (not shown). Here again, the patterning process of the resist according to the printing method of the roller has the same orientation as the process of forming the gate electrode 122 and the common electrode 124. In other words, the rotation of the roller is increased in the direction parallel to the data line 130a, and the rotation of the roller is reduced in the direction perpendicular to the line.

Subsequently, as shown in FIG. 3C, the conductive layer and the active layer are etched according to the patterning of the resist to form the primary-etched conductive layer 130a and the active layer 128a.

Next, although not separately shown in the drawings, a resist is printed on the substrate through the same roller printing method as described above to form a contact hole (not shown) for electrical contact with the gate pad part.

Finally, a transparent electrode 132 made of ITO or IZO or the like is deposited on the substrate on which the contact hole (not shown) is formed, and a photoresist 134 is coated on the transparent electrode. Next, as shown in FIG. 3E, the pixel electrode is formed through a subsequent detailed process using diffraction exposure of the mask. In particular, it should be noted here that the resist is applied in the same manner as the conventional photo process.

Next, a process of forming a pixel electrode using diffraction exposure, which is the core of the present invention, will be described in detail. As shown in FIG. 3E, a photoresist 134 is applied onto the substrate on which the transparent electrode 132 is deposited, and both outer portions, that is, portions exposed to UV beams as in FIG. 3F using diffraction exposure. The resist is removed, and the portion where the source / drain and the pixel electrode are formed remains as it is, and only half of the resist is left in the portion where the channel is to be formed by diffraction exposure.

Then, as shown in FIG. 3G, a portion of the transparent electrode 132a which is preferentially formed by etching the remaining portions other than the portions where the resist remains, followed by a slight portion of the side portions of the data wiring and the side portions of the source / drain layer and the active layer. Further etching is performed to form a source / drain layer 130b and an active layer 128b. This is called 'secondary etching' in the present invention.

As a result, since the data line and the pixel electrode are simultaneously formed in the transparent electrode forming step in the etching process step due to the diffraction exposure through the use of the mask, the variation amount 309 due to misalignment is eliminated. This solves the problem of luminance, which has been a problem.

Thereafter, as shown in FIG. 3H, ashing of the remaining resist remaining at the site where the channel is to be formed and etching of the transparent electrode and the source / drain layer at the site where the channel is to be formed are performed.

Through the etching process, the channel layer related to the formation of the source / drain electrodes 130b (not shown) is opened, and as a result, the source and drain electrodes 130b (not shown) are electrically separated from each other, and thus are electrically connected only through the channel layer. It becomes a structure that becomes. FIG. 3i shows the above result, and shows the state in which the source and drain electrodes are separated.

Finally, by stripping off the resist 134b remaining in the formation portion and data line portion of the source / drain electrode, the process of using diffraction exposure, which is the core of the present invention, is finished.

In fact, in addition to this, although not separately shown in the drawings, the TFT array substrate using the IPS and FFS schemes has alignment film deposition and rubbing on the substrate. Then, the upper panel is bonded to the color filter substrate, and then the LCD panel is formed including the liquid crystal injected between the two substrates.

Therefore, the margin between the gate and the source / drain (or active layer) and the source / drain and the pixel electrode margin required for the channel formation, which are necessary for reducing the conventional light leakage, are the gate and the pixel according to the present process. Being able to secure with inter-electrode margins, as a result, securing such margins makes it possible to design the openings wider.

As a result, the present invention eliminates the variation of parasitic capacitance between the data line and the gate wiring by using the photolithography process of the pixel electrode layer, thereby improving the cross talk problem. By eliminating the variation due to the arrangement, it is possible to realize a panel characteristic with improved image quality.

As a result, the above process is particularly required for a large area TV model that requires a wide viewing angle structure such as IPS mode, and this structure also advantageously uses the pixel portion, which is the finest pattern, as the photo layer.

Claims (9)

Providing a first substrate; Providing a second substrate; Forming a gate electrode and a common electrode on the second substrate; Forming a conductive layer and an active layer on the second substrate; Depositing a transparent electrode on the second substrate; Forming a source / drain electrode and a pixel electrode by applying a diffraction mask on the second substrate; and And injecting liquid crystal after bonding the first substrate and the second substrate to each other. The method of claim 1, wherein the forming of the gate electrode and the gate wiring comprises printing the resist by increasing the rotation of the roller in a direction parallel to the gate wiring and decreasing the rotation in the vertical direction. A manufacturing method of a liquid crystal display device constituted. The method of claim 1, wherein the forming of the source / drain and the active layer comprises printing a resist on the conductive layer by increasing the rotation of the roller in a direction parallel to the data line and decreasing the rotation in the vertical direction. Method of manufacturing a liquid crystal display device comprising the step. The method of claim 3, wherein the forming of the source / drain and the active layer comprises: removing the resist completely at a portion exposed by the UV beam and leaving the resist at the portion where the source / drain is formed. A corresponding part further comprises the step of leaving half of the resist. The method of claim 4, wherein the forming of the source / drain and the active layer further comprises first etching the transparent electrode corresponding to the portion from which the resist is removed. The liquid crystal display of claim 5, wherein the forming of the source / drain and the active layer further comprises sequentially etching the side portions of the data line and the side portions of the source / drain layer and the active layer sequentially. Manufacturing method. 7. The method of claim 6, wherein the forming of the source / drain and the active layer further comprises ashing the resist remaining in the channel portion or the like. The method of claim 7, wherein the forming of the source / drain and the active layer further comprises etching the transparent electrode and the conductive layer of the channel portion. The method of claim 8, wherein the forming of the source / drain and the active layer further comprises peeling off the resist remaining in the forming portion of the source / drain electrode.

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