KR20070071296A - Fabricating method of liquid crystal display device - Google Patents

Abstract

A method for manufacturing an LCD(Liquid Crystal Display) is provided to reduce the number of photo-masks used, by forming a gate electrode and a contact hole for exposing a drain electrode through the same photo-mask. A gate electrode(203) is formed on a substrate. A gate insulating layer(207) is formed on the resultant substrate including the gate electrode. A source electrode(213a), a drain electrode(213b), and a semiconductor pattern(209) are formed on the gate insulating layer. An interlayer insulating film(217) is formed on the resultant substrate including the source electrode and the drain electrode. A first contact hole(225a) is formed in the interlayer insulating film to expose the drain electrode. A pixel electrode, which is connected to the drain electrode through the first contact hole, is formed on the interlayer insulating film. The gate electrode and the first contact hole are respectively formed using the same photo-mask.

Description

Manufacturing method of liquid crystal display device {FABRICATING METHOD OF LIQUID CRYSTAL DISPLAY DEVICE}

1 is a plan view showing a conventional liquid crystal display device

2 is a cross-sectional view showing a conventional liquid crystal display device

3A to 3D are cross-sectional views illustrating a conventional liquid crystal display device manufacturing method.

4 is a cross-sectional view showing a liquid crystal display device of the present invention.

5A through 5D are cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to the present invention.

** Explanation of symbols for main parts of drawings **

203: gate electrode

205: gate pad

213a and 213b: source electrode and drain electrode

215: data pad

219 pixel electrode

227: halftone mask

229: diffraction mask

The present invention relates to a method of manufacturing a liquid crystal display device, and more particularly, to a method of using the same photomask in the gate electrode forming step and the contact hole forming step.

In general, a liquid crystal display device displays a desired image by individually supplying data signals according to image information to liquid crystal cells arranged in a matrix, thereby adjusting a light transmittance of the liquid crystal cells. to be.

To this end, the liquid crystal panel of the liquid crystal display device is composed of a color filter substrate, which is a top plate, a thin film transistor array substrate, and a liquid crystal layer formed between the color filter substrate and the thin film transistor array substrate. .

Hereinafter, a structure of a general liquid crystal display device will be described with reference to FIGS. 1 and 2.

1 is a plan view of a thin film transistor array substrate constituting a liquid crystal display device according to the prior art. As shown in FIG. 1, each unit pixel of a thin film transistor liquid crystal display device having N × M pixels arranged vertically and horizontally includes a gate wiring 112 to which a gate signal is applied from an external drive IC, and data to which a data signal is applied. And a thin film transistor formed at an intersection region of the gate line 112 and the data line 102.

In this case, the thin film transistor includes a gate electrode 103 connected to the gate wiring 112, an active layer pattern 109 formed on the gate electrode 103 and activated as a gate signal is applied to the gate electrode 103. And a source electrode 113a and a drain electrode 113b formed on the active layer pattern 109.

In addition, an image signal is applied to the display area of the pixel through the source electrode 113a and the drain electrode 113b as the active layer pattern 109 is activated by being connected to the source electrode 113a and the drain electrode 113b. And a pixel electrode 119 for operating the liquid crystal (not shown) is formed.

FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1 and the cross-sectional structure of a liquid crystal display device according to the related art will be described in detail with reference to the drawings.

As shown in FIG. 2, a gate electrode 103 and a gate pad 105 made of a metal layer are formed on the substrate 101. A gate insulating layer 107 made of silicon oxide (SiO 2) or silicon nitride (SiNx) is formed on a substrate including the gate electrode 103, and an active layer pattern patterned in an island form on the gate insulating layer 107. 109 is formed, and source and drain electrodes 113a and 113b overlapping the active layer pattern 109 in a predetermined shape are formed. At this time, an ohmic contact layer 111 made of amorphous silicon doped with an impurity is formed between the active layer pattern 119 and the source and drain electrodes 113a and 113b, which is the active layer pattern 109 and the source and drain electrodes. This is for allowing 113a and 113b to make ohmic contact.

Subsequently, an interlayer insulating layer 117 is formed on the substrate including the source and drain electrodes 113a and 113b, and the drain electrode (125a in FIG. 3C) is formed through the first contact hole formed in the interlayer insulating layer 117. A pixel electrode 119 electrically connected to 113b is formed on the interlayer insulating layer 117. In this case, since the pixel electrode 119 transmits the light generated from the backlight to the liquid crystal layer, the pixel electrode 119 is formed of a transparent conductive layer such as indium tin oxide (ITO) or tin oxide (TO).

Although not shown on the cut line A-A 'of FIG. 1, the gate pad 105 and the data pad 115 formed on the outer portion of the liquid crystal panel are illustrated in FIG. 2. As shown in FIG. 2, a gate pad 105 connected to the gate line 112 (see FIG. 1) and the data line line (102 of FIG. 1) may receive various signals from an external drive IC at an outer portion of the liquid crystal panel. The data pad 115 is formed, and the electrode pad terminals 121 and 123 of the same material as the material on which the pixel electrode 119 is formed are formed on the pads 105 and 115. The connection is made through 125b and 125c of FIG. 3C.

Although not shown in the drawing, the thin film transistor array substrate is bonded to a color filter substrate including a color filter pattern, a black mattress, and the like, and light transmitted from the backlight is transmitted between the thin film transistor array substrate and the color filter substrate. By filling the liquid crystal layer to control the liquid crystal panel is completed.

Next, a method of manufacturing the liquid crystal display device will be described with reference to FIGS. 3A to 3D. 3A to 3D show whether the light is transmitted or not according to the photomask used in the process and the pattern formed on the photomask.

In the first step, as shown in FIG. 3A, a metal layer is formed on the substrate 101, and the gate electrode 103 and the gate pad 105 are formed using a photolithography technique using a photomask 127. .

In the next step, as shown in FIG. 3B, the gate insulating layer 107, the active layer pattern 109, the ohmic contact layer 111, and the source / drain electrode 113a are disposed on the substrate including the gate electrode 103. 113b) and data pad 105 are formed. In this case, a photolithography technique is used, and the active layer pattern 109, the ohmic contact layer 111, and the source / drain electrodes 113a and 113b are simultaneously patterned using the diffraction mask 129. Referring to the process using the diffraction mask 129 in more detail as follows.

The diffraction mask 129 is a photomask having three regions: a transmission region 129c, a blocking region 129a, and a diffraction region 129b, and slit is formed in the diffraction region 129b to form a photomask. The amount of light passing through is smaller than the transmission area 129c. Therefore, after the exposure and development processes using the diffraction mask 129, a photoresist having a constant step is formed.

The process is performed through a photolithography technique using a diffraction mask 129 by forming a gate insulating layer, a semiconductor layer, and a metal layer on a substrate including the gate electrode 103. After the exposure and development process using the diffraction mask 129, a photoresist having a constant thickness is formed on the source / drain electrodes 113a and 113b, and a photoresist having a lower thickness is formed in the channel region of the active layer pattern 109. Is formed. Therefore, the metal layer, the ohmic contact layer, and the active layer, on which the photoresist is not formed, are removed using the photoresist pattern, and the partial layer is subjected to partial etching to remove the photoresist of the channel region. Remove it. In this case, an ohmic contact layer 111 made of silicon doped with impurities for ohmic contact is formed on the active layer pattern 109 and the lower material layer 109a of the data pad. It is removed together when removing the metal layer on top of the channel region. The ohmic contact layer 111 serves to allow the source / drain electrodes 113a and 113b to make ohmic contact with the active layer pattern 109.

The thin film transistor including the gate electrode 103, the active layer pattern 109, and the source / drain electrodes 113a and 113b is completed through the above-described process.

As a next step, as shown in FIG. 3C, an interlayer insulating layer 117 is formed on a substrate including the source / drain electrodes 113a and 113b and a photolithography technique using a photomask 131 is used. As a result, the first contact hole 125a is formed to expose a portion of the drain electrode 113b. At this time, when the first contact hole 125a is formed, the interlayer insulating layer 117 or the interlayer insulating layer 117 and the gate insulating layer 107 formed on the gate pad 105 and the data pad 115 are patterned. Contact holes 125b and 125c are also formed on the gate pad 105 and the data pad 115.

As a final step, indium tin oxide (ITO) or tin oxide (ITO) is formed on the interlayer insulating layer 117 on which the contact holes (125a, 125b and 125c of FIG. 3c) are formed, as shown in FIG. 3D. A transparent conductive layer, such as tin oxide (TO), is deposited, and the pixel electrode 119 is formed in the pixel region using a photolithography technique using a photomask 133. The pixel electrode 119 is connected to the drain electrode 113b through a first contact hole (125a in FIG. 3C) formed in the interlayer insulating layer 117. The gate pad terminal 121 is also connected to the gate pad 105 and the data pad 115 through the second and third contact holes (125b and 125c of FIG. 3c) on the gate pad 105 and the data pad 115, respectively. ) And the data pad terminal 123.

Although not shown in the drawings, a color filter pattern, a common electrode, and the like are formed on the color filter substrate, and the color filter substrate is bonded to the thin film transistor array substrate to fill the liquid crystal layer therebetween, thereby completing the liquid crystal panel of the liquid crystal display device. do.

As described above, in the conventional liquid crystal display device manufacturing method, one photomask is used in the gate electrode forming step, the semiconductor pattern and the source / drain electrode forming step, the contact hole forming step, and the pixel electrode forming step, respectively. Four types of photomasks are used. The manufacturing of the photomask takes a lot of cost, and the increase in the type of photomask used in the manufacturing process of the liquid crystal display device increases the manufacturing cost of the liquid crystal display device. In particular, the larger the factory, the larger the size of the photomask, the larger the equipment used for manufacturing the photomask, the cost required to produce a photomask, and the difficulty in securing the uniformity of the patterns formed on the photomask.

Therefore, there is a need for reducing the type of photomask used in the prior art in the manufacturing process of the liquid crystal display device.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problem, and an object of the present invention is to manufacture a thin film transistor array substrate constituting a liquid crystal display device using three photomasks.

Specifically, in the present invention, the gate electrode forming step and the contact hole forming process are performed using the same photomask. For this purpose, the photomask is manufactured as a halftone mask or a diffraction mask.

A liquid crystal display device manufacturing method of the present invention for achieving the above object comprises the steps of forming a gate electrode on a substrate; Forming a gate insulating layer on the substrate including the gate electrode; Forming a source and a drain electrode and a semiconductor pattern on the gate insulating layer; Forming an interlayer insulating layer on the substrate including the source and drain electrodes; Forming a first contact hole in the interlayer insulating layer to expose a lower drain electrode; And forming a pixel electrode connected to the drain electrode through the first contact hole on the interlayer insulating layer, wherein the gate electrode forming step and the first contact hole forming step are performed using the same photomask.

With reference to Figure 4 looks at the structure of the liquid crystal display device manufactured by the present invention.

First, as shown in FIG. 4, as illustrated in FIG. 4, a gate electrode 203 is formed on a substrate 201, and an active layer pattern (eg, a gate insulating layer 207 is interposed on the gate electrode 203). 209 and an ohmic contact layer 211 are formed. Source and drain electrodes 213a and 213b are formed on the ohmic contact layer 211, and a first contact hole exposing a portion of the drain electrode 213b on the source and drain electrodes 213a and 213b. An interlayer insulating layer 217 is formed. A transparent pixel electrode 219 connected to the exposed drain electrode 213b is formed on the interlayer insulating layer 217.

Next, the pad unit will be described with reference to FIG. 4.

As shown in FIG. 4, a gate pad 105 and a data pad 215 are formed on the insulating substrate 201 and the gate insulating layer 207, respectively, in the pad part. A gate pad terminal 221 connected to the gate pad 205 is formed on the gate pad 205 through a second contact hole (not shown) formed in the gate insulating layer 207 and the interlayer insulating layer 217. In addition, a data pad terminal 223 connected to the data pad 215 is formed on the data pad 215 through a third contact hole (not shown) formed in the interlayer insulating layer 217. At this time, the first contact hole (not shown) and the third contact hole (not shown) are formed on the same stacked structure as the gate electrode 203 under the first contact hole (not shown) and the third contact hole (not shown) of the insulating substrate. Metal layer patterns 203a and 203b having the same shape are formed, respectively, which will be explained in the method of manufacturing a liquid crystal display device to be described later.

Next, a manufacturing method of the liquid crystal display device of the present invention will be described with reference to FIGS. 5A to 5D.

In the first step, as shown in FIG. 5A, the gate electrode 203 is formed on an insulating substrate 201 such as a glass substrate. The process is performed by forming a metal layer on a substrate and a patterning method using a photolithography technique.

In this case, a halftone mask 227 is used for the photolithography technique. In the halftone mask 227, a semi-transmissive pattern 227b is formed in the gate electrode 203 of the pixel portion, and the first contact hole ( A blocking pattern 227a is formed at the portion 225a of FIG. 5C. In addition, a semi-transmissive pattern 227b and a light blocking pattern 227a formed in the shape of the second contact hole (225b of FIG. 5C) are formed in the gate pad 205 of the pad part, and the third contact hole (FIG. 5C). The blocking pattern 227a is formed at the portion 225c of the figure.

The reason why the halftone mask 227 is used in the first step process as described above is that the first, second and third contact holes (225a, 225b and 225c in FIG. 5C) are used in the first step. This is because the used photomask 227 is used again, and for this reason, metal patterns 203a and 203b are formed in portions of the first and third contact holes (225a and 225c of FIG. 5C) having the same stacked structure as the gate electrode 203. Although formed, this has no effect on device driving including thin film transistors.

In addition, a diffraction mask other than a halftone mask may be used in the first step. In this case, a diffraction pattern is formed in the gate electrode portion of the pixel portion, and a blocking pattern is formed in the first contact hole portion. In addition, a light blocking pattern having a diffraction pattern and a second contact hole shape is formed in the gate pad portion of the pad portion, and a blocking pattern is formed in the third contact hole portion. Even when the diffraction mask is used instead of the halftone mask as described above, the formation process and the pattern formation result of the metal layer pattern are the same as the case of using the halftone mask.

As a next step, as shown in FIG. 5B, the gate insulating layer 207, the active layer pattern 209, the ohmic contact layer 211, and the source / drain electrode 213a are formed on the substrate including the gate electrode 203. , 213b). The process is performed by forming silicon oxide (SiO 2) or silicon nitride (SiO x) on the entire surface of the substrate, stacking the semiconductor layer and the metal layer, and then patterning the semiconductor layer and the metal layer using photolithography.

In this case, a diffraction mask 229 is used for the photolithography technique. The diffraction mask 229 includes a source / drain electrode 213a and 213b and a data pad 215 as a blocking region 229a. The channel portion is composed of a diffraction region 229b, and the remaining portion is composed of a transmission region 229c. The process using the diffraction mask 229 will be described in more detail as follows.

First, a pure amorphous silicon layer, an amorphous silicon layer doped with impurities, and a metal layer are sequentially formed on the gate insulating layer 207, and a photoresist is formed on the metal layer, followed by exposure and development using the diffraction mask 229. Do it. The metal layer, the pure amorphous silicon layer, and the amorphous silicon layer doped with impurities are removed using the exposed and developed photoresist as a mask. Subsequently, the photoresist is partially etched, and the metal layer and the amorphous silicon layer doped with impurities are removed using the photoresist remaining after the partial etch as a mask. In this case, the partial ashing must leave photoresist partially on the source and drain electrodes, and the photoresist must be completely removed so that the metal layer is exposed on the channel region.

By using the photolithography technique using the diffraction mask 229 as described above, the active layer pattern 209 and the source / drain electrodes 213a and 213b may be formed by a single photolithography technique.

As a next step, as shown in FIG. 5C, the interlayer insulating layer 217 is formed on the substrate including the source / drain electrodes 213a and 213b, and the first, second and third contact holes ( 225a, 225b, and 225c). The interlayer insulating layer 217 may be an inorganic insulating layer such as silicon oxide (SiO 2), silicon nitride (SiO x), or an organic insulating layer such as photoacrylic. In the photolithography technique, the halftone mask 229 or the diffraction mask used in the gate electrode 203 forming step is used again.

At this time, in order to be able to use the photomask 229 used in the gate electrode forming step as described above, a negative photoresist should be used. A photoresist is a substance whose solubility in a specific developer is changed in response to light, and a positive photoresist having a property that the exposed part is removed by the developer depending on the kind thereof, and a developer that is not exposed It can be divided into negative photoresist having the property of removing by.

In the method of manufacturing the liquid crystal display of the present invention, the positive photoresist is formed in the gate electrode 203 forming step, the semiconductor pattern 209 and the source / drain 213a and 213b forming step, and the pixel electrode (219 in FIG. 5D) forming step. Negative photoresist is used in the first, second and third contact hole 225a, 225b, and 225c forming steps.

Therefore, when the photomask used in the gate electrode 203 forming step is used in the first, second and third contact hole 225a, 225b, and 225c forming steps to expose and develop, the light blocking pattern may be completely blocked. The lower portion of the photoresist formed on the substrate is completely exposed in the first, second, and third contact holes 225a, 225b, and 225c where the 227a is formed. A photoresist having a predetermined thickness remains in the transmission region portion, and a photoresist having a thickness lower than that in the transmission region remains in the transflective pattern 227b or the diffraction pattern portion. Therefore, when the interlayer insulating layer 217 is etched using the photoresist as a mask, only the interlayer insulating layer 217 of the first, second, and third contact holes 225a, 225b, and 225c is removed, thereby making contact holes ( 225a, 225b, and 225c are formed.

In the next step, as illustrated in FIG. 5D, the pixel electrode 221 is disposed on the interlayer insulating layer 217 including the first, second, and third contact holes 225a, 225b, and 225c of FIG. 5C. The gate pad terminal 221 and the data pad terminal 223 are formed. The process forms a transparent conductive layer, such as indium tin oxide or tin oxide, on the interlayer insulating layer 217 on which the contact holes 225a, 225b, and 225c are formed. By patterning the transparent conductive layer using a photolithography technique using 231.

As a result, a thin film transistor constituting the liquid crystal display device using a total of three photomasks using different photomasks in the gate electrode and contact hole forming step, the semiconductor pattern and source / drain electrode forming step, and the pixel electrode forming step, respectively. The array substrate can be manufactured.

The thin film transistor array substrate is bonded to the color filter substrate on which the color filter pattern and the black matrix are formed, and the liquid crystal layer is filled between the two substrates to complete the liquid crystal panel. The liquid crystal panel is combined with a backlight device and various driving circuits to form one liquid crystal display device.

Many details are set forth in the foregoing description but should be construed as illustrative of preferred embodiments rather than to limit the scope of the invention. Therefore, the invention should not be defined by the described embodiments, but should be defined by the claims and their equivalents.

As described above, in the method of manufacturing the liquid crystal display device of the present invention, the halftone mask or diffraction mask used in the gate electrode forming step is used again in the contact hole forming step. Therefore, the manufacturing cost of the photomask can be reduced, and the photomask management has an advantageous effect.

Further, the thin film transistor array substrate constituting the liquid crystal display device of the present invention simultaneously forms a semiconductor pattern and a source / drain electrode using one diffraction mask. Accordingly, in the present invention, different photomasks are used in the gate electrode and contact hole forming step, the semiconductor pattern and source / drain electrode forming step, and the pixel electrode forming step, respectively, to fabricate a thin film transistor array substrate using a total of three photomasks. Has an advantageous effect.

Claims (9)

Forming a gate electrode on the substrate; Forming a gate insulating layer on the substrate including the gate electrode; Forming a source and a drain electrode and a semiconductor pattern on the gate insulating layer; Forming an interlayer insulating layer on the substrate including the source and drain electrodes; Forming a first contact hole in the interlayer insulating layer to expose a lower drain electrode; And And forming a pixel electrode connected to the drain electrode through the first contact hole on the interlayer insulating layer, wherein the gate electrode forming step and the first contact hole forming step are performed using the same photomask. Method of manufacturing a liquid crystal display device. The method of claim 1, Forming a source and a drain electrode and a semiconductor pattern on the gate insulating layer, The source and drain electrode portions are made of a blocking pattern, and the channel portion is made of a photolithography technique using a diffraction mask made of a diffraction pattern. The method of claim 2, Forming the source and drain electrodes and the semiconductor pattern by a photolithography technique using the diffraction mask, Sequentially forming a pure amorphous silicon layer and an amorphous silicon layer doped with impurities on the gate insulating layer; Forming a metal layer on the amorphous silicon layer doped with the impurity; Forming a photoresist on the metal layer; Exposing and developing the photoresist using the diffraction mask; Removing the metal layer, the pure amorphous silicon layer, and the amorphous silicon layer doped with impurities using the exposed and developed photoresist as a mask; Partially ashing the photoresist; And removing the metal layer and the amorphous silicon layer doped with impurities from the upper portion of the channel region with the photoresist remaining after the partial ashing as a mask. The method of claim 3, wherein The partial ashing, And partially removing the photoresist on the source and drain electrodes and completely removing the photoresist such that the metal layer is exposed on the channel region. The method according to any one of claims 1 to 4, Forming a first contact hole in the interlayer insulating layer to expose a lower drain electrode; And forming a second contact hole exposing the lower gate pad and a third contact hole exposing the lower data pad at the same time. The method of claim 5, The same photomask used in the gate electrode forming step and the first, second and third contact hole forming steps may include The gate electrode portion is composed of a semi-transmissive pattern, the first contact hole portion is composed of a blocking pattern, the gate pad portion is composed of a semi-transmissive pattern and a light shielding pattern of the second contact hole portion, and the third contact hole portion is A method of manufacturing a liquid crystal display device comprising a halftone mask composed of a blocking pattern. The method of claim 5, The same photomask used in the gate electrode forming step and the first, second and third contact hole forming steps may include The gate electrode portion is composed of a diffraction pattern, the first contact hole portion is composed of a blocking pattern, the gate pad portion is composed of a diffraction pattern and a light blocking pattern of the second contact hole, and the third contact hole portion is composed of a blocking pattern. A method of manufacturing a liquid crystal display device, comprising a diffraction mask. The method of claim 6, In the first, second, third contact hole forming step, A method for manufacturing a liquid crystal display device, characterized in that a negative photoresist is used. The method of claim 7, wherein In the first, second, third contact hole forming step, A method for manufacturing a liquid crystal display device, characterized in that a negative photoresist is used.

Images