KR20070069767A - Phase change ram device and method of manufacturing the same - Google Patents

Abstract

A phase change memory device and its manufacturing method are provided to lower write current required for phase change of a phase change layer by positioning a phase change layer between lower and upper electrodes. A first interlayer dielectric(22) is formed on a semiconductor substrate(21) to cover a lower pattern of the substrate. A contact plug(23) is formed in the first interlayer dielectric to contact the lower pattern. A lower electrode(24a) is formed on the first interlayer dielectric, and an insulation layer(25) is formed on the lower electrode. A phase change layer(26a) is formed in the insulation layer to contact the lower electrode. An upper electrode(27a) is formed on the insulation layer, and a second interlayer dielectric(31) is formed on the first interlayer dielectric to cover the upper electrode. A bit line(32) is formed on the second interlayer dielectric to contact the upper electrode.

Description

Phase change RAM device and method of manufacturing the same

1 is a cross-sectional view showing a conventional phase change memory element.

2A to 2F are cross-sectional views of processes for explaining a method of manufacturing a phase change memory device according to an embodiment of the present invention.

3A to 3D are cross-sectional views illustrating processes for manufacturing a phase change memory device according to another exemplary embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

21 semiconductor substrate 22 first interlayer insulating film

23 contact plug 24 conductive film for lower electrode

25 insulating film 26 phase change material film

26a: phase change film 27: conductive film for upper electrode

27a: upper electrode 28: antireflection film

30 phase change cell 31 second interlayer insulating film

32: bit line

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase change memory element, and more particularly, to a phase change memory element capable of simplifying the process and facilitating process progress, and a manufacturing method thereof.

The memory device is a volatile random access memory (RAM) device that loses input information when the power supply is cut off, and a read only memory (ROM) device that maintains the storage state of the input information even when the power supply is turned off. It is largely divided. The volatile RAM devices may include DRAM and SRAM, and the nonvolatile ROM devices may include flash memory devices such as EEPROM (Elecrtically Erasable and Programmable ROM). have.

However, although the DRAM has a very good memory device as is well known, high charge storage capability is required, and for this purpose, it is difficult to achieve high integration since the electrode surface area must be increased. In addition, the flash memory device requires a high operating voltage compared to a power supply voltage in connection with a structure in which two gates are stacked, and thus requires a separate boost circuit to form a voltage required for write and erase operations. Therefore, there is a difficulty in high integration.

Accordingly, many studies have been conducted to develop a new memory device having the characteristics of the nonvolatile memory device and having a simple structure. For example, in recent years, a phase change memory device (Phase) has been developed. Change RAM) has been proposed.

The phase change memory device utilizes a difference in resistance between crystalline and amorphous phases due to the phase change of the phase conversion film interposed between the electrodes from the crystal state to the amorphous state through the current flow between the lower electrode and the upper electrode. It is a storage element for determining stored information. In other words, the phase conversion memory device uses a chalcogenide film as a phase conversion film. The chalcogenide film is a compound film composed of germanium (Ge), stevidium (Sb), and tellurium (Te). Phase change occurs between the amorphous state and the crystalline state due to the applied current, that is, the joule heat, from which the resistivity of the phase change film having an amorphous state is higher than that of the phase change film having a crystalline state. In the read mode, the current flowing through the phase change layer is sensed to determine whether the information stored in the phase change memory cell is logic '1' or logic '0'.

1 is a cross-sectional view illustrating a conventional phase change memory device, which will be described below.

As shown, gates 4 are formed in the active region of the semiconductor substrate 1 defined by the isolation layer, and a junction region (not shown) is formed in the substrate surface on both sides of the gate 4. have.

An interlayer insulating film 5 is formed on the entire surface of the substrate 1 so as to cover the gates 4, and a first interlayer insulating film 5 is formed in each of the interlayer insulating film portions of the region where the phase change cell is to be formed and the region where the ground voltage is to be applied. The contact plug 6a and the second contact plug 6b are formed.

A first oxide film 7 is formed on the interlayer insulating film 5 including the first and second contact plugs 6a and 6b, and a region in which a phase change cell is to be formed by a known damascene process. The metal pad 8 is formed in contact with the first contact plug 6a, and a ground voltage line having a bar shape in contact with the second contact plug 6b in a region to which a ground voltage is applied. 9) is formed.

The second oxide film 10 is formed on the first oxide film 7 including the metal pad 8 and the ground line 9, and the metal pad (10) is formed in the second oxide film 10 in the region where the phase change cell is to be formed. The lower electrode 11 is formed in the form of a plug in contact with 8).

The phase change layer 12 and the upper electrode 13 are stacked in a pattern form on the second oxide layer portion on which the phase change cell is to be formed, in contact with the lower electrode 11. 11) and a phase change cell including a phase change film 12 and an upper electrode 13 stacked thereon.

In addition, a third oxide film 14 is formed on the second oxide film 10 to cover the phase change cell, and a plug-type upper electrode in contact with the upper electrode 13 is formed in the third oxide film 14. A contact 15 is formed, and a metal wiring 15 is formed on the third oxide film 14 to contact the upper electrode contact 15.

However, the above-described conventional phase-change memory device is formed through a damascene process. Although not shown and described in detail, it defines an area where the metal pad is to be formed by etching the first oxide film, and then the metal film is formed. The process itself is complicated, such as depositing and then CMP of the metal film, and also process difficulties such as etching down to the first contact plug under the etching of the first oxide film for defining the region where the metal pad is to be formed. This exists.

Accordingly, an object of the present invention is to provide a phase change memory device capable of simplifying the process and facilitating the process, and to provide a method of manufacturing the same.

In order to achieve the above object, the present invention, a semiconductor substrate provided with a lower pattern; A first interlayer insulating film formed on the semiconductor substrate so as to cover the lower pattern; A contact plug formed in the first interlayer insulating layer to contact the lower pattern; A lower electrode formed on the first interlayer insulating film including the contact plug; An insulating film formed on the lower electrode; A plug type phase change layer formed in contact with the lower electrode in the insulating layer; An upper electrode formed on the insulating film including the phase change film; A second interlayer insulating film formed on the first interlayer insulating film to cover the upper electrode; And a bit line formed on the second interlayer insulating layer to contact the upper electrode.

In addition, in order to achieve the above object, the present invention, a semiconductor substrate provided with a lower pattern; A first interlayer insulating film formed on the semiconductor substrate so as to cover the lower pattern; A contact plug formed in the first interlayer insulating layer to contact the lower pattern; A lower electrode formed on the first interlayer insulating film including the contact plug; An insulating film formed on the lower electrode; A phase change layer formed in and on the insulating layer to contact the lower electrode; An upper electrode formed on the phase conversion film; A second interlayer insulating film formed on the first interlayer insulating film to cover the upper electrode; And a bit line formed on the second interlayer insulating layer to contact the upper electrode.

In the above-described phase change memory device of the present invention, the phase change film is formed to be disposed on the same axis as the contact plug.

The lower electrode, the phase conversion film, and the upper electrode are formed to have the same width.

And an antireflection film formed between the upper electrode and the second interlayer insulating film, wherein the antireflection film is made of a Ti film, and the upper electrode is any one metal selected from the group consisting of a TiN film, an Al film, and a W film. Membrane

The bit line includes a plug portion formed to contact the upper electrode in the second interlayer insulating layer, wherein the plug portion and the portion disposed on the second interlayer insulating layer are integrally formed or separated from each other.

In order to achieve the above object, the present invention provides a semiconductor substrate having a lower pattern; Forming a first interlayer insulating film on an entire surface of the substrate to cover the lower pattern; Forming a contact plug in the first interlayer insulating layer to contact the lower pattern; Sequentially forming a first conductive film and an insulating film on the first interlayer insulating film including the contact plug; Forming a contact hole in the insulating film to expose a first conductive film; Forming a phase change film in the contact hole; Forming a second conductive film on the insulating film including the phase change film; Etching the second conductive film to form an upper electrode, etching the insulating film and etching the first conductive film to form a lower electrode; Forming a second interlayer insulating film on the first interlayer insulating film including the upper electrode; And forming a bit line in contact with an upper electrode on the second interlayer insulating film.

In addition, in order to achieve the above object, the present invention provides a semiconductor substrate having a lower pattern; Forming a first interlayer insulating film on an entire surface of the substrate to cover the lower pattern; Forming a contact plug in the first interlayer insulating layer to contact the lower pattern; Sequentially forming a first conductive film and an insulating film on the first interlayer insulating film including the contact plug; Forming a contact hole in the insulating film to expose a first conductive film; Forming a phase change material film on the insulating film including the contact hole; Forming a second conductive film on the phase change material film; Etching the second conductive film, the phase change material film, and the first conductive film to form an upper electrode, a phase change film, and a lower electrode, respectively; Forming a second interlayer insulating film on the first interlayer insulating film including the upper electrode; And forming a bit line in contact with an upper electrode on the second interlayer insulating film.

In the above-described method for manufacturing a phase change memory device of the present invention, the phase change film is formed to be disposed on the same axis as the contact plug.

The second conductive layer, the phase change material layer, and the first conductive layer are sequentially etched using a single etching mask, and the upper electrode and the lower electrode are formed to have the same width.

Forming an anti-reflection film on the second conductive film after forming the second conductive film and before etching the second conductive film, wherein the anti-reflection film is formed of a Ti film, The second conductive film is formed of any one metal film selected from the group consisting of a TiN film, an Al film, and a W film.

The bit line is formed to include a plug portion formed in contact with the upper electrode in the second interlayer insulating layer. In this case, the plug portion and the portion disposed on the second interlayer insulating layer may be integrally formed or separately formed.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2F are cross-sectional views for each process for explaining a method of manufacturing a phase change memory device according to the present invention.

Referring to FIG. 2A, a first interlayer insulating layer 22 is formed on a semiconductor substrate 21 on which a lower pattern (not shown) including a transistor is formed to cover the lower pattern. Thereafter, the first interlayer insulating layer 22 is etched to form a first contact hole exposing a lower pattern, specifically, a junction region of the transistor, and then a conductive material such as a silicon film or a metal film is formed in the first contact hole. The film is embedded to form the contact plug 23.

Referring to FIG. 2B, the lower electrode conductive film 24 and the insulating film 25 are sequentially formed on the first interlayer insulating film 22 including the contact plug 23.

Referring to FIG. 2C, the insulating layer 25 is etched to form a second contact hole exposing the conductive layer 24 for the lower electrode. Then, after the phase change material film is deposited on the insulating film 25 to fill the second contact hole, the phase change material film is etched back or CMP (Chemical Mechanical Polishing) to expose the insulating film 25. ) To form a phase change film 26 in the second contact hole.

In the present invention, the second contact hole is formed to be disposed on the same axis as the contact plug 23, so that the Joule heat can be increased by making the current path the shortest distance. In the manufactured phase change memory device, the write current required for the phase change of the phase change film can be reduced.

In addition, according to the present invention, since the conductive film for the lower electrode and the insulating film are sequentially formed, the second contact hole is formed by etching them, and then, the phase change material film is embedded in the second contact hole to form a phase change film. Compared to the conventional technology of controlling the thickness of the phase conversion film by the CMP process, the process may be stably performed.

Referring to FIG. 2D, an upper electrode conductive film 27 and an antireflection film 28 are sequentially formed on the insulating film 25 including the phase change film 26. The upper electrode conductive film 27 is preferably formed of a metal film such as TiN, Al, or W, and the anti-reflection film 28 is formed of a Ti film.

Referring to FIG. 2E, a photoresist pattern (not shown) covering the upper electrode formation region is formed on the antireflection film 28 according to a known photolithography process, and then the antireflection film below is used by using the photoresist pattern as an etching mask. After etching, the upper electrode conductive film is etched to form the upper electrode 27a, and then the insulating film is etched, and then the lower electrode conductive film is etched to form the lower electrode 24a to form the phase change cell 30. Configure

In the present invention, since the upper electrode 27a and the lower electrode 24a are formed by one etching using one etching mask, the process can be simplified compared with the conventional technology of forming each of them. By overlapping the contact plugs 23 at regular intervals, the overlap problem can be solved.

Then, the photoresist pattern used as the etching mask is removed according to a known process.

Referring to FIG. 2F, after forming the second interlayer dielectric layer 31 on the first interlayer dielectric layer 22 including the phase change cell 30 to cover the phase transformation cell, planarize the surface thereof through a CMP process. Let's do it. Then, the third interlayer insulating layer 31 is etched to form a third contact hole exposing the upper electrode 27a of the phase conversion cell, and then on the second interlayer insulating layer 31 including the third contact hole. A metal film is deposited on the substrate, and then the metal film is etched to form a metal wiring including a contact plug contacting the upper electrode 27a, that is, a bit line 32.

Then, although not shown, a series of known subsequent steps are sequentially performed to complete the manufacture of the phase change memory device according to the present invention.

Since the phase change memory device according to the present invention as described above omits the formation of the metal pad, the process simplification can be achieved as much as it corresponds, and the process difficulties can be solved.

In addition, by simultaneously forming the upper electrode and the lower electrode using a single mask it is possible to further simplify the process.

Meanwhile, in the above-described embodiment of the present invention, the bit line is formed to include a contact plug, but the contact plug and the bit line may be formed separately.

In addition, in the above-described embodiment of the present invention, the phase conversion film is formed in the form of a plug, but may be formed in the form including a pad.

Specifically, FIGS. 3A to 3D are cross-sectional views illustrating processes of manufacturing a phase change memory device according to another exemplary embodiment of the present invention. Here, the drawings and the description will be made only for parts different from the previous embodiment, the same parts as in Figs. 2a to 2f are denoted by the same reference numerals.

Referring to FIG. 3A, after the lower electrode conductive layer 24 and the insulating layer 25 are sequentially formed on the first interlayer insulating layer 22 including the contact plug 23, the insulating layer 25 is etched to form a lower portion. A second contact hole for exposing the electrode conductive film 24 is formed. Thereafter, a phase change material film is deposited on the insulating film 25 including the second contact hole, and then a CMP process is performed to planarize the surface thereof.

Referring to FIG. 3B, an upper electrode conductive film 27 made of a metal film such as TiN, Al, or W, and an antireflection film 28 made of a Ti film are sequentially formed on the phase change material film 26.

Referring to FIG. 3C, a photoresist pattern (not shown) covering the upper electrode formation region is formed on the antireflection film 28 according to a known photolithography process. Then, using the photoresist pattern as an etch mask, the anti-reflection film is etched thereunder, then the upper electrode conductive film is etched to form the upper electrode 27a, and then the phase change material film is etched to form the insulating film 25. The phase change film 26a having a pad disposed on the substrate is formed, and the lower electrode 24a is formed by etching the conductive film for the lower electrode, thereby forming the phase change cell 30.

Referring to FIG. 3D, the second interlayer insulating film 31 is formed on the first interlayer insulating film 22 including the phase change cell 30 to cover the phase change cell, and then the surface thereof is planarized through a CMP process. Let's do it. Then, the third interlayer insulating layer 31 is etched to form a third contact hole exposing the upper electrode 27a of the phase conversion cell, and then on the second interlayer insulating layer 31 including the third contact hole. A metal film is deposited on the substrate, and then the metal film is etched to form a bit line 32 including a contact plug in contact with the upper electrode 27a.

Thereafter, a series of well-known subsequent steps are carried out in order to complete the manufacture of the phase change memory device according to the present invention.

In this embodiment, since the interface with the upper electrode is flat compared to the previous embodiment, the write current can be formed high. Of course, this embodiment can also simplify the process and facilitate the process as in the previous embodiment.

As described above, the present invention can simplify the process by omitting the metal pad forming process, as well as to prevent the unwanted etching of the lower layer can be made to facilitate the process.

In addition, the present invention can increase the Joule heat by disposing the phase conversion film in the form of a plug between the lower electrode and the upper electrode, thereby reducing the write current required for the phase change of the phase conversion film.

Hereinbefore, the present invention has been described with reference to some examples, but the present invention is not limited thereto, and those skilled in the art to which the present invention pertains have many modifications and variations without departing from the spirit of the present invention. It will be appreciated that it can be added.

Claims (38)

A semiconductor substrate having a lower pattern; A first interlayer insulating film formed on the semiconductor substrate so as to cover the lower pattern; A contact plug formed in the first interlayer insulating layer to contact the lower pattern; A lower electrode formed on the first interlayer insulating film including the contact plug; An insulating film formed on the lower electrode; A plug type phase change layer formed in contact with the lower electrode in the insulating layer; An upper electrode formed on the insulating film including the phase change film; A second interlayer insulating film formed on the first interlayer insulating film to cover the upper electrode; And A bit line formed on the second interlayer insulating layer to contact an upper electrode; Phase change memory device comprising a. The method of claim 1, And the phase change film is formed on the same axis as the contact plug. The method of claim 1, And the insulating film including the lower electrode and the phase change film and the upper electrode are formed to have the same width. The method of claim 1, And an antireflection film formed between the upper electrode and the second interlayer insulating film. The method of claim 4, wherein And the anti-reflection film is made of a Ti film. The method of claim 4, wherein And the upper electrode is made of any one metal film selected from the group consisting of a TiN film, an Al film, and a W film. The method of claim 1, And the bit line includes a plug portion formed in contact with the upper electrode in the second interlayer insulating film. The method of claim 7, wherein And the bit line is integrally formed with a plug portion and a portion disposed on the second interlayer insulating film. The method of claim 7, wherein And the bit line is formed by separating a plug portion and a portion disposed on the second interlayer insulating layer. A semiconductor substrate having a lower pattern; A first interlayer insulating film formed on the semiconductor substrate so as to cover the lower pattern; A contact plug formed in the first interlayer insulating layer to contact the lower pattern; A lower electrode formed on the first interlayer insulating film including the contact plug; An insulating film formed on the lower electrode; A phase change layer formed in and on the insulating layer to contact the lower electrode; An upper electrode formed on the phase conversion film; A second interlayer insulating film formed on the first interlayer insulating film to cover the upper electrode; And A bit line formed on the second interlayer insulating layer to contact an upper electrode; Phase change memory device comprising a. The method of claim 10, And the phase change film is formed on the same axis as the contact plug. The method of claim 10, And the lower electrode, the phase conversion film, and the upper electrode are formed to have the same width. The method of claim 10, And an antireflection film formed between the upper electrode and the second interlayer insulating film. The method of claim 13, And the anti-reflection film is made of a Ti film. The method of claim 13, And the upper electrode is made of any one metal film selected from the group consisting of a TiN film, an Al film, and a W film. The method of claim 10, And the bit line includes a plug portion formed in contact with the upper electrode in the second interlayer insulating film. The method of claim 16, And the bit line is integrally formed with a plug portion and a portion disposed on the second interlayer insulating film. The method of claim 16, And the bit line is formed by separating a plug portion and a portion disposed on the second interlayer insulating layer. Providing a semiconductor substrate having a lower pattern; Forming a first interlayer insulating film on an entire surface of the substrate to cover the lower pattern; Forming a contact plug in the first interlayer insulating layer to contact the lower pattern; Sequentially forming a first conductive film and an insulating film on the first interlayer insulating film including the contact plug; Forming a contact hole in the insulating film to expose a first conductive film; Forming a phase change film in the contact hole; Forming a second conductive film on the insulating film including the phase change film; Etching the second conductive film to form an upper electrode, etching the insulating film and etching the first conductive film to form a lower electrode; Forming a second interlayer insulating film on the first interlayer insulating film including the upper electrode; And Forming a bit line in contact with an upper electrode on the second interlayer insulating film; A method for manufacturing a phase change memory device comprising a. The method of claim 19, And the phase change film is disposed on the same axis as the contact plug. The method of claim 19, And the second conductive film, the insulating film, and the first conductive film are continuously etched using a single etching mask. The method of claim 21, And the upper electrode and the lower electrode are formed to have the same width. The method of claim 19, And forming an anti-reflective film on the second conductive film after the forming of the second conductive film and before the etching of the second conductive film. . The method of claim 23, And the antireflection film is formed of a Ti film. The method of claim 23, And the second conductive film is formed of any one metal film selected from the group consisting of a TiN film, an Al film and a W film. The method of claim 19, And the bit line includes a plug portion formed to contact the upper electrode in the second interlayer insulating film. The method of claim 26, And said bit line integrally forms a plug portion and a portion disposed on said second interlayer insulating film. The method of claim 26, And the bit line is formed by separating the plug portion and the portion disposed on the second interlayer insulating film. Providing a semiconductor substrate having a lower pattern; Forming a first interlayer insulating film on an entire surface of the substrate to cover the lower pattern; Forming a contact plug in the first interlayer insulating layer to contact the lower pattern; Sequentially forming a first conductive film and an insulating film on the first interlayer insulating film including the contact plug; Forming a contact hole in the insulating film to expose a first conductive film; Forming a phase change material film on the insulating film including the contact hole; Forming a second conductive film on the phase change material film; Etching the second conductive film, the phase change material film, and the first conductive film to form an upper electrode, a phase change film, and a lower electrode, respectively; Forming a second interlayer insulating film on the first interlayer insulating film including the upper electrode; And Forming a bit line in contact with an upper electrode on the second interlayer insulating film; A method for manufacturing a phase change memory device comprising a. The method of claim 29, And the phase change film is disposed on the same axis as the contact plug. The method of claim 29, And the second conductive film, the phase change material film, and the first conductive film are continuously etched using a single etching mask. The method of claim 31, wherein And the upper electrode and the lower electrode are formed to have the same width. The method of claim 29, And forming an anti-reflective film on the second conductive film after the forming of the second conductive film and before the etching of the second conductive film. . The method of claim 33, wherein And the antireflection film is formed of a Ti film. The method of claim 33, wherein And the second conductive film is formed of any one metal film selected from the group consisting of a TiN film, an Al film and a W film. The method of claim 29, And the bit line includes a plug portion formed to contact the upper electrode in the second interlayer insulating film. The method of claim 36, And said bit line integrally forms a plug portion and a portion disposed on said second interlayer insulating film. The method of claim 36, And the bit line is formed by separating the plug portion and the portion disposed on the second interlayer insulating film.

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