KR20060135988A - Fuse box of semiconductor memory device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fuse box of a semiconductor memory device, and more particularly, discloses a technique of preventing cracks due to thermal expansion coefficient aberration by reducing stress by changing a structure of a guard ring of a fuse box using polysilicon. To this end, the guard ring of the fuse box of the present invention, a gate material deposited on the semiconductor substrate, a landing plug contact material, a storage node contact material, a storage node material, and a plate material connected to the upper portion of the gate material; And a laminated structure of a first metal line, a second metal line contact, and a second metal line formed on and insulated from the plate material.

Description

Fuse box of semiconductor memory device

1 is a plan view of a typical fuse box.

2 and 3 are cross-sectional views of the fuse box guard ring of FIG.

4 and 5 are cross-sectional views of the fuse box guard ring in accordance with an embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fuse box of a semiconductor memory device. More particularly, the present invention relates to a technology for preventing cracks due to thermal expansion coefficient aberration by reducing stress by changing a structure of a guard ring of a fuse box using polysilicon.

In general, if any one of a large number of fine cells constituting the semiconductor memory device fails, the semiconductor memory device cannot perform its function, and thus, a repair is performed to replace the defective cell with another normal memory cell. shall.

As such, the semiconductor memory device includes a fuse box for determining whether a defective cell is required to perform a repair. The fuse box includes a plurality of fuses and stores the address information of the defective cell according to the connection state. When the external address is input, the semiconductor memory device compares the external address with the address information of the defective cell of the fuse box. The cell corresponding to the external address is determined to be a bad cell and replaced with another normal cell.

1 is a plan view of a conventional fuse box.

In a conventional fuse box, a plurality of fuse lines 10 are arranged at a predetermined distance, and the edge of the fuse box is surrounded by a guard ring 20 having a predetermined thickness to prevent moisture penetration. At this time, the guard ring 20 is for preventing the penetration of moisture.

2 is a cross-sectional view taken along line AA ′ and BB ′ of the fuse box guard ring 20 of FIG. 1.

The guard ring 20 of a conventional fuse box has a gate material 13 stacked on an upper side of a semiconductor substrate 11 including an isolation layer 12 on both sides thereof, and a predetermined height on one side of an upper portion of the gate material 13. The bit line contact material 14, the bit line material 15, the first metal line contact 16, the first metal line 17, the second metal line contact 18, and the second metal line 19 are formed. It has a structure that is sequentially stacked and the insulating film 30 is deposited on the front.

3 is a cross-sectional view of CC ′ of the guard ring 20 of the fuse box of FIG. 1.

The fuse box of FIG. 3 is similar to the structure of FIG. 2 except that CC ′ is a cross section that cuts the fuse line 10 so that the first metal line contact 16 does not appear. That is, the first metal line contact 16 is not deposited in the fuse line region so that the fuse line 10 and the metal line 17 are not shorted.

At this time, the bit line contact material 14 and the first metal line contact 16 in FIGS. 2 and 3 are formed using tungsten W and the insulating film 30 is formed using an oxide-based material. W and the oxide-based materials have different thermal expansion coefficients, and stresses are applied to the bit line contact 14 and the first metal line contact 16 adjacent to the insulating film 30 during the thermal process during the fuse box manufacturing process. generate a crack.

Due to such cracks, some fuse lines are cut to cause repair malfunctions, thereby reducing the yield of semiconductor devices.

An object of the present invention for solving the above problems, in order to use a polysilicon material having a thermal expansion coefficient similar to that of the oxide material forming the interlayer insulating film when forming the guard ring of the fuse box, instead of the bit line contact and metal line contact By stacking the landing plug contacts, the storage node contacts, and the storage nodes, the cracks in the thermal process are prevented.

A fuse box of a semiconductor memory device of the present invention for achieving the above object is a fuse box comprising a guard ring, the guard ring is connected to the gate material deposited on the semiconductor substrate and the upper portion of the gate material; And a stack structure of a landing plug contact material, a storage node contact material, a storage node material, and a plate material, and a first metal line, a second metal line contact, and a second metal line formed on and insulated from the plate material. It is characterized by the configuration.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

4 and 5 are cross-sectional views of the fuse box guard ring in accordance with an embodiment of the present invention.

In particular, FIG. 4 is a cross-sectional view corresponding to FIG. 2 in the related art, and FIG. 5 is a cross-sectional view corresponding to FIG.

First, as shown in FIG. 4, in the guard ring 200 of the fuse box of the present invention, the gate material 113 is stacked on the semiconductor substrate 111 including the device isolation layer 112 on both sides thereof, and the gate material is stacked. The landing plug contact material 114, the storage node contact material 115, the storage node material 116, and the plate material 117 having a predetermined height are sequentially stacked on one side of the upper portion of the 113, and an insulating film thereon. After the first metal line 118, the second metal line contact 119, and the second metal line 120 are sequentially stacked with the interposed portion 121 therebetween, an insulating layer 121 is deposited on the entire surface thereof. Have

In this case, the landing plug contact material 114, the storage node contact material 115, the storage node material 116, and the plate material 117 are formed using polysilicon.

5 is a cross-sectional view of the fuse line region, similar to that of FIG. 4, but with a plate material 117 not shown. That is, the plate material 117 is not deposited in the fuse line region so that the fuse line and the metal line 118 of the fuse line region are not shorted.

As described above, the present invention forms a part of the guard ring using a polysilicon material having a thermal expansion coefficient similar to that of the oxide material of the interlayer insulating film, thereby alleviating the stress applied during the heat treatment during the fuse box process.

Accordingly, the present invention provides a landing plug contact material which is a poly material at the landing plug contact, storage node contact, and storage node formation of a cell of a semiconductor device, instead of the conventional bit line contact material and metal line contact material at the guard ring process. The guard ring of the fuse box is formed using the storage node contact material and the storage node material.

As described above, the technique using a polysilicon material having a similar thermal expansion coefficient to the oxide material of the interlayer insulating film of the present invention can be applied to the guard ring structure of all semiconductor memory chips including the interlayer insulating film.

As described above, the present invention provides a landing plug contact material and a storage device using a polysilicon material having a thermal expansion coefficient similar to that of an oxide material forming an interlayer insulating film instead of a bit line contact and a metal line contact forming a guard ring of a fuse box. By depositing the node contact material and the storage node material, it is possible to prevent cracks due to thermal expansion coefficient aberration during the thermal process, thereby preventing a repair failure, thereby improving chip yield.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, replacements and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (3)

In a fuse box including a guard ring, The guard ring is, A gate material deposited on the semiconductor substrate; A landing plug contact material, a storage node contact material, a storage node material, and a plate material connected to an upper portion of the gate material; And And a stack structure of a first metal line, a second metal line contact, and a second metal line formed on and insulated from the plate material. The fuse box of claim 1, wherein deposition of the plate material is excluded in an area where the guard ring and the fuse line cross each other. The semiconductor memory of claim 1, wherein the landing plug contact material, the storage node contact material, and the storage node material are formed together when forming the landing plug contact, the storage node, and the storage node in a cell portion of the semiconductor memory device. Fuse box of the device.

Images