KR20060104172A - Led lamp mounting a led having an array of light emitting cells coupled in series - Google Patents

Abstract

A light emitting diode lamp equipped with a light emitting diode chip having a light emitting cell array connected in series is provided. The lamp includes a top and a first lead having a fin-shaped leg extending from the top. The second lead is disposed spaced apart from the first lead. This second lead has a fin-shaped leg corresponding to the first lead. A light emitting diode chip having a light emitting cell array connected in series with the top of the first lead is mounted. Bonding wires electrically connect the light emitting diode chip to the first lead and the second lead, respectively. In addition, a sealing resin seals a part of the top of the first lead, the light emitting diode chip, and the second lead. Accordingly, it is possible to provide a light emitting diode lamp having a light emitting diode chip having a light emitting cell array connected in series, which can be driven using an AC power source without an AC-DC converter.

LED Lamp, LED Chip, LED Cell, Flip Chip

Description

LED LAMP MOUNTING A LED HAVING AN ARRAY OF LIGHT EMITTING CELLS COUPLED IN SERIES}

1 is a cross-sectional view for describing a light emitting diode lamp according to an embodiment of the present invention.

2A and 2B are circuit diagrams for describing a light emitting diode chip mounted on a light emitting diode lamp of the present invention.

3A and 3B are cross-sectional views illustrating a light emitting diode chip according to an embodiment of the present invention.

4A and 4C are cross-sectional views illustrating a light emitting diode chip according to another embodiment of the present invention.

The present invention relates to a light emitting diode lamp equipped with a light emitting diode chip, and more particularly, to a light emitting diode lamp mounted with a light emitting diode chip having light emitting cells connected in series and directly connected to an AC power source. .

LED lamps are widely used for indicators, electronic signs, and displays because they can implement colors, and are also used for general lighting because they can implement white light. Such light emitting diode lamps are highly efficient, have a long lifetime, and are environmentally friendly, so the field of using them continues to increase.

On the other hand, the light emitting diode is a semiconductor device formed of a semiconductor p-n junction structure, and emits light by recombination of electrons and holes, generally driven by a current in one direction. Therefore, when driving a light emitting diode lamp using an AC power source, an AC-DC converter for converting an AC current into a DC current is required. The use of an AC-DC converter with a light emitting diode lamp increases the installation cost of the light emitting diode lamp, making it particularly difficult to use the light emitting diode lamp at home for general lighting. Therefore, in order to use the light emitting diode lamp for general lighting, there is a need for a light emitting diode lamp that can be driven directly using an AC power source without an AC-DC converter.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a light emitting diode lamp that can be driven using an AC power source without an AC-DC changer.

In order to achieve the above technical problem, the present invention provides a light emitting diode lamp equipped with a light emitting diode chip having light emitting cells connected in series. The light emitting diode lamp includes a top lead and a first lead having a pin-shaped leg extending from the top portion. A second lead is spaced apart from the first lead. The second lead has a fin-shaped leg corresponding to the first lead. On the other hand, a light emitting diode chip having a light emitting cell array connected in series is mounted on the top of the first lead. Bonding wires electrically connect the LED chip to the first lead and the second lead, respectively. In addition, a sealing resin seals a portion of the top portion of the first lead, the light emitting diode chip, and the second lead. According to the present invention, it is possible to provide a light emitting diode lamp having a light emitting diode chip having an array of light emitting cells connected in series, which can be driven using an AC power source without an AC-DC converter.

Here, the "light emitting cell" means a fine light emitting diode formed in a single light emitting diode chip. In general, the light emitting diode chip has only one light emitting diode, but in the present invention, the light emitting diode chip has a plurality of light emitting cells.

 The top portion of the first lead may have a cavity, and the light emitting diode chip is mounted in the cavity. Sidewalls of the cavity may form reflective surfaces to reflect light emitted from the light emitting diode chip into a predetermined direction angle. As a result, the light emission luminance of the light emitting diode lamp is increased within the predetermined direction angle.

On the other hand, the light emitting diode chip includes a substrate and light emitting cells electrically insulated from the substrate and spaced apart from each other on the substrate.

In one embodiment of the present invention, the light emitting diode chip may further include wirings for electrically connecting the light emitting cells in series.

In another embodiment of the present invention, a submount may be interposed between the light emitting diode chip and the top portion. The submount may have electrode patterns corresponding to the light emitting cells, and the light emitting cells may be connected in series by the electrode patterns.

Meanwhile, a molding member may be formed in the cavity. The molding member covers an upper portion of the light emitting diode chip. The moldings may also contain phosphors. The phosphor converts a portion of the light emitted from the light emitting cells. Accordingly, a white light emitting diode lamp may be implemented using light emitting cells emitting blue light.

Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention; The following embodiments are provided as examples to sufficiently convey the spirit of the present invention to those skilled in the art. Accordingly, the invention is not limited to the embodiments described below and may be embodied in other forms. And, in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

1 is a cross-sectional view illustrating a light emitting diode lamp (hereinafter referred to as an LED lamp) according to an embodiment of the present invention.

Referring to FIG. 1, the LED lamp includes a top portion 3 and a first lead having a pin type leg 1a extending from the top portion 3. A second lead having fin-shaped legs 1b is disposed to correspond to the first lead spaced apart from the first lead.

The light emitting diode chip 5 is mounted on the top portion 3 of the first lead. The top portion 3 of the first lead may have a recessed cavity, and the light emitting diode chip 5 may be mounted in the cavity. The side wall of the cavity may form an inclined reflecting surface to reflect the light emitted from the light emitting diode chip 5 in a predetermined direction.

The light emitting diode chip 5 may be made of a compound semiconductor of (Al, In, Ga) N, and is selected to emit light of a desired wavelength. For example, the light emitting diode chip 5 may be a compound semiconductor emitting blue light.

The light emitting diode chip 5 has a light emitting cell array connected in series. A light emitting diode chip 5 having an array of light emitting cell arrays connected in series for use in the embodiments of the present invention will be described in detail with reference to FIGS. 2A to 4C.

 The light emitting diode chip 5 is electrically connected to the first and second leads through bonding wires 13a and 13b. To this end, the LED chip 5 has two bonding pads electrically connected to both ends of the LED cell array connected in series.

Meanwhile, a submount (not shown) in which an electrode pattern is formed may be interposed between the light emitting diode chip 5 and the top portion 3 of the first lead. The bonding wires 13a and 13b may connect the submount and the first and second leads, and the light emitting cells may be connected in series by the electrode patterns. This will be described later with reference to FIGS. 4A to 4C.

On the other hand, the sealing resin 11 seals the top portion 3 of the first lead, the light emitting diode chip 5 and a part of the second lead. The sealing resin 11 is generally molded using a transparent resin. The sealing resin 11 may have a lens function for protecting the light emitting diode chip 5 and refracting the light emitted from the light emitting diode chip 5 into a predetermined direction angle.

In addition, a molding member 9 may be formed in the cavity to cover the upper portion of the light emitting diode chip 5. The molding member 9 may be formed of an epoxy resin or a silicone resin.

On the other hand, the molding resin 9 may contain a phosphor. The phosphor converts the wavelength of light emitted from the light emitting diode chip 5 to emit light of the required wavelength. For example, when the LED chip 5 emits blue light, the molding member 9 may include a phosphor for converting blue light into yellow light or converting blue light into green light and red light. As a result, white light is emitted from the light emitting diode lamp to the outside.

The pin-shaped legs 1a and 1b may be inserted into and mounted on a printed circuit board (PCB, not shown), and a current is supplied to the LED lamp through the printed circuit board so that the light emitting diode chip 5 may be optically mounted. Will emit. On the other hand, the pin-shaped legs (1a, 1b) can be directly connected to the socket of the household AC power source, and thus can be used at home for general lighting.

Hereinafter, a light emitting diode chip having light emitting cells connected in series for use in embodiments of the present invention will be described in detail.

2A and 2B are circuit diagrams for describing an operating principle of a light emitting diode chip having a plurality of light emitting cells according to embodiments of the present invention.

Referring to FIG. 2A, light emitting cells 31a, 31b, and 31c are connected in series to form a first series light emitting cell array 31, and other light emitting cells 33a, 33b, and 33c are connected in series to each other. Two series light emitting cell arrays 33 are formed. Here, the "serial light emitting cell array" means an array in which a plurality of light emitting cells are connected in series.

Both ends of the first and second series arrays 31 and 33 are connected to an AC power source 35 and a ground, respectively. The first and second series arrays are connected in parallel between the AC power source 35 and ground. That is, both ends of the first and second series arrays are electrically connected to each other.

Meanwhile, the first and second series arrays 31 and 33 are disposed to drive the light emitting cells by currents flowing in opposite directions. That is, as shown, the anode and cathode of the light emitting cells included in the first series array 31 and the anode and the cathode of the light emitting cells included in the second series array 33 are opposite to each other. Is placed.

Therefore, when the AC power source 35 is in a positive phase, the light emitting cells included in the first series array 31 are turned on to emit light, and the light emitting cells included in the second series array 33 are turned off. On the contrary, when the AC power source 35 is in a negative phase, the light emitting cells included in the first series array 31 are turned off, and the light emitting cells included in the second series array 33 are turned on.

As a result, the first and second series arrays 31 and 33 alternately turn on and off by AC power, so that the light emitting diode chip including the first and second series arrays is continuously lighted. Emits.

The LED chips consisting of one LED may be connected and driven using an AC power source as in the circuit of FIG. 2A, but the space occupied by the LEDs increases. However, the light emitting diode chip of the present invention can be driven by connecting an AC power source to one chip, so that the occupied space does not increase.

Meanwhile, the circuit of FIG. 2A is configured such that both ends of the first and second series arrays are connected to the AC power source 35 and the ground, respectively, but the both ends may be connected to both terminals of the AC power source. In addition, the first and second series arrays are each composed of three light emitting cells, but this is only an example to help explain, and the number of light emitting cells may be further increased as necessary. In addition, the number of the serial arrays may be further increased.

Referring to FIG. 2B, the light emitting cells 41a, 41b, 41c, 41d, 41e, and 41f constitute a series light emitting cell array 41. Meanwhile, a bridge rectifier including diode cells D1, D2, D3, and D4 is disposed between the AC power source 45, the series light emitting cell array 41, and the ground and the series light emitting cell array 41. The diode cells D1, D2, D3, and D4 may have the same structure as the light emitting cells, but are not limited thereto and may not emit light. An anode terminal of the series light emitting cell array 41 is connected to a node between the diode cells D1 and D2, and a cathode terminal is connected to a node between diode cells D3 and D4. Meanwhile, the terminal of the AC power supply 45 is connected to a node between the diode cells D1 and D4, and the ground is connected to a node between the diode cells D2 and D3.

When the AC power supply 45 has a positive phase, the diode cells D1 and D3 of the bridge rectifier are turned on and the diode cells D2 and D4 are turned off. Thus, current flows to the ground via the diode cell D1 of the bridge rectifier, the series light emitting cell array 41 and the diode cell D3 of the bridge rectifier.

On the other hand, when the AC power supply 45 has a negative phase, the diode cells D1 and D3 of the bridge rectifier are turned off and the diode cells D2 and D4 are turned on. Thus, current flows through the diode cell D2 of the bridge rectifier, the series light emitting cell array 41 and the diode cell D4 of the bridge rectifier to the AC power source.

As a result, by connecting the bridge rectifier to the series light emitting cell array 41, it is possible to continuously drive the series light emitting cell array 41 using the AC power supply 45. Here, although the terminals of the bridge rectifier are configured to be connected to the AC power source 45 and the ground, the terminals of the bridge rectifier may be configured to be connected to both terminals of the AC power source. Meanwhile, as the series light emitting cell array 41 is driven using an AC power source, ripple may occur, and an RC filter may be connected to prevent the ripple.

According to the present embodiment, one series of light emitting cell arrays may be electrically connected to and driven by an AC power source, and the use efficiency of the light emitting cells may be improved as compared to the light emitting diode chip of FIG. 2A.

The light emitting cells described with reference to FIG. 2A or 2B are arranged in a single light emitting diode chip. Hereinafter, a light emitting diode chip having light emitting cells connected in series will be described in detail.

3A and 3B are cross-sectional views illustrating a light emitting diode chip having light emitting cells connected in series according to an aspect of the present invention.

3A and 3B, a plurality of light emitting cells 100-1 are spaced apart from each other on a substrate 20 and connected in series by wirings 80-1 to 80-n. To 100-n). That is, in the LED chip, the N-type semiconductor layer 40 and the P-type semiconductor layer 60 of the adjacent light emitting cells 100-1 to 100-n are electrically connected to each other, and the light emitting cells 100-n at one end thereof are electrically connected. A plurality of N-type pads 95 are formed on the N-type semiconductor layer 40, and the P-type pads 60 are formed on the P-type semiconductor layer 60 of the light emitting cell 100-1 at the other end. It includes a light emitting cell 100.

The N-type semiconductor layer 40 and the P-type semiconductor layer 60 of the adjacent light emitting cells 100-1 to 100-n are electrically connected through the metal wiring 80. In addition, in the present invention, it is effective to connect the light emitting cells 100-1 to 100-n in series to form the number of voltages capable of AC driving. According to the present invention, the number of light emitting cells 100 connected in series may vary depending on a voltage / current for driving a single light emitting cell 100 and an AC driving voltage applied to a light emitting diode chip for illumination. For example, in the 220V AC driving, 66 to 67 unit light emitting cells of 3.3V are connected in series to a constant driving current to manufacture a light emitting diode chip. In addition, in the 110V AC driving, 33 to 34 3.3V unit light emitting cells are connected in series to a constant driving current to manufacture a light emitting diode chip.

For example, as shown in FIG. 3A, in the LED chip in which the first to nth light emitting cells 100-1 to 100-n are connected in series, the P-type semiconductor layer of the first light emitting cell 100-1 ( The P-type pad 90 is formed on the 60, and the N-type semiconductor layer 40 of the first light emitting cell 100-1 and the P-type semiconductor layer 60 of the second light emitting cell 100-2 are formed. It is connected via the 1st wiring 80-1. In addition, the N-type semiconductor layer 40 of the third light emitting cell 100-3 and the P-type semiconductor layer (not shown) of the fourth light emitting cell (not shown) are connected through the second wiring 80-2. . The n-type semiconductor layer (not shown) of the n-th light emitting cell (not shown) and the P-type semiconductor layer 60 of the n-th light emitting cell 100-n-1 are connected to the n-1 wiring ( N-type semiconductor layer 40 of n-th light emitting cell 100-n-1 and P-type semiconductor layer 60 of n-th light emitting cell 100-n, which are connected via 80-n-1; ) Is connected via the n-th wiring 80-n. In addition, an N-type pad 95 is formed in the N-type semiconductor layer 40 of the n-th light emitting cell 100-n.

The substrate 20 of the present invention may be a substrate capable of manufacturing a plurality of light emitting diode chips. 3A and 3B show cut regions for individually cutting the plurality of light emitting diode chips.

In addition, the LED chip described above may have rectifying diode cells (D1 to D4 in FIG. 2B) for rectifying an external AC voltage. The diode cells are arranged in the form of a rectifying bridge. Nodes of the diode cells may be connected to the N-type pad and the P-type pad of the light emitting cell, respectively. The diode cells may be light emitting cells having the same structure as the light emitting cells.

Hereinafter, a method of manufacturing a light emitting diode chip having light emitting cells connected in series will be described.

The buffer layer 30, the N-type semiconductor layer 40, the active layer 50, and the P-type semiconductor layer 60 are sequentially grown on the substrate 20. The transparent electrode layer 70 may be further formed on the P-type semiconductor layer 60. The substrate 20 may include sapphire (Al ₂ O ₃ ), silicon carbide (SiC), zinc oxide (ZnO), silicon (Si), gallium arsenide (GaAs), gallium phosphide (GaP) 0, and lithium-alumina (LiAl _2). O _{3 )} , boron nitride (BN), aluminum nitride (AlN), or gallium nitride (GaN) substrate, and may be selected according to the material of the semiconductor layer to be formed on the substrate 20. In the case of using a gallium nitride based semiconductor layer, a sapphire or silicon carbide (SiC) substrate is preferable.

The buffer layer 30 is a layer for reducing lattice mismatch between the substrate 20 and subsequent layers during crystal growth, and may be, for example, a gallium nitride layer (GaN). When the SiC substrate is a conductive substrate, the buffer layer 30 may be formed of an insulating layer, and may be formed of semi-insulating GaN. The N-type semiconductor layer 40 is a layer in which electrons are generated, and is formed of an N-type compound semiconductor layer and an N-type cladding layer. In this case, the N-type compound semiconductor layer may use GaN doped with N-type impurities. The P-type semiconductor layer 60 is a layer in which holes are formed, and is formed of a P-type cladding layer and a P-type compound semiconductor layer. In this case, AlGaN doped with P-type impurities may be used for the P-type compound semiconductor layer.

The active layer 50 is a region where a predetermined band gap and a quantum well are made to recombine electrons and holes, and may include an InGaN layer. In addition, according to the kind of material constituting the active layer 50, the emission wavelength generated by electron and hole coupling is changed. Therefore, it is preferable to adjust the semiconductor material contained in the active layer 50 according to the target wavelength.

Subsequently, a portion of the N-type semiconductor layer 40 is exposed by patterning the P-type semiconductor layer 60 and the active layers 50 using a photolithography and an etching process. In addition, a portion of the exposed N-type semiconductor layer 40 is removed to electrically insulate each of the light emitting cells 100. In this case, as shown in FIG. 3A, the exposed surface of the substrate 20 may be exposed by removing the exposed buffer layer 30, and as shown in FIG. 3B, the etching may be stopped in the buffer layer 30. When the buffer layer 30 is conductive, the exposed buffer layer 30 is removed to electrically separate the light emitting cells.

Diode cells for rectifying bridges may also be formed using the same method as the above-described manufacturing process. Of course, it is also possible to form diode cells for rectifying bridge separately using a conventional semiconductor manufacturing process.

Thereafter, the N-type semiconductor layer 40 and the P-type semiconductor layer 60 of the light emitting cells 100-1 to 100-n which are adjacent to each other through a predetermined bridge process or a step-cover process, or the like. ) To form conductive wires 80-1 to 80-n electrically connected thereto. The conductive wires 80-1 to 80-n are formed using a conductive material, but are formed using a silicon compound doped with a metal or an impurity.

The bridge process is also called an air bridge process, and this process will be briefly described. First, after forming a photoresist film on the substrate on which the light emitting cells are formed, a first photoresist pattern having an opening for exposing the exposed N-type semiconductor layer and the electrode layer on the P-type semiconductor layer is formed by using an exposure technique. Thereafter, the metal material layer is thinly formed by using an electron beam evaporation technique. The metal material layer is formed on the entire surface of the opening and the photoresist pattern. Subsequently, a second photoresist pattern is formed on the photoresist pattern to expose regions between adjacent light emitting cells to be connected and the metal layer of the openings. Thereafter, gold and the like are formed using a plating technique, and then the first and second photoresist patterns are removed. As a result, only wirings connecting adjacent light emitting cells remain, and all other metal material layers and photoresist patterns are removed, so that the wirings connect the light emitting cells in a bridge form.

Meanwhile, the step cover process includes forming an insulating layer on a substrate having light emitting cells. The insulating layer is patterned using photolithography and etching techniques to form openings that expose the P-type semiconductor layer and the electrode layer on the N-type semiconductor layer. Subsequently, an electron beam deposition technique or the like is used to form a metal layer filling the opening and covering the insulating layer. Thereafter, the metal layer is patterned using photolithography and etching techniques to form interconnects that connect adjacent light emitting cells. Such a step cover process is possible in various modifications. Using the step cover process, the wiring is supported by the insulating layer, thereby increasing the reliability of the wiring.

Meanwhile, P-type pads 90 and N-type pads 95 are formed in the light emitting cells 100-1 and 100-n located at both ends, respectively, for electrical connection with the outside. The rectifying bridge diode cells may be connected to the P-type pad 90 and the N-type pad 95, respectively, and the bonding wires (19a and 19b of FIG. 4 or 5) may be connected to the P-type pad 90 and the N-type. The pads 95 may be connected to each other.

The manufacturing method of the light emitting diode chip of the present invention described above is only one embodiment, and is not limited thereto. Various processes and manufacturing methods may be changed or added according to the characteristics of the device and the convenience of the process.

For example, a plurality of vertical light emitting cells having a shape in which an N-type electrode, an N-type semiconductor layer, an active layer, a P-type semiconductor layer, and a P-type electrode are sequentially stacked are formed on a substrate, or light-emitting cells having such a structure are formed. Bonding is arranged on a substrate. Thereafter, the N-type electrode and the P-type electrode of adjacent light emitting cells may be connected by wires to connect a plurality of light emitting cells in series to manufacture a light emitting diode chip. Of course, the vertical light emitting cell may have various structures other than the structure limited to the above-described example. In addition, after forming a plurality of light emitting cells on a substrate, by bonding the light emitting cells on a separate host substrate, and separating the substrate using a laser, or by using a chemical mechanical polishing technique to remove on the host substrate It is also possible to form a plurality of light emitting cells. Thereafter, adjacent light emitting cells can be connected in series by wiring.

Each of the light emitting cells 100 includes an N-type semiconductor layer 40, an active layer 50, and a P-type semiconductor layer 60 that are sequentially stacked on the substrate 20, and the buffer layer 30 includes the substrate 20. ) And the light emitting cell 100. Each of the light emitting cells 100 includes a transparent electrode layer 70 formed on the P-type semiconductor layer 60. In addition, the vertical light emitting cell includes an N-type electrode disposed under the N-type semiconductor layer.

The N-type bonding pad and the P-type bonding pad are pads for electrically connecting the light emitting cell 100 to an external metal wiring or bonding wire, and may be formed in a stacked structure of Ti / Au. The bonding pads may be formed on the N-type semiconductor layer and the P-type semiconductor layer of all the light emitting cells. In addition, the transparent electrode layer 70 serves to uniformly transfer the voltage input through the P-type bonding pad to the P-type semiconductor layer 60.

4A to 4C are cross-sectional views illustrating a light emitting diode chip 1000 having light emitting cells connected in series according to another embodiment of the present invention. Here, the LED chip 1000 has flip chip type light emitting cells, and the LED chip 1000 is coupled to the submount 2000 and mounted on the top portion (3 in FIG. 1) of the first lead.

Referring to FIG. 4A, a plurality of flip chip type light emitting cells are arranged on a substrate 110 of the light emitting diode chip 1000. Each of the light emitting cells includes an N-type semiconductor layer 130 formed on the substrate 110, an active layer 140 formed on a portion of the N-type semiconductor layer 130, and a P-type semiconductor layer 150 formed on the active layer 140. ). Meanwhile, a buffer layer 120 may be interposed between the substrate 110 and the light emitting cells. In this case, in order to reduce the contact resistance of the P-type semiconductor layer 150, a separate P-type electrode layer 160 may be formed on the P-type semiconductor layer 150. The P-type electrode layer may be a transparent electrode layer, but does not need to be a transparent electrode layer. The light emitting diode chip 1000 may include a P-type metal bumper 170 formed on the P-type electrode layer 150 for bumping and an N-type metal formed on the N-type semiconductor layer 130 for bumping. It further includes a bumper 180. In addition, the P-type electrode layer 160 may further include a reflecting layer (not shown) having a reflectance of 10 to 100%. In addition, a separate ohmic metal layer may be further formed on the P-type semiconductor layer 150 to facilitate supply of current.

The substrate 110, the buffer layer 120, the N-type semiconductor layer 130, the active layer 140, and the P-type semiconductor layer 150 have the same substrate 20 and semiconductor as described with reference to FIGS. 3A and 3B. It may be formed in layers.

The sub-mount substrate 2000 includes a substrate 200 in which a plurality of N and P regions are defined, a dielectric film 210 formed on the surface of the substrate 200, and a plurality of adjacent N and P regions. The electrode pattern 230 is included. The apparatus may further include a P-type bonding pad 240 extending to a P region located at one edge and an N-type bonding pad 250 extending to an N region located at the other edge.

The N region refers to a region to which the N-type metal bumper 180 of the LED chip 1000 is to be connected, and the P region refers to a region to which the P-type metal bumper 170 of the LED chip 1000 is to be connected. do.

In this case, a substrate having excellent thermal conductivity is used as the substrate 200. For example, SiC, Si, germanium (Ge), silicon germanium (SiGe), AlN, or a metal substrate can be used. As the dielectric film 210, any dielectric material through which a current flows below 1 μm may be used. Of course, the present invention is not limited thereto, and an insulating material through which no current flows can be used. In addition, the dielectric film 210 may be formed in multiple layers. When the substrate is nonconductive, the dielectric film 210 may be omitted. As the dielectric film 210, silicon oxide (SiO ₂ ), magnesium oxide (MgO), or silicon nitride (SiN) may be used.

The electrode pattern 230, the N-type bonding pad 250, and the P-type bonding pad 240 may use a metal having excellent electrical conductivity.

Hereinafter, a method of manufacturing a submount substrate for a light emitting diode chip having flip chip type light emitting cells having the above-described configuration will be described.

The substrate 200 is formed in an uneven shape to define the N region and the P region. The N region and the P region may vary in width, height, and shape according to sizes of the N-type metal bumper 180 and the P-type metal bumper 170 of the LED chip 1000 to be bonded. . In this embodiment, the convex portion of the substrate 200 becomes the N region, and the recessed portion of the substrate becomes the P region A. The substrate 200 of this shape may be manufactured using a separate mold, or may be manufactured using a predetermined etching process. That is, after forming a mask exposing the P region on the substrate 200, a portion of the exposed substrate 200 is removed to form a recessed P region. Subsequently, removing the mask forms an N region protruding relatively to the recessed P region. In addition, the recessed P region may be formed through mechanical processing.

Thereafter, the dielectric film 210 is formed on the entire structure. In this case, when the conductive material is not used as the substrate 200, the dielectric film 210 may not be formed. In the case of using a metal substrate having excellent electrical conductivity to improve thermal conductivity, the dielectric film 210 may be formed to provide sufficient insulation.

Electrode patterns 230 are formed on the dielectric layer 210 to connect adjacent N and P regions in a pair. The electrode patterns 230 may be formed by screen printing, or after the electrode layer is deposited, the electrode patterns 230 may be formed by patterning using a photolithography and an etching process.

The P-type metal bumper 170 of the light emitting diode chip 1000 is bonded to the electrode pattern 230 on the P region, and the N-type metal bumper 180 is bonded to the electrode pattern 230 on the N region. The chip 1000 and the submount substrate 2000 are bonded. In this case, the light emitting cells of the LED chip 1000 are connected in series by the electrode patterns 230 to form an array of light emitting cells connected in series. P-type bonding pads 240 and N-type bonding pads 250 are positioned at both ends of the series-connected light emitting cell arrays, and are connected to bonding wires 13a and 13b of FIG. 1, respectively.

In this case, the metal bumps 170 and 180, the electrode patterns 230, and the bonding pads 240 and 250 may be bonded through various bonding methods. For example, the metal bumps 170 and 180 may be bonded using an eutectic method using a eutectic temperature. Can be.

In this case, the number of light-emitting cells connected in series may vary depending on the power source and power to be used, and may be formed in the same number as described with reference to FIGS. 3A and 3B.

Referring to FIG. 4B, instead of arranging a plurality of light emitting cells on the substrate 110 as shown in FIG. 4A, individual light emitting cells 100a to 100c may be separately bonded on the sub-mount substrate 2000. . In addition, in the light emitting diode chip 1000 of FIG. 4A, the substrate 110 may be separated using a laser, or the substrate 110 may be removed using a chemical mechanical polishing technique. At this time, the N-type metal bumper 170 and the P-type metal bumper 180 of the adjacent light emitting cells 100a to 100c are bonded to the electrode patterns 230 formed on the sub-mount substrate 2000 to electrically connect the light emitting cells. Are connected in series.

Referring to FIG. 4C, electrode patterns 230 are formed on the flat substrate 200 in which a plurality of N regions and P regions are defined to connect adjacent N regions A and P regions B, respectively. The light emitting diode chip 1000 may be mounted on the submount substrate 2000. That is, unlike FIG. 4A, the electrode patterns 230 are formed on the substrate 200 on which the predetermined pattern is not formed, and then the N-type metal bumpers 170 of the adjacent light emitting cells of the LED chip 1000 are formed. The P-type metal bumper 180 may be electrically connected.

In addition, the N-type and P-type metal bumpers 170 and 180 are not formed in the light emitting cells in the LED chip 1000, and the metals are formed in the N region B and the P region A on the sub-mount substrate 2000, respectively. Bumpers 170 and 180 may be formed. In this case, a predetermined metal electrode (not shown) may be further formed on the N-type and P-type semiconductor layers 130 and 150 to be bonded to the metal bumpers 170 and 180.

In addition, in the present invention, a separate bridge circuit may be configured in the light emitting diode chip 1000 for use in a home power source. In addition, two or more of the series-connected light emitting cell arrays may be formed so that they may be connected in parallel to be driven by a home power source.

According to embodiments of the present invention, by mounting a light emitting diode chip having light emitting cell arrays connected in series, it is possible to provide a light emitting diode lamp which can be driven using a domestic AC power supply without an AC-DC converter.

Claims (7)

A first lead having a top portion and a pin-shaped leg extending from the top portion; A second lead disposed spaced apart from the first lead and having a pin-shaped leg corresponding to the first lead; A light emitting diode chip mounted on the top portion and having a light emitting cell array connected in series; Bonding wires electrically connecting the light emitting diode chip to the first lead and the second lead, respectively; And A light emitting diode lamp comprising a sealing resin for sealing a portion of the top of the first lead, the light emitting diode chip and the second lead. The method according to claim 1, The top portion of the first lead has a cavity, the light emitting diode chip is mounted in the cavity. The method according to claim 2, The light emitting diode chip Board; And And a light emitting cell electrically insulated from the substrate and spaced apart from each other on the substrate.  The method according to claim 3, The LED chip includes a plurality of wirings for connecting the light emitting cells in series.  The method according to claim 3, A sub-mount interposed between the light emitting diode chip and the top portion of the first lead and having electrode patterns corresponding to the light emitting cells; And the light emitting cells are connected in series by the electrode patterns. A first lead having a top having a cavity and a pin-shaped leg extending from the top; A second lead disposed spaced apart from the first lead and having a pin-shaped leg corresponding to the first lead; A submount mounted on the top part and having electrode patterns; Light emitting cells bonded to the electrode patterns of the submount and connected in series; Bonding wires electrically connecting the submount to the first lead and the second lead, respectively; And A light emitting diode lamp comprising a sealing resin for sealing a part of the top of the first lead, the light emitting cells and the second lead.  The method according to any one of claims 2 to 6, And a molding member formed in the cavity and covering the upper portions of the light emitting cells, and a phosphor contained in the molding member.

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