KR20060088797A - Spin qubit-based quantum computing logic gate - Google Patents

Abstract

The present invention relates to a spin qubit quantum computational logic gate, and a method of manufacturing the present invention for achieving the above object is to connect a source and a drain to a top-Si layer of a silicon on insulator (SOI) substrate. Forming a conducting channel and a plurality of side gates perpendicular to the conductive channel in which the double quantum dots of a line width and length of which are several tens of nanometers or less are formed on the same plane or on the gate oxide layer at several tens of nanometers or less, and remaining portions other than the double quantum dots. Doping, followed by forming a gate oxide film or forming an interlayer insulating film corresponding to the proposed structure, forming a control gate inducing a two-dimensional electron gas layer in the conductive channel, and a conventional metallization process. will be. The key operation of the device, completed through this structure and fabrication method, is characterized by the spin ground state and excited spin intrinsic of the electrons in the system consisting of the spin of two electrons in two coupled double quantum points under magnetic or electric field pulses. It is a device designed to perform quantum computation as desired using entanglement between states and singlet-triplet transition.

SOI, single electron transistor, quantum dot, quantum computing, Spin, Spintronics, Qubit, Quantum Gate, Quantum Computation, Nano Device

Description

Spin Qubit-based Quantum Computing Logic Gate

1 is a perspective view showing a spin qubit quantum computational logic gate (structure 1) according to the present invention,

2 is a perspective view of a gate oxide film formed after formation of conductive channels and side gates of a spin qubit quantum logic gate silicon nano device according to the present invention (structure 1),

3 is a perspective view showing (Structure 2) of a spin qubit quantum logic gate according to the present invention;

4 is a perspective view of a gate oxide film stacked after formation of conductive channels and side gates of the spin qubit quantum logic gate silicon nano device according to the present invention (structure 2),

5 is a perspective view after the formation of side gates across the conduction channel on the gate oxide film of the spin qubit quantum logic gate silicon nanodevice of the present invention (structure 2) is completed.

6 is a conceptual diagram illustrating a double quantum dot that is the core of a spin qubit quantum logic gate silicon nano device according to the present invention.

7 is a conceptual diagram illustrating a charge distribution in which an orbital part becomes odd when a spin part of two electron wave functions in a double quantum point is singlet.

8 is a conceptual diagram illustrating a charge distribution in which a corresponding orbital part is even when a spin part of two electron wave functions in a double quantum point is triplet.

Explanation of symbols for the main parts of the drawings

1: silicon substrate

2: silicon oxide film

3: source

4: drain

5: conduction channel

6: side gate 1

7: Side gate 3 (control gate, structure 1)

8: side gate 4

9: side gate 2 (probe gate, structure 1)

10: control gate

11: quantum dot 1

12: QD2

13: gate oxide

14: side gate 5

15: Side gate 6 (control gate, structure 2)

16: side gate 7

17: Side gate 8 (probe gate, structure 2)

18: interlayer insulating film

Quantum computation is a set of techniques that process information in a quantum way that is fundamentally different from classical logic gates to date, using uncertainty, overlap, entanglement, and interference, which are intrinsic features of quantum mechanics. Means.

As the size of a semiconductor device becomes smaller and smaller, it is possible to transfer information that is impossible to eavesdropping to, or to a classic computer, that is, a general-purpose computer. This means that we can open up a whole new horizon of information processing technology, such as solving the problem of multi-factor prime factorization that could not be solved by the computational capability of.

As the basis of the operation of the computers we are using, we can describe it as Turing machine, which is a mathematical ideal model (A. Turing, Proc. Lond. Math. Soc. 42, 230 (1937)) All operations performed are irreversible. An irreversible operation inevitably generates heat. The theoretical beginning of quantum computation was Beneoff (CH Bennett, IBM J. Res. Dev. 6, 525), who proposed a reversible Turing machine capable of performing the same operation as an irreversible Turing machine in 1973. Benioff pointed out that reversible computation can be done with quantum systems that are time-reversible, and Richard Pineman introduced the concept of quantum computers for the first time in 1982. Since then, a specific quantum turing machine model was proposed by Deutsch three years later. But quantum computing became the decisive factor in the 1994 implementation of the prime factorization method, published by Bell's Sho in 1994, and the 1997 implementation of quantum computers by nuclear magnetic resonance. The prime factorization method has the potential to break all modern ciphers in use around the world, along with data retrieval solutions published by Grover of the same institute three years later. Similar to the show's algorithm, Gruber's data retrieval method finds one from N data, which can be done in ( N ) ^1/2 times as opposed to a conventional computer requiring N / 2 computations. For example, if you find a 56-bit cryptographic key randomly without difficult factorization, it takes about 1000 years for a conventional computer but about 4 minutes for a quantum computer. Representative studies to date are nuclear magnetic resonance quantum computers using nuclear magnetic resonance, which has a relatively long coherence time and all kinds of experimental techniques have been developed. However, it has a fatal flaw that scalability is impossible. Recently, methods using quantum dots, resonator cavities QED, Josephson devices, and the like have been proposed.

To this end, the technology to which the present invention is intended is based on the spin of two electrons in a coupled double quantum dot to implement a conditional NOT double quantum bit as well as a single quantum bit operator which is essential for general purpose gate implementation in quantum operation. To present the necessary structure and manufacturing method. In addition, the implementation of quantum gate is proposed a method capable of high-integrated mass production without the drastic change of the existing production process compared to the nuclear magnetic resonance method or other methods designed so far by using CMOS technology that is widely used today.

According to the present invention, the following technical achievements are essential for the development of a large capacity, high-speed quantum parallel processing, and a highly integrated spin qubit quantum gate. First, the overall length of the conduction channel, including the multiple side gates involved in the formation of the double quantum dot, the core of the device, should be made smaller than that when the spin coherence length of the electron is tens of nanometers. Based on the conditions, when applying the electron beam lithography method, the development of patterning method and development technique that can minimize the proximity effect caused by the interaction between the electron beam and the substrate at the patterning point, and secondly, the applied control gate and side gate It is essential to develop a structure and concept that can detect the variation of charge distribution (base state and excited state) according to the change of magnetic field of two electron wave functions in a properly coupled double quantum point. Selectively doping only the multiple side gates, sources, and drains except quantum dots to be formed Appropriate parameters and processes are essential for this.

The spin qubit quantum computational gate of the present invention is formed on the SOI substrate and is the same in the specific structure and core function of the device, but according to the process, the position and form of the side gates and the necessity to distinguish the difference between the substrates The description is divided into schemes (structure 1 and structure 2).

Structure 1:

A source 3 and a drain 4 are connected to a conductive channel 5 having a length and a line width of several tens of nanometers or less, respectively, on an upper layer silicon layer on the underlying silicon double oxide film 2 on the underlying silicon substrate 1. On the same plane, the double quantum dots 11 and 12 are applied to the conduction channel by the negative electrical repulsive force applied to the side gates 1 and 6 and the side gates 4 and 8 in the direction perpendicular to the conduction channel. After the gate oxide film is formed by a conventional method, and finally, the control gate 10 for inducing and controlling the two-dimensional electron gas layer is formed in the conductive channel, the spin qubit quantum computational logic gate of the present invention. The completion of is done.

Structure 2:

A source 3 and a drain 4 are connected to a conductive channel 5 having a length and a line width of several tens of nanometers or less, respectively, on an upper layer silicon layer on the underlying silicon double oxide film 2 on the underlying silicon substrate 1. The side gates 8 (17) are spaced apart by several tens of nanometers or less in a direction perpendicular to the conduction channel on the same plane. Then, a gate oxide film is formed, and then a doped polysilicon layer is laminated, followed by electron beam lithography and reactive ions. Etching forms side gates 5 (14), side gates 6 (15), and side gates 7 (16). Then, after forming an interlayer insulating film of a conventional method, finally, inducing a two-dimensional electron gas layer in a conducting channel and When the control gate 10 responsible for control is formed, the spin qubit quantum computational logic gate of the present invention is completed.

Referring to the accompanying drawings, a method for manufacturing a spin qubit quantum computational logic gate according to the present invention will be described in more detail below.

Structure 1:

The part of the SOI substrate used for fabricating the spin qubit quantum logic gate is a silicon of appropriate thickness.

First, a conventional align-key process is performed, followed by tens of nanometer intervals for the source (3), the drain (4) and the conduction channel (5) of several to several tens of nanoscales by electron-beam direct writing. After patterning the side gates 1 (6), side gates 2 (9), side gates 3 (7), and side gates 4 (8) in the vertical direction by electron beam lithography,

Reactive Ion Etching (RIE) is used to remove all remaining upper silicon.

Afterwards, the doping mask is patterned and developed using a negative resist or other possible methods to dope the remaining silicon layer except the center of the conductive channel where the double quantum dots 11 and 12 are formed. Doping process by parameter

Thereafter, a gate oxide film process of an appropriate thickness of several nanometers is performed (FIG. 2).

After the process, the control gate 10 is patterned to an appropriate size to cover two quantum dots by applying a conventional photolithography method, and then an etching process and a metallization process are performed by other suitable methods.

After the conventional CMOS process is completed, the spin qubit quantum computational logic gate of the present application is completed (Fig. 1).

Structure 2:

The part of the SOI substrate used for fabricating the spin qubit quantum logic gate is a silicon of appropriate thickness.

First, a conventional align-key process is performed, and then, in the vertical direction with respect to the source (3), the drain (4) and the conduction channel (5) of several to several tens of nanometers in width by electron-beam direct writing. After patterning the side gates 8 (17) spaced several tens of nanometers by electron beam lithography,

Reactive ion etching is used to remove all remaining upper silicon.

The doping mask is then patterned and developed by appropriate parameters in the center of the conducting channel with a negative resist or all other possible methods to dope the remaining silicon layer except the center of the conducting channel where the quantum dots 11 and 12 are formed. Use, doping process,

After that, a gate oxide film stacking process of an appropriate thickness of several nanometers is performed (FIG. 4).

After the above process, the doped polysilicon layer was laminated, and then the side gates 5 (14), 6 (15), and 7 (16) were patterned across the conduction channel using electron beam lithography, and then anisotropic reactive ion etching was performed. Conduct. (Figure 5)

After the interlayer insulating film is formed,

The control gate 10 is patterned to an appropriate size to cover two quantum dots by applying a conventional photolithography method, followed by etching and metallization by other suitable methods.

After the conventional CMOS process is completed, the spin qubit quantum computational logic gate of the present application is completed (Fig. 3).

The operation method of the spin qubit quantum logic gate completed by the above process is as follows.

First, the side gate 1 (6) and the side gate 4 (8) and the side gate 3 (7) of the structure 1 described above or the side gate 5 (14), the side gate 6 (15), the side gate 7 ( 16) Apply the appropriate negative voltage calculated in (Structure 2) to create the initial conditions to form two quantum dots 11 and 12 coupled to the tunnel junction and the appropriate magnitude, respectively. Thereafter, a positive voltage is applied to the control gate 10 to induce the two-dimensional electron gas layer to the conduction channel, and then the voltage of the control gate 10 is properly scanned, so that the total number of electrons in the double quantum dot is one for each quantum dot. Let the electrons go. The structural advantage of the device of the present invention is that it is possible to adjust the coupling constant between the double quantum point by applying an appropriate negative voltage to the side gate 3 (7) or side gate 6 (15).

After configuring the initial conditions, the voltage of the control gate is fixed in the second coulomb containment zone, the number of electrons in the double quantum dot is limited to two, and if the external magnetic field is changed, spin in the coupled double wave function of two electrons in the quantum dot The part responds to changes in the magnetic field. However, changes in the spin portion of these electrons are very difficult to detect, so only optical measurements are currently reported. In contrast, the device of the present application is that the overall characteristic of the two-electron wavefunction in the coupled double quantum point is based on Pauli's exclusion principle, and the product of the spin part and the orbital part of each electron is anti-symmetric. Note that if the spin-entanglement state of two electrons in a double quantum dot is singlet, the orbital part of the wave function exhibits odds, so the charge distribution of the electrons is two electrons, one for each quantum dot. It is separated and shows a node in the center (Fig. 7). On the other hand, when the intertwined state of the spin is triplet, the orbital part of the wave function exhibits even characteristics, so that the charge distribution of electrons is distributed in the central part of the double quantum point (Fig. 8). Based on these physical phenomena, the difference in the charge distribution between even and odd due to the change of the magnetic field of the two-electron wave function in the quantum dot is determined by the adjacent side gate 2 (9) (structure 1, FIG. 1) or side gate 8 (17) (structure 2). , 3) causes a voltage change. Using the RF-SET or QPC developed previously, it is possible to indirectly determine the spin intrinsic state of the two electrons in the double quantum point. Subsequently, the external magnetic field at the point where a sudden change in voltage occurs at the side gate 2 and side gate 8 that acts as a probe in the process of scanning the external magnetic field B _EX (External Magnetic Field) is a singlet of two electrons in the quantum dot. It corresponds to the transition magnetic field (B _T ) where a triplet transition occurs. Now, an external magnetic field was fixed to B _EX to B _T, and then, ESR (Electron Spin Resonance) method and other available methods applied in perpendicular to the quantum dot the local magnetic field pulses of the frequency f in the vicinity of the B _T jugeona or side control gate 3 (7) (Structure 1, Fig. 1) and the side gate 6 (15) (Structure 2, Fig. 3) are applied to the electric field pulse having a size corresponding to the transition point, spin singlet-triplet in the spin entanglement state of the two electrons in the quantum dot Energy resonance of the liver occurs, causing periodic vibrations between the two levels (Rabi vibration). These vibrations can be measured by the side gate 2 (probe role, structure 1) and the side gate 8 (17, probe role, structure 2), respectively.

The effect expected by the completion of the spin qubit quantum computational logic gate of the present invention is, firstly, in the manufacturing method, following the conventional CMOS process, not only to facilitate the large-scale integration of the quantum gate device, In the operation method, spin qubit, which is one of the representative methods of quantum gate operation using quantum dots, can be implemented. Third, multi-quantum bit operation may be further facilitated by increasing the number of multi-side gates as necessary and having flexibility and scalability for proper placement. Therefore, based on this, the expansion of prime factorization by Shaw's algorithm and data retrieval by Guru's method is incomparably superior to other classical computational structures. In addition, due to the fundamental solution of the security problems that can occur during the transmission of various information derived from this and the ability of multi-bit cryptography, there are many studies in advanced countries in terms of national security. Therefore, the actual implementation of this spin qubit quantum computational logic gate is of such substantial importance that it can be a crossroad of national security beyond the effect of the invention.

Claims (11)

In Structure 1 of the presently applied spin qubit quantum logic gate, Side gate 1, side gate 2, and side gate 3 and side gate 4 are located on the same upper layer silicon plane at a distance of several tens of nanometers perpendicular to the center of the conductive channel connecting the source and the drain to the upper silicon layer of the SOI substrate. A spin qubit quantum computational logic gate, characterized in that a conventional control gate is located on the gate oxide film formed at In the structure 2 of the spin qubit quantum computational logic gate of the present application, The side gate 8 is positioned at a distance of several tens of nanometers in a vertical direction to the center portion of the conductive channel connecting the source and the drain to the upper silicon layer of the SOI substrate, and then the side gates 5, side gate 6, and side are formed on the formed gate oxide. A spin qubit quantum computational logic gate having a structure in which a gate 7 is positioned and a conventional control gate is positioned on the interlayer dielectric layer; In the functions and roles of the side gate 1, side gate 4 and side gate 5, side gate 7, Appropriate negative voltages are applied to the side gates 1, 4, 5, and 7, forming quantum dots in the conduction channel, and forming the same tunnel barrier at the junction of the double quantum dots with the source and drain and applying the same potential Spin qubit quantum logic gate, characterized in that the implementation of two quantum dots of the size, In the functions and roles of the side gates 3 and 6, Spin qubit quantum computational logic gate, characterized in that the coupling constant between quantum dot 1 and quantum dot 2 can be adjusted by applying an appropriate negative voltage, In the functions and roles of Side Gate 2 and Side Gate 8, The change of the two electron spin exchange J in the double quantum point due to the change of the external magnetic field causes the difference in the ultrafine charge distribution between even and odd due to the antisymmetrical characteristic of the two electron wave function in the double quantum point. Spin qubit quantum computational logic gates, characterized by detecting abrupt voltage changes between 8 and the double quantum point in all other possible ways, In addition to the functions of the side gates 2 and 8 of the claim 7, Ultrafine charge distribution change between even and odd of the two electron wave functions in the double quantum point is detected using RF-SET or QPC and all possible charge sensing devices, and added to side gates 2 and 8 Qubit quantum logic gate, In the core operation of the spin qubit quantum computer gate, After fixing the external magnetic field B _EX to the transition magnetic field B _T , a double quantum dot is applied by applying a local magnetic field pulse of frequency f perpendicular to the quantum dots or by applying electric field pulses corresponding to single-triplet transitions to the side gates 3 and 6. Spin qubit quantum logic gate, characterized in that the spin entanglement state of the two electrons cause a triplet or reverse transition in the spinsinglet, All possible spin qubit quantum computational logic gate structures that maintain the device structure in claims 1 and 3, but extend to multiple quantum bits by increasing the number of side gates or by varying the arrangement. The method according to claim 2 and 4, The ultra fine pattern refers to a spin qubit quantum computational logic gate comprising an electron beam direct drawing method and a self-assembly method or any other possible method, In claim 5 and 6, Spin gatebit quantum computational logic gate, characterized in that the side gates 1 and 3, 4 and the side gates 5 and 6, 7 are each independently adjustable. A spin qubit quantum logic gate comprising: silicon, GaAs and all other possible materials in the material constituting the spin qubit quantum gate of the present application.

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