KR20060078238A - Method of repairing and liquid crystal display device using thereof - Google Patents

Abstract

In the repair method and the liquid crystal display device using the same, a dummy pattern is formed between the gate line and the storage electrode to connect the gate line and the storage electrode through the dummy pattern in the event of an open defect of the gate line. (Iii) a gate electrode and a gate line formed on a substrate to reduce repair defects generated in the repair process; A first insulating film formed on the substrate; A switching element formed on the substrate, the switching element comprising a source electrode, a drain electrode, and a channel layer; A dummy pattern formed on the gate line and repaired when a disconnection defect occurs in the gate line; A second insulating film formed on the substrate; And a pixel electrode formed on the substrate and partially overlapping the front gate line.

Description

Repair method and liquid crystal display device using the same {METHOD OF REPAIRING AND LIQUID CRYSTAL DISPLAY DEVICE USING THEREOF}

1 is an exploded perspective view schematically illustrating a structure of a general liquid crystal display device.

2 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention.

3A to 3G are cross-sectional views sequentially illustrating a manufacturing process along the line II-II ′ of the array substrate shown in FIG. 2.

4A and 4B are cross-sectional views schematically illustrating a repair method for disconnection of a gate line according to an exemplary embodiment of the present invention.

** Explanation of symbols for main parts of drawings **

110: array substrate 116n-1,116n: gate line

117m: Data line 121: Gate electrode

122 source electrode 123 drain electrode

118: pixel electrode 118 ': storage electrode

160: welding area 170: dummy pattern

The present invention relates to a repair method and a liquid crystal display device to which the same is applied, and more particularly, a repair method for reducing a repair defect generated in the dark ignition process by ensuring a dark ignition repair performed when a gate line disconnection fault occurs. The present invention relates to a liquid crystal display device employing the same.

Recently, with increasing interest in information display and increasing demand for using a portable information carrier, a lightweight flat panel display (FPD), which replaces a conventional display device, a cathode ray tube (CRT), is used. The research and commercialization of Korea is focused on. In particular, the liquid crystal display (LCD) of the flat panel display device is an image representing the image using the optical anisotropy of the liquid crystal, is excellent in resolution, color display and image quality, and is actively applied to notebooks or desktop monitors have.

In general, a liquid crystal display device displays a desired image by individually supplying data signals according to image information to liquid crystal cells arranged in a matrix form to adjust a light transmittance of the liquid crystal cells. to be.

Hereinafter, a liquid crystal display will be described in detail with reference to FIG. 1.

1 is an exploded perspective view schematically illustrating a structure of a general liquid crystal display device.

As shown in the figure, the liquid crystal display device is largely a color filter substrate 5, which is a first substrate, an array substrate 10, which is a second substrate, and the color filter substrate 5, and an array substrate. It consists of a liquid crystal layer 40 formed between (10).

The color filter substrate 5 includes a color filter C composed of a sub color filter 7 for implementing colors of red (R), green (G), and blue (B), and the sub A black matrix 6 that separates the color filters 7 and blocks light passing through the liquid crystal layer 40, and a transparent common electrode 8 that applies a voltage to the liquid crystal layer 40. consist of.

In the array substrate 10, gate lines 16 and data lines 17 are formed on the substrate 10 to be vertically and horizontally defined to define the pixel region P. In this case, a thin film transistor T, which is a switching element, is formed in an intersection region of the gate line 16 and the data line 17, and a pixel electrode 18 is formed in each pixel region P.

The pixel region P is a sub pixel corresponding to one sub color filter 7 of the color filter substrate 5. The color image is a sub-color filter 7 of the red, green, and blue colors. It is obtained by combining. That is, three subpixels of red, green, and blue are gathered to form one pixel, and the thin film transistor T is connected to the red and green subpixels, respectively.

The manufacturing process of the liquid crystal display device configured as described above can be broadly classified into an array process of forming a switching element on an array substrate and a color filter process of forming a color filter on a color filter substrate. The array substrate and the color filter substrate fabricated through the process are finally bonded to each other through a cell process to complete a liquid crystal display panel.

The cell process has almost no repeated process compared to the array process or the color filter process, and the alignment film forming process, the cell gap forming process, the cell cutting process, and the liquid crystal injection process are largely used for the alignment of liquid crystal molecules. Can be divided into On the other hand, the liquid crystal display panel manufactured through such a process is selected through quality inspection, and after attaching polarizing plates to the outside of the liquid crystal display panel selected as good products, connecting the driving circuit, the liquid crystal display device is completed.

At this time, in the inspection process of the liquid crystal display device, a test pattern is displayed on the screen of the liquid crystal display panel, the presence or absence of defective pixels is detected, and when a defective pixel is found, a repair process is performed.

A defect of the liquid crystal display device may include short defects between adjacent defects and point defects such as color defects of pixels, bright spots (always on), dark spots (always off), and the like. , Line defects caused by the destruction of the switching element by open and static electricity. Such defects are revealed to the operator's eyes when the test patterns are floated on the completed liquid crystal display panel, and the operator detects the position of the defective pixel and then performs a repair process on the portion.

On the other hand, when a disconnection defect occurs in the gate line, the gate line flows through the pixel electrode to the next pixel by directly welding and connecting the gate line and the storage electrode that is a part of the upper pixel electrode to perform the dark spot repair process. It was.                         

However, since the storage electrode has a thin film thickness and a distance from the lower gate line, the storage electrode may not be well welded, and there may be a possibility that a later defect may occur even when the storage electrode is welded.

In particular, the disconnection defect of the gate line is a line defect, and there is an acceptable level according to the distribution, number, and type of the point defect, while the occurrence of any one of the line defects has no value as a product. Fatal.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a repair method that reduces a repair defect occurring in a dark ignition repair process performed when a disconnection defect occurs in a gate line.

Another object of the present invention is to provide a liquid crystal display device having improved yield and productivity by repairing a gate line disconnection defect using the repair process as described above.

Other objects and features of the present invention will be described in the configuration and claims of the invention described below.

In order to achieve the above object, the repair method of the present invention includes a plurality of gate lines including a gate electrode, a plurality of data lines including a source electrode, and formed in an intersection region of the gate line and the data line. A repair method of a liquid crystal display device comprising a pixel electrode overlapping a portion, a drain electrode electrically connected to the pixel electrode, and a channel layer forming a conductive channel between the source electrode and the drain electrode. Forming a dummy pattern between the pixel electrodes; And electrically connecting the disconnected left and right gate lines using the dummy pattern when a defect occurs in which a predetermined region of the gate line is disconnected.

In addition, the liquid crystal display of the present invention includes a gate electrode and a gate line formed on the substrate; A first insulating film formed on the substrate; A switching element formed on the substrate, the switching element comprising a source electrode, a drain electrode, and a channel layer; A dummy pattern formed on the gate line and repaired when a disconnection defect occurs in the gate line; A second insulating film formed on the substrate; And a pixel electrode formed on the substrate and partially overlapping the front gate line.

In addition, the manufacturing method of the liquid crystal display device of the present invention comprises the steps of forming a gate electrode and a gate line on the substrate; Forming a first insulating film on the substrate; Forming a switching element including a source electrode, a drain electrode, and a channel layer on the substrate, and forming a dummy pattern on the gate line; Forming a second insulating film on the substrate; And forming a pixel electrode on the substrate to partially overlap the front gate line.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the repair method according to the present invention and a liquid crystal display device applying the same.

2 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention.                     

In an actual liquid crystal display device, N gate lines and M data lines intersect and MxN pixels exist, but for the sake of simplicity, only the (m, n) -th pixel is shown in the drawing.

As shown in the drawing, the array substrate 110 includes an n-th gate line 116n to which a scan signal is applied from an external driving circuit (not shown), an m-th data line 117m to which an image signal is applied, and the A thin film transistor, which is a switching element formed at an intersection of the gate line 116n and the data line 117m, and a pixel electrode 118 connected to the thin film transistor.

The thin film transistor includes a gate electrode 121 connected to the gate line 116n, a source electrode 122 connected to the data line 117m, and a drain electrode 123 connected to the pixel electrode 118. In addition, the thin film transistor may include a first insulating film (not shown) for insulating the gate electrode 121 and the source / drain electrodes 122 and 123 and the source electrode by a gate voltage supplied to the gate electrode 121. A semiconductor layer (not shown) for forming a conductive channel between the 122 and the drain electrode 123. In this case, a second insulating film (not shown) having a contact hole 140 is formed on the drain electrode 123, and the drain electrode 123 and the pixel electrode 118 are electrically connected through the contact hole 140. To be.

In this case, a part of the pixel electrode 118 extends toward the n-1 th gate line, that is, the front gate line 116n-1, to form a storage electrode 118 ', and the storage electrode 118' is the front end. A portion of the gate line 116n-1 is overlapped to form a storage capacitor.

A dummy pattern 170 is formed between the storage electrode 118 'and the front gate line 116n-1 to repair the disconnection of the gate line. In this case, the dummy pattern 170 is formed by patterning the data wiring, that is, the conductive material for data wiring when forming the source / drain electrodes 122 and 123 and the data line 117m.

In this case, as shown in the drawing, when a line defect 190 in which a part of the front gate line 116n-1 is disconnected occurs, the storage electrode 118 'and the front gate line 116n-1 are separated. By making a double connection between the disconnected gate lines 116n-1 through the dummy pattern 170 formed therein, it is possible to ensure a repair and reduce the possibility of repair failure in the future.

For reference, reference numeral 160 denotes a welding region connecting the disconnected gate line 116n-1, and the upper storage electrode 118 'and the dummy pattern 170 are lower by welding by laser irradiation. The gate lines 116n-1 are electrically connected to each other.

Hereinafter, with reference to the drawings will be described in detail the manufacturing process of the array substrate and the repair method according to the generation of line defects.

3A to 3G are cross-sectional views sequentially illustrating a manufacturing process along line II-II ′ of the array substrate illustrated in FIG. 2, and FIGS. 4A and 4B are defective disconnection repairs of gate lines according to an exemplary embodiment of the present invention. A cross-sectional view schematically showing the method.

In this case, the embodiment has been described using four mask processes, that is, four mask processes for forming an array substrate using four photolithography processes, but the present invention is not limited thereto. It can be applied regardless.

The left side of the figure shows a manufacturing process of a thin film transistor as a switching element, and the right side of the figure shows a manufacturing process of an array substrate of a storage area in which a dummy pattern of the present invention is formed.

As shown in FIG. 3A, the gate electrode 121 and the gate line 116n-1 are formed on the substrate 110 made of a transparent insulating material such as glass.

In this case, the gate line is a front gate line 116n-1 for a corresponding pixel, that is, the (m, n) th pixel, and the gate electrode 121 and the front gate line 116n-1 are formed of a conductive material. After deposition on the front surface is formed by patterning through a photolithography process (first mask process).

3B, a first insulating film 115A, an amorphous silicon thin film 120, an n + amorphous silicon thin film 130, and a conductive film 150 are sequentially formed on the entire surface of the substrate 110.

Thereafter, as shown in FIG. 3C, a photosensitive film 180 made of a photosensitive material such as a photoresist is formed on the entire surface of the substrate 110 and the photosensitive film 180 is formed through a diffraction mask 190 including a slit region. Irradiate light.

In this case, the diffraction mask 190 is provided with a first transmission region (I) for transmitting all the light, a second transmission region (II) for transmitting only a part of the light, and a blocking region (III) for blocking all the irradiated light. Only the light transmitted through the mask 190 is irradiated to the photosensitive layer 180.

In the diffraction mask 190 used in the present embodiment, the second transmission region II has a slit structure, and the exposure amount irradiated through the second transmission region II transmits all the light. It becomes less than the exposure amount irradiated to. Therefore, when the photoresist layer 180 is coated and then exposed and developed using the mask 190 having the slit region II partially formed on the photoresist layer 180, the thickness of the photoresist layer remaining in the slit region II may be reduced. The thickness of the photosensitive film remaining in the first transmission region I or the blocking region III is different.

In this case, when the positive type photoresist is used as the photoresist layer 180, the thickness of the photoresist layer remaining in the slit region II is smaller than the thickness of the photoresist layer remaining in the blocking region III and the photoresist is negative. When the resin is used, the thickness of the photoresist film remaining in the slit region II is smaller than the thickness of the photoresist film remaining in the first transmission region I.

In this case, although a positive type photoresist is used in the present embodiment, the present invention is not limited thereto, and a negative type photoresist may be used.

Subsequently, after the photoresist film 180 exposed through the diffraction mask 190 is developed (second mask process), as shown in FIG. 3D, the blocking region III and the second transmission region II are formed. Photosensitive film patterns 180A to 180C having a predetermined thickness remain in areas where all the light is blocked or partially blocked by the light, and the photosensitive film is removed in the first transmission area I where all the light is irradiated to form a conductive film ( 150) The surface is exposed.                     

In this case, the first photoresist pattern 180A and the second photoresist pattern 180B formed through the blocking region III are formed thicker than the third photoresist pattern 180C formed in the second transmission region II.

That is, the first photoresist layer pattern 180A having the first thickness remains on the source / drain electrode region (that is, the region where the source electrode and the drain electrode are to be formed through the etching process to be described later) and the gate line on the right side of the figure. A second photoresist pattern 180B having a first thickness remains on a predetermined region of the upper portion 116n-1, and a third photoresist pattern 180C having a second thickness remains between the source electrode region and the drain electrode region. do.

Thereafter, the photoresist pattern 180A to 180C formed as described above is used as a mask to selectively remove the conductive layer 150, the n + amorphous silicon thin film 130, and the amorphous silicon thin film 120. 121. A channel layer 124 made of an amorphous silicon thin film is formed on the upper portion, and a dummy pattern 170 made of a conductive film is formed on the gate line 116n-1. In this case, a first n + amorphous silicon thin film pattern 130A made of n + amorphous silicon thin film 130A and a first conductive film pattern 150A made of conductive film are formed on the channel layer 124, and the dummy pattern 170 is formed. The second amorphous silicon thin film pattern 120B and the second n + amorphous silicon thin film pattern 130B patterned in the same shape as the dummy pattern 170 are formed on the lower portion.

In addition, when the ashing process is performed to completely remove the third photoresist pattern 180C of the second transmission region II, as illustrated in FIG. 3E, the first photoresist pattern 180A and the first photoresist pattern 180A of the blocking region may be removed. The second photoresist pattern 180B may be a fourth photoresist pattern 180A 'and a fifth photoresist pattern 180B' having a third thickness removed by the thickness of the third photoresist pattern 180C of the second transmission region II. Will remain.

Subsequently, when the remaining first photoresist pattern 180A 'and 180B' are used as a mask, the first conductive layer pattern 150A and the first n + amorphous silicon thin film pattern 130A are selectively removed. The source electrode 122 and the drain electrode 123 are formed on the layer 124.

In this case, the first n + amorphous silicon thin film pattern 130A is also patterned in the same manner to form an ohmic contact layer connecting the source / drain electrodes 122 and 123 to a predetermined region of the channel layer 124. 125 will be formed.

When the first n + amorphous silicon thin film pattern 130A is etched, a portion of the surface of the amorphous silicon thin film constituting the channel layer 124 below is removed, which forms an amorphous silicon thin film transistor as a back-channel etch type. Because.

As such, the channel layer 124 and the source / drain electrodes 122 and 123 may be formed through one mask process by using diffraction exposure, thereby reducing the number of mask processes. However, the present invention is not limited thereto, and the channel layer 124 and the source / drain electrodes 122 and 123 may be formed through separate mask processes, that is, two mask processes.

In addition, the dummy pattern 170 of the present invention has the advantage of eliminating the need for an additional mask process by forming and patterning the conductive material for data wiring when forming the source / drain electrodes 122 and 123.                     

Next, as shown in FIG. 3F, a second insulating film 115B is formed on the entire surface of the substrate 110. The second insulating film 115B is selectively patterned using a photolithography process (third mask process) to form a contact hole 140 exposing a part of the drain electrode 123.

3G, a transparent conductive material is deposited on the entire surface of the substrate 110, and then patterned by using a photolithography process (fourth mask process) to form the drain electrode through the contact hole 140. A pixel electrode 118 electrically connected to 123 is formed. In this case, the pixel electrode 118 includes a storage electrode 118 ′ that extends toward the front gate line 116n-1 and overlaps the front gate line 116n-1 and the dummy pattern 170.

The pixel electrode 118 and the storage electrode 118 ′ may be formed of a transparent conductive material having excellent transmittance such as indium tin oxide (ITO) or indium zinc oxide (IZO). Can be.

As shown in FIG. 4A, the array substrate fabricated as described above has an upper storage electrode 118 ′, that is, when a line defect 190 occurs in which a portion of the front gate line 116n-1 is disconnected. A repair process is performed to connect the disconnected gate line 116n-1 through the pixel electrode 118.

In this case, the repair process is performed by welding the melted to the surface of the disconnected gate line 116n-1 by using a laser and connecting the upper storage electrode 118 'to the upper storage electrode 118'. The dummy pattern 170 of the present invention is formed between the gate line 116n-1 and the lower gate line 116n-1, so that the repair can be ensured.

That is, since the distance between the upper storage electrode 118 'and the lower gate line 116n-1 is long and the storage electrode 118' has a thin film thickness, the repair process may fail, but the upper storage electrode Since the dummy pattern 170 of the present invention is formed between 118 'and the lower gate line 116n-1, the success rate of the repair process can be increased by a double structure connected once more in the middle. As a result, the quality and the yield are improved as the disconnection defect of the gate line is reduced.

In addition, since the dummy pattern 170 is formed by patterning the dummy pattern 170 using a data wiring conductive material as described above, an additional mask process is not required.

At this time, the present embodiment has been described using an example of a four mask process for fabricating the array substrate using the four mask process, the present invention is not limited to this, the present invention is applied regardless of the number of the mask process.

In addition, in the above embodiment, an amorphous silicon thin film transistor using an amorphous silicon thin film as the channel layer is described as an example. However, the present invention is not limited thereto, and the present invention is not limited to the polycrystalline silicon thin film transistor using the polycrystalline silicon thin film as the channel layer. The present invention also applies to a liquid crystal display device having a.

In addition, the invention can be applied regardless of the mode of the liquid crystal display device, that is, a twisted nematic (TN) mode, an in-plane switching (IPS) mode, and a vertical alignment (VA) mode. .                     

In addition, the present invention can be used not only in liquid crystal display devices but also in other display devices fabricated using thin film transistors, for example, organic light emitting display devices in which organic light emitting diodes (OLEDs) are connected to driving transistors. have.

Many details are set forth in the foregoing description but should be construed as illustrative of preferred embodiments rather than to limit the scope of the invention. Therefore, the invention should not be defined by the described embodiments, but should be defined by the claims and their equivalents.

As described above, the repair method of the present invention can increase the success rate of the repair process by forming an additional dummy pattern between the upper storage electrode and the lower gate line.

Accordingly, the yield and productivity of the liquid crystal display device are improved.

In addition, since the dummy pattern is formed by patterning and using a conductive material for data wiring, an additional mask process is not required.

Claims (9)

A plurality of gate lines including a gate electrode, a plurality of data lines including a source electrode, a pixel electrode formed at an intersection of the gate line and the data line and overlapping a portion of the gate line, and electrically connected to the pixel electrode In the repair method of a liquid crystal display device comprising a drain electrode and a channel layer forming a conductive channel between the source electrode and the drain electrode, Forming a dummy pattern between the gate line and the pixel electrode; And And disconnecting the disconnected left and right gate lines using the dummy pattern when a defect occurs in which the predetermined region of the gate line is disconnected. The repair method as claimed in claim 1, wherein the pixel electrodes and the dummy pattern are connected to the lower disconnected gate line by welding a left and right pixel electrode on the disconnected gate line and a predetermined region of the dummy pattern by laser. . The repair method as claimed in claim 1, wherein the dummy pattern is formed of the same conductive material constituting the source / drain electrode and the data line. A gate electrode and a gate line formed on the substrate; A first insulating film formed on the substrate; A switching element formed on the substrate, the switching element comprising a source electrode, a drain electrode, and a channel layer; A dummy pattern formed on the gate line and repaired when a disconnection defect occurs in the gate line; A second insulating film formed on the substrate; And And a pixel electrode formed on the substrate and partially overlapping a front gate line. The liquid crystal display of claim 4, wherein the dummy pattern is made of the same conductive material constituting the source / drain electrodes. The liquid crystal display device of claim 4, wherein the dummy pattern is repaired by connecting the upper pixel electrode and the lower gate line to a double line when a disconnection defect occurs in the gate line. The liquid crystal display device of claim 4, wherein the upper pixel electrode and the dummy pattern are connected to the lower gate line by welding using a laser. Forming a gate electrode and a gate line on the substrate; Forming a first insulating film on the substrate; Forming a switching element including a source electrode, a drain electrode, and a channel layer on the substrate, and forming a dummy pattern on the gate line; Forming a second insulating film on the substrate; And Forming a pixel electrode on the substrate to partially overlap the front gate line. The method of claim 8, wherein the dummy pattern is formed using the same conductive material constituting the source / drain electrode.

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