KR20060078010A - Array substrate for liquid crystal display and method for fabricating the same - Google Patents

Abstract

The present invention provides an array substrate for a liquid crystal display device and a method of manufacturing the same. An array substrate for a liquid crystal display device may include a gate electrode, a gate insulating layer, a semiconductor layer, and a side surface of a source electrode and a drain electrode formed of a metal material including copper, a source electrode not facing the drain electrode on the ohmic contact layer and the ohmic contact layer. And an electrode buffer layer, a passivation layer, and a pixel electrode formed on each side of the drain electrode not facing the source electrode on the ohmic contact layer. A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate electrode, depositing a metal material layer including a gate insulating film, a hydrogenated amorphous silicon layer, an impurity amorphous silicon layer, and copper, forming a semiconductor layer, and forming a source electrode. And forming a drain electrode, forming an electrode buffer layer on each of a side of the source electrode that does not face the drain electrode and a side of the drain electrode that does not face the source electrode, forming an ohmic contact layer, and forming a protective film. And forming a pixel electrode.

Liquid Crystal Display, Array Board, Copper Wiring

Description

Array substrate for liquid crystal display device and manufacturing method thereof {Array substrate for liquid crystal display and method for fabricating the same}

1 is a cross-sectional view of a conventional array substrate for a liquid crystal display device.

2 is a cross-sectional view of an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

3A to 3I are cross-sectional views of respective steps of a manufacturing process of an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

 (Explanation of symbols for the main parts of the drawing)

100: transparent insulating substrate 110: gate electrode

120: gate insulating film 130: semiconductor layer

140 and 150: ohmic contact layer 160: source electrode

170: drain electrode 201, 202: electrode buffer layer

180: protective film 190: pixel electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an array substrate for a liquid crystal display (LCD) and a method for manufacturing the same, and more particularly, to stably form a source electrode and a drain electrode made of a metal material including copper (Cu). The present invention relates to an array substrate for a liquid crystal display device and a method of manufacturing the same.

In today's information society, the role of electronic displays has become very important, and various electronic displays have been widely used in various industrial fields. In the electronic display device field, electronic display devices having new functions suitable for the demands of the information society, which have been continuously developed and diversified, are continuously being developed. In general, an electronic display device refers to a device that transmits various pieces of information to a human through vision. That is, an electronic display device refers to an electronic device that converts an electronic information signal output from various electronic devices into an optical information signal that can be recognized by a human eye, and is a device that plays a role of a bridge between humans and electronic devices. It can be said.

In such an electronic display device, when an optical information signal is displayed by a light emitting phenomenon, it is referred to as a light emitting display device, and when it is displayed by light modulation due to reflection, scattering, or interference phenomenon, it is called a light receiving display device. Light emitting displays, also called active display devices, include cathode ray tube (CRT), plasma display panel (PDP), organic electroluminescent display (OLD), and light emitting diodes (LED). Light Emitting Diode (LED) etc. can be mentioned. The light receiving display device, which is called a passive display device, may include a liquid crystal display (LCD) and an electrophoretic image display (EPID).                         

Cathode ray tube display device, which is used for television and computer monitor, and has the longest history, has the highest market share in terms of economy, but has many disadvantages such as heavy weight, large volume and high power consumption. .

Recently, due to the rapid progress of semiconductor technology, there is a demand for a flat panel display device as an electronic display device suitable for a new environment in accordance with the trend of lowering and lowering power of various electronic devices and miniaturization, thinning, and lightening of electronic devices. It is rapidly increasing. Accordingly, flat panel display devices such as a liquid crystal display (LCD), a plasma display device (PDP), an organic EL display device (OELD), and the like have been developed, and among these flat panel display devices, it is easy to miniaturize, light weight, and thinner. In particular, liquid crystal display devices having low power consumption and low driving voltage are drawing attention.

In the liquid crystal display, a liquid crystal material having an anisotropic dielectric constant is injected between an upper transparent insulating substrate on which a common electrode, a color filter, a black matrix, and the like are formed, and a lower transparent insulating substrate on which a switching element and a pixel electrode are formed. By applying different potentials to the electrodes and the common electrode, the intensity of the electric field formed in the liquid crystal material is adjusted to change the molecular arrangement of the liquid crystal material, thereby controlling the amount of light transmitted through the transparent insulating substrate to express a desired image. It is a display device. In the liquid crystal display, a thin film transistor liquid crystal display (TFT LCD) using a thin film transistor (TFT) element as a switching element is mainly used.

With reference to FIG. 1, the conventional array substrate for liquid crystal display devices is demonstrated. 1 is a cross-sectional view of a conventional array substrate for a liquid crystal display device.

As shown in FIG. 1, a conventional array substrate for a liquid crystal display device includes a gate electrode 11 formed on the transparent insulating substrate 10, a gate insulating film 12 formed on the gate electrode 11, and a gate insulating film ( 12) a semiconductor layer 13 made of a hydrogenated amorphous silicon material thereon, and a source electrode 16 and a drain electrode 17 formed to be spaced apart from each other by exposing the semiconductor layer 13 in a region corresponding to the gate electrode; And ohmic contact layers 14 and 15 formed at an interface between the source electrode 16 and the drain electrode 17 and the semiconductor layer 13 and made of a material of impurity amorphous silicon. A passivation layer 18 is formed on the source electrode 16 and the drain electrode 17, and a contact hole 18_1 exposing the drain electrode 17 is formed in the passivation layer 18. The pixel electrode 19 connected to the drain electrode 17 through 18_1 is formed.

The conventional array substrate for a liquid crystal display device uses a low resistance metal material to reduce signal delays to the source electrode 16 and the drain electrode 17. Specifically, as a low resistance metal material, copper (Cu) is used. Metallic materials including) are used.

Meanwhile, in order to form the source electrode 16 and the drain electrode 17 made of a metal material including copper, the source electrode 16 and the drain electrode 17 may be formed using a wet etching process on the metal material layer including copper. ), The impurity amorphous silicon layer and the hydrogenated amorphous silicon layer are etched by a radial ion etching (RIE) process containing chlorine gas or a plasma etching process including a chlorine plasma. As a result, copper and chlorine ions in the regions of the source electrode 16 and the drain electrode 17 react and corrode, and thus, the corroded source in the process of completing the source electrode 16 and the drain electrode 17 by wet etching in a subsequent step. Copper in the regions of the electrode 16 and the drain electrode 17 may be etched and removed. Therefore, the source electrode 16 and the drain electrode 17 made of a metal material containing copper cannot be stably formed.

Accordingly, a technical object of the present invention is to form an electrode buffer layer on the side of the source electrode and the drain electrode to form a liquid crystal display device capable of stably forming a source electrode and a drain electrode made of a metal material including copper (Cu). To provide an array substrate for a Crystal Display (LCD).

Another object of the present invention is to provide a method of manufacturing an array substrate for a liquid crystal display (LCD).

Technical problems to be achieved by the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned above will be clearly understood by those skilled in the art from the following description. Could be.

An array substrate for a liquid crystal display device according to an embodiment of the present invention for achieving the technical problem is a gate electrode formed on a transparent insulating substrate, a gate insulating film formed on the gate electrode, a semiconductor layer formed on the gate insulating film, A source electrode and a drain electrode formed of a metal material including copper, the semiconductor layer being positioned to be spaced apart from each other by exposing the semiconductor layer in an area corresponding to the gate electrode on the semiconductor layer; an interface between the source electrode and the drain electrode and the semiconductor layer An electrode buffer layer formed on each of the ohmic contact layer formed on the side surface of the source electrode not facing the drain electrode on the ohmic contact layer and on the side surface of the drain electrode not on the source electrode on the ohmic contact layer; Formed on the source electrode and the drain electrode Homak and is formed on the protective film, characterized by comprising a pixel electrode connected to the drain electrode.

In the array substrate for a liquid crystal display according to the exemplary embodiment of the present invention, the electrode buffer layer is preferably formed of a copper oxide film.

In addition, the array substrate for a liquid crystal display device according to the exemplary embodiment of the present invention preferably has a width of 50 kPa to 1000 kPa of the electrode buffer layer.

According to another aspect of the present invention, there is provided a method of manufacturing an array substrate for a liquid crystal display device, the method including: forming a gate electrode on a transparent insulating substrate; a gate insulating layer and a hydrogenated amorphous silicon layer on the gate electrode; Depositing a metal material layer including an impurity amorphous silicon layer and copper in sequence, forming a semiconductor layer on the hydrogenated amorphous silicon layer, and forming a source electrode and a drain electrode on the metal material layer including copper, Forming an electrode buffer layer on each of a side of the source electrode not facing the drain electrode and a side of the drain electrode not facing the source electrode, by etching an area corresponding to the gate electrode in the impurity amorphous silicon layer Forming an ohmic contact layer, the source electrode and the drain And forming a passivation layer on the phosphorus electrode and forming a pixel electrode connected to the drain electrode on the passivation layer.

In the method of manufacturing an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention, a semiconductor layer is formed on the hydrogenated amorphous silicon layer, a source electrode and a drain electrode are formed on a metal material layer including copper, and the drain Forming an electrode buffer layer on each of a side of the source electrode not facing the electrode and a side of the drain electrode not facing the source electrode, the region corresponding to the gate electrode in the metal material layer including copper; Etching and removing portions except the region where the source electrode and the drain electrode are to be formed, forming the electrode buffer layers on each side of the removed metal material layer on the impurity amorphous silicon layer, and the impurity amorphous silicon A region corresponding to the gate electrode in the layer and the hydrogenated amorphous silicon layer, Etching and removing portions other than regions where the source and drain electrodes are to be formed and regions corresponding to the electrode buffer layer, and etching the regions corresponding to the gate electrodes in the removed metal material layer; It is preferable to include the step of forming the drain electrode.

In addition, in the method of manufacturing the array substrate for a liquid crystal display device according to the exemplary embodiment of the present invention, it is preferable that the electrode buffer layer is formed of a copper oxide film at the step of forming the electrode buffer layer.

In addition, in the method of manufacturing the array substrate for a liquid crystal display device according to the exemplary embodiment of the present invention, after the step of forming the ohmic contact layer, the width of the electrode buffer layer is preferably 50 mW to 1000 mW.

In addition, the method of manufacturing an array substrate for a liquid crystal display device according to an exemplary embodiment of the present invention may include forming the electrode buffer layer in a state in which the electrode buffer layer is coated with a photoresist on the removed metal material layer. It is preferable to form the removed metal material layer by exposing for 24 hours to 72 hours in an atmosphere of atmospheric pressure.

In addition, in the method of manufacturing an array substrate for a liquid crystal display device according to an exemplary embodiment of the present invention, in the forming of the electrode buffer layer, the electrode buffer layer is formed with oxygen in a state where photoresist is applied on the removed metal material layer. It is preferable to form by treating with plasma for 4 sec-100 sec.

In addition, a method of manufacturing an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention may include a region corresponding to the gate electrode, a region where a source electrode and a drain electrode are to be formed, in the impurity amorphous silicon layer and the hydrogenated amorphous silicon layer. Etching and removing portions except regions corresponding to the electrode buffer layer, and etching the impurity amorphous silicon layer and the hydrogenated amorphous silicon layer by a radial ion etching (RIE) process including chlorine gas or a plasma etching process including a chlorine plasma It is desirable to.

Specific details of other embodiments are included in the detailed description and drawings. Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. Like reference numerals refer to like elements throughout.

Referring to FIG. 2, an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described. 2 is a cross-sectional view of an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

As illustrated in FIG. 2, an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention may include a gate electrode 110, a gate insulating layer 120, a semiconductor layer 130, a source electrode 160, and a drain electrode 170. ), The ohmic contact layers 140 and 150, the electrode buffer layers 201 and 202, the passivation layer 180, and the pixel electrode 190.

Here, the gate electrode 110 is formed of a metal material including aluminum (Al) on the transparent insulating substrate 100, and the gate insulating layer 120 is formed of a silicon nitride film (SiNx) in a region covering the gate electrode 110. ) And a silicon oxide film (SiOx).

The semiconductor layer 130 is formed of a hydrogenated amorphous silicon material at a position covering the gate electrode 110 on the gate insulating layer 120, and a region corresponding to the gate electrode 110 is defined as a channel portion. The 160 and the drain electrode 170 are formed of a metal material including copper (Cu), and are disposed to be spaced apart from each other while exposing the semiconductor layer 130 in a region corresponding to the gate electrode 110. In addition, ohmic contact layers 140 and 150 made of an impurity amorphous silicon material doped with a high concentration of n-type or p-type impurities are formed at an interface between the source electrode 160 and the drain electrode 170 and the semiconductor layer 130. It is.

The side of the source electrode 160 that does not face the drain electrode 170 on the ohmic contact layers 140 and 150 and the drain electrode that does not face the source electrode 160 on the ohmic contact layers 140 and 150. Electrode buffer layers 201 and 202 made of a copper oxide (Cu 2 O) material are formed on each side of the 170. An array substrate for a liquid crystal display according to an exemplary embodiment of the present invention includes an electrode buffer layer 201 made of a copper oxide material on each of a side of a source electrode 160 and a side of a drain electrode 170 that do not face the drain electrode 170. , 202 may be formed to stably form the source electrode 160 and the drain electrode 170 made of a metal material including copper.

Specifically, the widths W1 and W2 of the electrode buffer layers 201 and 202 are preferably 50 mW to 1000 mW. When the widths W1 and W2 of the electrode buffer layers 201 and 202 are less than 50 GPa, the semiconductor layer 130 and the ohmic contact layers 140 and 150 are patterned after the source electrode 160 and the drain electrode 170 are patterned. Is not preferable because the source electrode 160 and the drain electrode 170 cannot be effectively protected in the etching process by a radial ion etching (RIE) process including chlorine gas or a plasma etching process including a chlorine plasma. If the widths W1 and W2 of the 201 and 202 are more than 1000 mW, the process time for forming the electrode buffer layers 201 and 202 is increased, which is undesirable because the manufacturing efficiency of the array substrate for a liquid crystal display device is reduced. .

Meanwhile, a passivation layer 180 made of an inorganic insulating material such as silicon nitride film (SiNx) or an organic insulating material is formed on the source electrode 160 and the drain electrode 170. The passivation layer 180 may include a drain electrode ( The contact hole 181 exposing the 170 is formed, and is connected to the drain electrode 170 through the contact hole 181 and made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). A pixel electrode 190 is formed.

Hereinafter, a method of manufacturing an array substrate for a liquid crystal display device according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 3A to 3I. 3A to 3I are cross-sectional views of respective steps of a manufacturing process of an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention.

First, by depositing a gate electrode layer on the transparent insulating substrate 100 with a first metal material and patterning the gate electrode layer by a photo process using a first mask and an etching process, as shown in Figure 3a, the gate electrode 110 To form. Here, the first metal material is selected from a metal material having a low specific resistance value, and is preferably selected from a metal material including aluminum.

Next, a metal material including a gate insulating layer 120, a hydrogenated amorphous silicon layer 131, an impurity amorphous silicon layer 141 doped with a high concentration of n-type or p-type impurities, and copper on the gate electrode 110. Layer 161 is deposited in order, as shown in FIG. 3A. Here, the gate insulating film 120 is selected from any one of an organic insulating material or an inorganic insulating material, preferably selected from inorganic insulating materials, more preferably selected from silicon insulating materials. As the silicon insulation material, for example, a silicon nitride film (SiNx), a silicon oxide film (SiOx), or the like may be used.

Next, a photo process is performed using a second mask in an area corresponding to the gate electrode 110 and an area in which the source electrode 160 and the drain electrode 170 are to be formed on the metal material layer 161 including copper. The resist pattern 172 is formed as shown in FIG. 3B. Here, the photoresist pattern 172 is exposed at a difference in the exposure amount, thereby forming a half tone 171 having a relatively small thickness of the photoresist pattern 172 in a region corresponding to the gate electrode. The half-tone 171 may be formed to have a relatively small thickness by exposing the region corresponding to the gate electrode 110 through diffraction exposure. Specifically, the thickness of the photoresist pattern 172 is about 18000 GPa-23000 GPa, and the thickness of the halftone 171 is about 5000 GPa-8000 GPa.

Next, an area corresponding to the gate electrode 110, a region in which the source electrode 160 and the drain electrode 170 are to be formed, in the metal material layer 161 including copper using the photoresist pattern 172 as a mask. The portion except for the etching is etched and removed as shown in FIG. 3C. Here, the metal material layer 161 including copper may be etched by wet etching, and a mixed solution of hydrogen peroxide (H 2 O 2) and acetic acid (CH 3 CHOOH) may be used as the wet etching etchant.

Next, electrode buffer layers 201 and 202 made of a copper oxide (Cu 2 O) material are formed on each side of the removed metal material layer 162 on the impurity amorphous silicon layer 141, as shown in FIG. 3D. do. Here, the electrode buffer layers 201 and 202 expose the metal material layer 162 including copper in an atmosphere of 1 atmosphere under a state in which the photoresist pattern 172 is formed on the removed metal material layer 162. Can be formed. Specifically, the electrode buffer layers 201 and 202 have a pressure of about 1 atm, 20 ° C. to 25 ° C. in a clean room with the photoresist pattern 172 formed on the removed metal material layer 162. In the humidity state of about 45% to 55%, the metal material layer 162 including copper may be exposed for 24 hours to 72 hours.

Alternatively, the electrode buffer layers 201 and 202 may be formed by treating with an oxygen plasma while the photoresist pattern 172 is formed on the removed metal material layer 162. Specifically, at a pressure of 0.05 to 1 torr, the metal material layer 162 removed under process conditions of providing oxygen gas (O 2) about 1300 Sccm to 1700 Sccm at a Radio Frequency (RF) power of 2000 to 4000 W. The electrode buffer layers 201 and 202 may be formed by treating with an oxygen plasma for 4 sec to 100 sec while the photoresist pattern 172 is formed on the top surface.

Next, the region corresponding to the gate electrode 110, the source electrode 160 and the drain electrode 170 in the impurity amorphous silicon layer 141 and the hydrogenated amorphous silicon layer 131 using the photoresist pattern 172 as a mask. The portions other than the regions to be formed and the regions corresponding to the electrode buffer layers 201 and 202 are etched and removed as shown in FIG. 3E. The impurity amorphous silicon layer 141 and the hydrogenated amorphous silicon layer 131 may be etched by a radial ion etching (RIE) process including chlorine gas or a plasma etching process including chlorine plasma. Specifically, the impurity amorphous silicon layer 141 and the hydrogenated amorphous silicon layer 131 may be etched using SF6 and Cl2 gas in a radial ion etching (RIE) process, and SF6, He, and HCl plasma may be etched in the plasma etching process. The impurity amorphous silicon layer 141 and the hydrogenated amorphous silicon layer 131 may be etched by using the same.

Meanwhile, as shown in FIG. 3D, electrode buffer layers 201 and 202 formed of a copper oxide (Cu 2 O) material are not formed on each side of the removed metal material layer 162 on the upper part of the impurity amorphous silicon layer 141. In this case, chlorine and copper react during the above-described RIE process or plasma etching process to corrode the metal material layer 162 including copper. This corrosion may occur most severely on the exposed side of the metal material layer 162 including copper. Therefore, in the method of manufacturing an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention, a RIE (Radiative Ion Etching) process in which the impurity amorphous silicon layer 141 and the hydrogenated amorphous silicon layer 131 are chlorine gas or An electrode made of a copper oxide (Cu 2 O) material, as shown in FIG. 3D, on each side of the removed metal material layer 162 on top of the impurity amorphous silicon layer 141 prior to etching with a plasma etching process including plasma. By forming the buffer layers 201 and 202, it is possible to effectively block the reaction of chlorine and copper during the RIE process or the plasma etching process, so that the corrosion of the metal material layer 162 containing copper by chlorine can be suppressed. .

Next, the photoresist of the halftone 171 is removed from the photoresist pattern 172 through an ashing process, thereby removing the metal material layer 162 including copper in the region corresponding to the gate electrode 110. , As shown in FIG. 3F.

Next, an area corresponding to the gate electrode 110 is etched in the metal material layer 162 including copper by using the photoresist pattern 172 in which the photoresist of the half-tone 171 is removed as a mask. 3G, the source electrode 160 and the drain electrode 170 are formed. Here, the metal material layer 162 including copper may be etched by wet etching, and a mixed solution of hydrogen peroxide (H 2 O 2) and acetic acid (CH 3 CHOOH) may be used as the wet etching etchant. In the method of manufacturing a substrate array for a liquid crystal display according to an exemplary embodiment of the present invention, the impurity amorphous silicon layer 141 and the hydrogenated amorphous silicon layer 131 may be subjected to a radial ion etching (RIE) process including chlorine gas or a chlorine plasma. Before etching in the plasma etching process, an electrode buffer layer made of a copper oxide (Cu2O) material, as shown in FIG. 3D, on each side of the removed metal material layer 162 on the impurity amorphous silicon layer 141. By forming 201 and 202, the metal material layer 162 containing copper can be prevented from being corroded by chlorine during the RIE process or the plasma etching process, so that the source electrode 160 made of the metal material containing copper can be suppressed. And the drain electrode 170 can be stably formed.

Next, the region corresponding to the gate electrode 110 is etched from the impurity amorphous silicon layer 142 using the photoresist pattern 172 in which the photoresist of the half-tone 171 is removed as a mask, and then, as shown in FIG. 3H. As shown, ohmic contact layers 140 and 150 are formed. The impurity amorphous silicon layer 142 may be etched by a plasma etching process including a nitrogen plasma. In the method of manufacturing a substrate array for a liquid crystal display according to an exemplary embodiment of the present invention, the impurity amorphous silicon layer 141 and the hydrogenated amorphous silicon layer 131 may be subjected to a radial ion etching (RIE) process including chlorine gas or a chlorine plasma. Before etching in the plasma etching process, an electrode buffer layer made of a copper oxide (Cu2O) material, as shown in FIG. 3D, on each side of the removed metal material layer 162 on the impurity amorphous silicon layer 141. By forming the 201 and 202, the metal material layer 162 including copper can be suppressed from being eroded by chlorine during the RIE process or the plasma etching process, and thus the copper in the process of etching the impurity amorphous silicon layer 142 Etching of the source electrode 160 and the drain electrode 170 made of a metal material including a metal may be effectively reduced.

In the method of manufacturing the array substrate for a liquid crystal display according to the exemplary embodiment of the present invention, after the steps of forming the ohmic contact layers 140 and 150, the widths W1 and W2 of the electrode buffer layers 201 and 202 may be formed. It is preferable that they are 50 kV-1000 kV. When the widths W1 and W2 of the electrode buffer layers 201 and 202 are less than 50 GPa, the semiconductor layer 130 and the ohmic contact layers 140 and 150 are patterned after the source electrode 160 and the drain electrode 170 are patterned. Is not preferable because the source electrode 160 and the drain electrode 170 cannot be effectively protected in the etching process by a radial ion etching (RIE) process including chlorine gas or a plasma etching process including a chlorine plasma. When the widths W1 and W2 of the 201 and 202 are more than 1000 mW, the process time for forming the electrode buffer layers 201 and 202 is increased, which is undesirable because the manufacturing efficiency of the thin film transistor for a liquid crystal display device is reduced. .                     

Next, an insulating material is coated to form the passivation layer 180. Then, a photo process and an etching process using a third mask are performed to form a contact hole 181 exposing the drain electrode 170 in the passivation layer 180 as illustrated in FIG. 3I. Here, the insulating material used as the passivation layer 180 is selected from any one of an organic insulating material or an inorganic insulating material, preferably selected from inorganic insulating materials, more preferably selected from silicon insulating materials. As the silicon insulating material, for example, a silicon nitride film (SiNx), a silicon oxide film (SiOx), or the like may be used.

Next, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) is deposited, and a photo process and an etching process using a fourth mask are performed to the drain electrode 170 through the contact hole 181. A pixel electrode 190 to be connected is formed, as shown in FIG. 3I.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may be embodied in other specific forms without changing the technical spirit or essential features of the present invention. I can understand that. Therefore, since the embodiments described above are provided to fully inform the scope of the invention to those skilled in the art, it should be understood that they are exemplary in all respects and not limited. The invention is only defined by the scope of the claims.

According to an exemplary embodiment of the present invention, an array substrate for a liquid crystal display device includes a source electrode and a drain electrode made of a metal material including copper (Cu) by forming an electrode buffer layer on side surfaces of the source electrode and the drain electrode. It can form stably.

In addition, the method of manufacturing an array substrate for a liquid crystal display device according to an exemplary embodiment of the present invention exposes a metal material layer containing copper in an atmosphere of 1 atm on the side of the source electrode and the drain electrode to form an electrode buffer layer, or The array substrate for the liquid crystal display device may be easily formed by forming an electrode buffer layer by treating the metal material layer included with an oxygen plasma.

Claims (10)

A gate electrode formed on the transparent insulating substrate; A gate insulating film formed on the gate electrode; A semiconductor layer formed on the gate insulating layer; A source electrode and a drain electrode positioned on the semiconductor layer and spaced apart from each other while exposing the semiconductor layer in a region corresponding to the gate electrode; An ohmic contact layer formed at an interface between the source electrode and the drain electrode and the semiconductor layer; An electrode buffer layer formed on each of a side of the source electrode not facing the drain electrode above the ohmic contact layer and a side of the drain electrode not facing the source electrode above the ohmic contact layer; A passivation layer formed on the source electrode and the drain electrode; And And a pixel electrode formed on the passivation layer and connected to the drain electrode. The method of claim 1, And the electrode buffer layer is formed of a copper oxide film. The method of claim 1, The width | variety of the said electrode buffer layer is 50 kV-1000 kPa, The array substrate for liquid crystal display devices characterized by the above-mentioned. Forming a gate electrode on the transparent insulating substrate; Sequentially depositing a metal layer including a gate insulating layer, a hydrogenated amorphous silicon layer, an impurity amorphous silicon layer, and copper on the gate electrode; A semiconductor layer is formed on the hydrogenated amorphous silicon layer, and a source electrode and a drain electrode are formed on the metal material layer including the copper, and side surfaces of the source electrode that do not face the drain electrode and do not face the source electrode. Forming an electrode buffer layer on each side of the drain electrode; Etching an area corresponding to the gate electrode in the impurity amorphous silicon layer to form an ohmic contact layer; Forming a passivation layer on the source electrode and the drain electrode; And And forming a pixel electrode connected to the drain electrode on the passivation layer. The method of claim 4, wherein A semiconductor layer is formed on the hydrogenated amorphous silicon layer, and a source electrode and a drain electrode are formed on the metal material layer including the copper, and side surfaces of the source electrode that do not face the drain electrode and do not face the source electrode. Forming an electrode buffer layer on each side of the drain electrode, Etching to remove a portion of the metal material layer including copper except for a region corresponding to the gate electrode, a region in which the source electrode and the drain electrode are to be formed; Forming the electrode buffer layers on each side of the removed metal material layer on the impurity amorphous silicon layer; Etching and removing portions of the impurity amorphous silicon layer and the hydrogenated amorphous silicon layer except for a region corresponding to the gate electrode, a region in which the source electrode and the drain electrode are to be formed, and a region corresponding to the electrode buffer layer; And And etching the region corresponding to the gate electrode in the removed metal material layer to form the source electrode and the drain electrode. The method of claim 5, In the forming of the electrode buffer layer, the electrode buffer layer is formed of a copper oxide film, the method of manufacturing an array substrate for a liquid crystal display device. The method of claim 5, And after performing the step of forming the ohmic contact layer, the electrode buffer layer has a width of 50 mW to 1000 mW. The method of claim 5, In the forming of the electrode buffer layer, the electrode buffer layer is formed by exposing the removed metal material layer for 24 hours to 72 hours in an atmosphere of 1 atmosphere with photoresist applied on the removed metal material layer. The manufacturing method of the array substrate for liquid crystal display devices characterized by the above-mentioned. The method of claim 5, In the forming of the electrode buffer layer, the electrode buffer layer is formed by treating with oxygen plasma for 4 sec to 100 sec while the photoresist is applied on the removed metal material layer. Method of manufacturing an array substrate. The method of claim 5, Etching and removing portions of the impurity amorphous silicon layer and the hydrogenated amorphous silicon layer except for a region corresponding to the gate electrode, a region in which a source electrode and a drain electrode are to be formed, and a region corresponding to the electrode buffer layer. A method of manufacturing an array substrate for a liquid crystal display device, wherein the crystalline silicon layer and the hydrogenated amorphous silicon layer are etched by a radial ion etching (RIE) process containing chlorine gas or a plasma etching process including a chlorine plasma.

Images