KR20060063251A - Display device - Google Patents

Abstract

The present invention relates to a display device.

A plurality of pixels each including a switching element, a display signal line connected to the pixel, and a contact pad formed at an end of the display signal line, the contact pad including at least a different size from a main contact hole and the main contact hole; One auxiliary contact hole is formed.

In this manner, by increasing the area of the contact pad and forming a plurality of contact holes, it is possible to lower the contact error of the probe of the test equipment and to perform a stable gross test.

Display, Contact Pad, COG, Laser Trim, Gross, Test

Description

Display device {DISPLAY DEVICE}

1 is a block diagram of a display device according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is a schematic layout view of a display device according to an exemplary embodiment of the present invention.

4 is an enlarged layout view of the data driver IC region illustrated in FIG. 3.

FIG. 5 is a cross-sectional view of the data driver IC region illustrated in FIG. 4 taken along the line V-V '.

The present invention relates to a display device.

Recently, organic electroluminescence display (OLED), plasma display panel (PDP), liquid crystal display (LCD), instead of heavy and large cathode ray tube (CRT) Flat panel display devices such as are being actively developed.

PDP is a device that displays characters or images using plasma generated by gas discharge, and the organic EL display device displays characters or images by using electroluminescence of specific organic materials or polymers. The liquid crystal display device applies an electric field to a liquid crystal layer interposed between two display panels, and adjusts the intensity of the electric field to adjust a transmittance of light passing through the liquid crystal layer to obtain a desired image.

Among such flat panel display devices, for example, a liquid crystal display and an organic EL display device may turn on / off a switching element of a pixel by emitting a gate signal to a pixel including a switching element, a display panel provided with a display signal line, and a gate line among the display signal lines. A gate driving IC to be turned off, a gray voltage generator for generating a plurality of gray voltages, a data driving IC for applying a data voltage to a data line of the display signal lines, and a signal controller for controlling the gray voltages.

The signal controller and the gray voltage generator are provided on a printed circuit board (PCB) positioned outside the display panel. The driver IC is mounted on a flexible printed circuit (FPC) substrate located between the PCB and the display panel. Two PCBs are usually placed in this case, one above and one left of the display panel. The left one is called a gate PCB and the right one is called a data PCB. A gate driver IC is positioned between the gate PCB and the display panel, and a data driver IC is positioned between the data PCB and the display panel, and receives signals from the corresponding PCB.

However, the gate driver and the data driver IC can be mounted directly on the display panel without using the gate PCB and the data PCB [chip on glass (COG) method].

Meanwhile, in the manufacturing process of the display device, various inspection processes are performed to detect defects such as disconnection or short circuit, such as an array test, a VI (visual inspection) test, a gross test, and a module test. to be.

The array test is a test to determine whether the display signal line is disconnected by applying a constant voltage before and separating the individual cells from the mother glass and the output voltage, and the VI test is separated into individual cells. After connecting the upper panel and the lower panel and applying a constant voltage, it is a test to check whether the display signal line is disconnected while watching with human eyes. The gross test is a test to check whether the picture quality and the display signal line are disconnected through the display state by applying the same voltage as the actual drive voltage before mounting the drive circuit. This is a test to find out whether proper operation is done.

Meanwhile, in the gross test, a constant voltage is applied through a needle called a probe attached to the gross test equipment. In this case, the data line or the gate line has a pad portion in which an end portion of the data line or the gate line is extended in order to improve contact characteristics with an external device, and it is essential to apply a voltage by accurately contacting the probe of the test equipment with the pad portion. .

However, when the probe is moved toward the pad, the pad and the probe may not be accurately contacted due to an error such as a moving distance. In addition, a connection auxiliary member made of indium tin oxide (ITO) or the like may not be in contact with the probe by sliding. For this reason, it is necessary to reconfigure the inspection equipment and often require such a long time.

Accordingly, an object of the present invention is to provide a display device that can solve the problems of the prior art.

According to an embodiment of the present invention, a display device includes a plurality of pixels each including a switching element, a display signal line connected to the pixel, and a contact pad formed at an end of the display signal line. The contact pad is provided with a main contact hole and at least one auxiliary contact hole having a different size from the main contact hole.

In this case, the contact pad may preferably include a contact auxiliary member connected to the display signal line through the contact hole.

The display signal line may include a gate line transferring a gate signal and a data line transferring a data voltage.

In addition, the display device may include a gate driving IC that generates and exports the gate signal, and a data driving IC that generates and exports the data voltage, and the gate driving IC or the data driving IC is a chip on glass (COG) method. It can be mounted as.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.                     

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a portion of a layer, film, region, plate, etc. is said to be "on top" of another part, this includes not only when the other part is "right on" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A display device according to an embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a block diagram of a display device according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a display device according to an exemplary embodiment of the present invention is connected to a panel assembly 300, a gate driver 400, a data driver 500, and a data driver 500 connected thereto. The gray voltage generator 800 and a signal controller 600 for controlling the gray voltage generator 800 are included.

The display panel unit 300 includes a plurality of display signal lines G ₁ -G _n , D ₁ -D _m , and a plurality of pixels arranged in a substantially matrix form when viewed in an equivalent circuit.

The display signal lines G ₁ -G _n and D ₁ -D _m are a plurality of gate lines G ₁ -G _n for transmitting a gate signal (also called a “scan signal”) and a data signal line or data for transmitting a data signal. Line D ₁ -D _m . The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other.

Each pixel includes a switching element Q connected to the display signal lines G ₁ -G _n , D ₁ -D _m , and a pixel circuit PX connected thereto.

The switching element Q is a three-terminal element whose control terminal and input terminal are connected to the gate line G ₁ -G _n and the data line D ₁ -D _m, respectively, and the output terminal is the pixel circuit PX. Is connected to. In addition, the switching element Q is preferably a thin film transistor, and particularly preferably comprises amorphous silicon.

In the case of a liquid crystal display, which is a representative example of a flat panel display, the lower panel 100, the upper panel 200, and a liquid crystal layer 3 therebetween are included as shown in FIG. 2. The display signal lines G ₁ -G _n , D ₁ -D _m and the switching elements Q are provided on the lower display panel 100. The pixel circuit PX of the liquid crystal display includes a liquid crystal capacitor C _LC and a storage capacitor C _ST connected to the switching element Q. The holding capacitor C _ST can be omitted as necessary.

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage V _com . Unlike in FIG. 2, the common electrode 270 may be provided in the lower panel 100. In this case, both electrodes 190 and 270 may be formed in a linear or bar shape.

The storage capacitor C _ST is formed by overlapping a separate signal line (not shown) and the pixel electrode 190 provided on the lower panel 100, and a predetermined voltage such as a common voltage V _com is applied to the separate signal line. Is approved. However, the storage capacitor C _ST may be formed such that the pixel electrode 190 overlaps the front end gate line directly above the insulator.

On the other hand, in order to implement color display, each pixel should be able to display color, which is provided with a color filter 230 of three primary colors, for example, red, green, or blue, in a region corresponding to the pixel electrode 190. It is possible by doing. In FIG. 2, the color filter 230 is formed on the upper panel 200. Alternatively, the color filter 230 may be formed above or below the pixel electrode 190 of the lower panel 100.

Polarizers (not shown) for polarizing light are attached to outer surfaces of at least one of the two display panels 100 and 200 of the display panel unit 300 of the liquid crystal display device.

Referring back to FIG. 1, the gray voltage generator 800 generates one or two gray voltages related to the luminance of the pixel. If there are two sets, one of the sets has a positive value for the common voltage (V _com ) and the other set has a negative value.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the display panel 300 to gate a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. Applies to lines G ₁ -G _n . The gate driver 400 includes a plurality of stages substantially arranged in a row as a shift register.

The data driver 500 is connected to the data lines D ₁ -D _m of the display panel 300 to select the gray voltage from the gray voltage generator 800 and apply the gray voltage to the pixel as a data signal.

In this case, each of the gate driver 400 and the data driver 500 includes a plurality of driver ICs, and in one embodiment of the present invention, the data driver IC and the data driver IC are mounted on the display panel 300 in a COG manner. .

The signal controller 600 controls operations of the gate driver 400 and the data driver 500.

The display operation of such a display device will now be described in more detail.

The signal controller 600 inputs an input control signal for controlling the RGB image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 generates a gate control signal CONT1 and a data control signal CONT2 based on the input control signal and the input image signals R, G, and B, and generates the image signals R, G, and B. After appropriately processing the display panel 300 according to the operating conditions, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal DAT are transferred to the data driver 500. Export.

The gate control signal (CONT1) includes a gate-on voltage vertical synchronization start signal (STV) for instructing the start of output of the (V _on), the gate-on voltage gated clock signal that controls the output timing of the (V _on) (CPV) and the gate-on An output enable signal OE or the like that defines the duration of the voltage V _on .

The data control signal CONT2 is a load signal LOAD and a data clock signal for applying a corresponding data voltage to the horizontal synchronization start signal STH indicating the start of input of the image data DAT and the data lines D ₁ -D _m . (HCLK). In the case of the liquid crystal display or the like shown in FIG. 2, the polarity of the data voltage with respect to the common voltage V _com (hereinafter referred to as "polarization of the data voltage" by reducing the "polarity of the data voltage with respect to the common voltage") is inverted. The inversion signal RVS may also be included.

The data driver 500 sequentially receives the image data DAT corresponding to one row of pixels according to the data control signal CONT2 from the signal controller 600, and among the gray voltages from the gray voltage generator 800. By selecting the gray scale voltage corresponding to each image data DAT, the image data DAT is converted into a corresponding data voltage and applied to the data lines D ₁ -D _m .

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. Turn on the switching element (Q) connected to. The data voltage supplied to the data lines D ₁ -D _m is applied to the corresponding pixel through the turned-on switching element Q.

In the case of the liquid crystal display shown in FIG. 2, the difference between the data voltage applied to the pixel and the common voltage V _com is represented as the charging voltage of the liquid crystal capacitor C _LC , that is, the pixel voltage. The liquid crystal molecules vary in arrangement depending on the magnitude of the pixel voltage. As a result, the polarization of light passing through the liquid crystal layer 3 changes. The change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the display panels 100 and 200.

After one horizontal period (or “1H”) (one period of the horizontal sync signal H _sync , the data enable signal DE, and the gate clock CPV), the data driver 500 and the gate driver 400 are next. The same operation is repeated for the pixels in the row. In this manner, the gate-on voltages V _{on are} sequentially applied to all the gate lines G ₁ -G _n during one frame to apply data voltages to all the pixels. In the case of the liquid crystal display shown in FIG. 2, in particular, when one frame ends, the next frame starts and an inversion signal applied to the data driver 500 such that the polarity of the data voltage applied to each pixel is opposite to the polarity of the previous frame. The state of (RVS) is controlled ("frame inversion"). At this time, the polarity of the data voltage flowing through one data line is changed according to the characteristics of the inversion signal RVS even in one frame (eg, "row inversion", "point inversion"), The polarities can also be different (eg "invert columns", "invert points")

Next, a display device according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 3 to 5.

FIG. 3 is a schematic layout view of a display device according to an exemplary embodiment of the present invention. FIG. 4 is an enlarged view of a portion of the data driver IC region illustrated in FIG. 3, and FIG. 5 is a data driver illustrated in FIG. 4. It is sectional drawing which cut | disconnected IC area | region along the VV 'line.

3 to 5, the display panel 300 of the display device according to the exemplary embodiment includes a plurality of data driver IC regions 540 and a gate driver IC region 440.

The display area D of the display panel 300 includes a gate line G1 -Gn, a data line D1 -Dm, and a pixel, and an outer peripheral area thereof includes a data driver IC region 540 and a gate drive. IC region 440 is provided. Here, the driving IC regions 440 and 540 refer to regions in which the driving IC is mounted.

Each of the driving IC regions 440 and 540 is provided with a plurality of inspection lines TL, contact pads CP, and display signal lines G1-Gn and D1-Dm. Each test line TL is connected to any one of the test pads 521P and 531P through the signal lines 521 and 531.

Next, the display device according to an exemplary embodiment of the present invention will be described in more detail with reference to the data driver IC region 540.

4 and 5, data lines D1 -Dm are denoted by reference numeral 171.

A pair of metals or conductors, such as aluminum (Al) or aluminum alloy (Mo alloy), molybdenum (Mo) or molybdenum-tungsten alloy (MoW), chromium (Cr), tantalum (Ta), etc., on the insulating substrate 110. Signal lines 521 and 531 are formed. Although not shown, the gate lines are formed of the same layer.

The signal lines 521 and 531 may be formed in a single layer, but may be formed in more than a double layer. In this case, it is preferable that one layer is formed of a material having a low specific resistance and the other layer is formed of a material having good contact properties with other materials, for example, a double film of chromium and an aluminum alloy or a double film of molybdenum or molybdenum alloy and aluminum. Can be.

A gate insulating layer 140 made of silicon nitride (SiN _X ) is formed on the signal lines 521 and 531.

On the gate insulating layer 140, a plurality of data lines 171 and inspection lines TL made of a metal or a conductor such as aluminum or an aluminum alloy, molybdenum or molybdenum-tungsten alloy, chromium, tantalum, or the like are formed, and the inspection line TL Denotes a portion where the data line 171 extends.

The data line 171 and the test line TL may be formed of a single layer with the signal lines 521 and 531, but may be formed of a double layer or more. In the case where there are more than two layers, it is preferable that one layer is formed of a material having a low specific resistance, and the other layer is a material having good contact characteristics with other materials.

A passivation layer 180 made of silicon nitride or an organic insulating layer is formed on the data line 171, the inspection line TL, and the gate insulating layer 140. The passivation layer 180 has a plurality of contact holes 184, 185, and 186 exposing a portion of the data line 171 and a portion of the inspection line TL.

The passivation layer 180 also has a plurality of contact holes 187 exposing a part of the signal line 531 together with the gate insulating layer 140. In addition, although not shown in the figure, a contact hole for exposing a part of the test pads 521p, 531p, 421p, and 431p is also provided in the protective film 180.

The contact auxiliary member 92 and the connection member 97 made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) are formed on the passivation layer 180.

The contact auxiliary member 92 is connected to a part of the data line 171 through the contact hole 184, which complements the adhesion between the end of the data line 171 and the external circuit device and the data line 171. Protects). In this case, the portion where the data line 171 extends, the contact holes 184 and 185, and the contact auxiliary member 92 form a contact pad CP. Here, the contact hole 185 may be formed in plurality in various forms.

The connecting member 97 is connected to the data line 171 through the contact hole 186, and is connected to the signal line 531 through the contact hole 187 and transmitted through the test pad 531p. To the connected data line.

On the other hand, when the VI inspection for all the data lines D ₁ -D _m is completed in the display device having such a structure, a laser trimming device or the like is used to separate the signal lines 521 and the data lines 171. The connected inspection line TL is cut along the cutting line L.

Subsequently, the performance of the display device is confirmed by applying the same voltage as that of the actual driving IC using the gross test equipment.                     

In this case, as shown in FIGS. 4 and 5, the end portion of the data line 171, that is, the contact pad CP is extended upward to increase the contact area with the probe. In addition, a plurality of contact holes 185 are formed to prevent the probe from slipping on the contact auxiliary member 92 by positioning the probe in the contact hole 185.

In this manner, a stable gross test can be performed by increasing the area of the contact pad CP and simultaneously placing a plurality of contact holes so that the probe can contact the pad more accurately.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (6)

A plurality of pixels each including a switching element, A display signal line connected to the pixel, and A contact pad formed at an end of the display signal line Including, The contact pad is formed with a main contact hole and at least one auxiliary contact hole different in size from the main contact hole. Display device. In claim 1, And the contact pad includes a contact auxiliary member connected to the display signal line through the contact hole. In claim 2, The display signal line includes a gate line for transmitting a gate signal and a data line for transmitting a data voltage. In claim 3, A gate driving IC which generates and exports the gate signal, and Data driving IC to generate and export the data voltage Display device comprising a. In claim 4, The gate driving IC is mounted on a chip on glass (COG) method. In claim 4, And the data driving IC is mounted in a COG manner.

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